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author | Josh Blum <josh@joshknows.com> | 2012-04-24 13:38:28 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-04-24 13:38:28 -0700 |
commit | c42c02f03774db7df34a09c021e907ca7a048d46 (patch) | |
tree | 2a932ea16a0f4d0c1f14834bb1e1e4938f41f1c3 | |
parent | 0a4a861afec15b59da8cbc4a3ceadbdfc266d4ec (diff) | |
download | uhd-c42c02f03774db7df34a09c021e907ca7a048d46.tar.gz uhd-c42c02f03774db7df34a09c021e907ca7a048d46.tar.bz2 uhd-c42c02f03774db7df34a09c021e907ca7a048d46.zip |
usrp2: fix ad9510 register map typos
These register addresses should be in hex.
Fortunately, they are not set in the code,
so the typo did not break anything in UHD.
-rwxr-xr-x | host/lib/ic_reg_maps/gen_ad9510_regs.py | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py index 83236c921..6c1e612cc 100755 --- a/host/lib/ic_reg_maps/gen_ad9510_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -1,6 +1,6 @@ #!/usr/bin/env python # -# Copyright 2010 Ettus Research LLC +# Copyright 2010-2012 Ettus Research LLC # # This program is free software: you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -73,12 +73,12 @@ output_level_lvds_out$i $hex(0x40+$o)[1:2] 1 1_75ma, 3_5ma, 5_25ma, 7m lvds_cmos_select_out$i $hex(0x40+$o)[3] 1 lvds, cmos inverted_cmos_driver_out$i $hex(0x40+$o)[4] 0 dis, enb #end for -clock_select 45[0] 1 clk2_drives, clk1_drives -clk1_power_down 45[1] 0 -clk2_power_down 45[2] 0 -prescaler_clock_pd 45[3] 0 -refin_power_down 45[4] 0 -all_clock_inputs_pd 45[5] 0 +clock_select 0x45[0] 1 clk2_drives, clk1_drives +clk1_power_down 0x45[1] 0 +clk2_power_down 0x45[2] 0 +prescaler_clock_pd 0x45[3] 0 +refin_power_down 0x45[4] 0 +all_clock_inputs_pd 0x45[5] 0 ######################################################################## ## dividers ######################################################################## @@ -94,12 +94,12 @@ bypass_divider_out$i $hex(0x49+$o)[7] 0 ######################################################################## ## function ######################################################################## -sync_detect_enable 58[0] 0 dis, enb -sync_select 58[1] 0 1_to_0_5, 0_5_to_1 -soft_sync 58[2] 0 -dist_power_down 58[3] 0 -sync_power_down 58[4] 0 -function_pin_select 58[5:6] 0 resetb, syncb, test, pdb +sync_detect_enable 0x58[0] 0 dis, enb +sync_select 0x58[1] 0 1_to_0_5, 0_5_to_1 +soft_sync 0x58[2] 0 +dist_power_down 0x58[3] 0 +sync_power_down 0x58[4] 0 +function_pin_select 0x58[5:6] 0 resetb, syncb, test, pdb update_registers 0x5A[0] 0 """ |