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| author | Nick Foster <nick@nerdnetworks.org> | 2010-07-27 13:26:16 -0700 |
|---|---|---|
| committer | Nick Foster <nick@nerdnetworks.org> | 2010-07-27 13:26:16 -0700 |
| commit | aad60cc7f2d9964c5d81793e6e4a62218f952a2e (patch) | |
| tree | 110b75d69bdbcc763c0209bcfc59b0c98430b868 | |
| parent | 0e98b9cfe5183f284da698243c6e91b61572c41e (diff) | |
| parent | ef662b0c952f8e22ba760917f3781279471d69dc (diff) | |
| download | uhd-aad60cc7f2d9964c5d81793e6e4a62218f952a2e.tar.gz uhd-aad60cc7f2d9964c5d81793e6e4a62218f952a2e.tar.bz2 uhd-aad60cc7f2d9964c5d81793e6e4a62218f952a2e.zip | |
Merge branch 'u2p' of ettus.sourcerepo.com:ettus/fpgapriv into u2p
| -rw-r--r-- | usrp2/top/u2plus/u2plus.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v index df91d8875..c4db0d6cd 100644 --- a/usrp2/top/u2plus/u2plus.v +++ b/usrp2/top/u2plus/u2plus.v @@ -125,6 +125,10 @@ module u2plus input flash_miso ); + wire CLK_TO_MAC_int, CLK_TO_MAC_int2; + IBUFG phyclk (.O(CLK_TO_MAC_int), .I(CLK_TO_MAC)); + BUFG phyclk2 (.O(CLK_TO_MAC_int2), .I(CLK_TO_MAC_int)); + // FPGA-specific pins connections wire clk_fpga, dsp_clk, clk_div, dcm_out, wb_clk, clock_ready; |