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authorMatt Ettus <matt@ettus.com>2010-02-23 19:59:54 -0800
committerMatt Ettus <matt@ettus.com>2010-02-23 19:59:54 -0800
commit0d9c46ae002cad7c144432e86987a81eb33157fc (patch)
tree116342f5cbfa09dee7e69d6095b77678f985abc2
parent702c87c3bae259f038d2c10fe32903f391e95de1 (diff)
parent904b35c689d38694913606c569a9d324533ff765 (diff)
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Merge branch 'master' into u1e
Conflicts: .gitignore
-rw-r--r--.gitignore2
-rw-r--r--usrp2/control_lib/ram_2port.v2
2 files changed, 3 insertions, 1 deletions
diff --git a/.gitignore b/.gitignore
index b25c15b81..b275f0e49 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,3 @@
*~
+\#*\#
+a.out
diff --git a/usrp2/control_lib/ram_2port.v b/usrp2/control_lib/ram_2port.v
index 6c8332b9c..3716a7c8a 100644
--- a/usrp2/control_lib/ram_2port.v
+++ b/usrp2/control_lib/ram_2port.v
@@ -21,7 +21,7 @@ module ram_2port
integer i;
initial
for(i=0;i<(1<<AWIDTH);i=i+1)
- ram[i] <= {AWIDTH{1'b0}};
+ ram[i] <= {DWIDTH{1'b0}};
always @(posedge clka) begin
if (ena)