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| author | Josh Blum <josh@joshknows.com> | 2012-02-04 08:41:54 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-04 14:35:35 -0800 |
| commit | 04e9d23d5f9f300164182597b0e0525063bd91e4 (patch) | |
| tree | fccdad6f512f3a142942dffbd846515e7bc006f7 | |
| parent | 0d2acffaf4d3e3b02dc9745e94b407356650f923 (diff) | |
| download | uhd-04e9d23d5f9f300164182597b0e0525063bd91e4.tar.gz uhd-04e9d23d5f9f300164182597b0e0525063bd91e4.tar.bz2 uhd-04e9d23d5f9f300164182597b0e0525063bd91e4.zip | |
b100: delete some unused registers from map
| -rw-r--r-- | host/lib/usrp/b100/b100_regs.hpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/b100/io_impl.cpp | 3 |
2 files changed, 0 insertions, 7 deletions
diff --git a/host/lib/usrp/b100/b100_regs.hpp b/host/lib/usrp/b100/b100_regs.hpp index b87a0ad73..cc94d0a2a 100644 --- a/host/lib/usrp/b100/b100_regs.hpp +++ b/host/lib/usrp/b100/b100_regs.hpp @@ -42,10 +42,6 @@ #define B100_REG_MISC_SW B100_REG_MISC_BASE + 2 #define B100_REG_MISC_CGEN_CTRL B100_REG_MISC_BASE + 4 #define B100_REG_MISC_CGEN_ST B100_REG_MISC_BASE + 6 -#define B100_REG_MISC_TEST B100_REG_MISC_BASE + 8 -#define B100_REG_MISC_RX_LEN B100_REG_MISC_BASE + 10 -#define B100_REG_MISC_TX_LEN B100_REG_MISC_BASE + 12 -#define B100_REG_MISC_XFER_RATE B100_REG_MISC_BASE + 14 ///////////////////////////////////////////////////// // Slave 1 -- UART diff --git a/host/lib/usrp/b100/io_impl.cpp b/host/lib/usrp/b100/io_impl.cpp index b1a44d70e..db5af0dc5 100644 --- a/host/lib/usrp/b100/io_impl.cpp +++ b/host/lib/usrp/b100/io_impl.cpp @@ -58,9 +58,6 @@ void b100_impl::io_init(void){ _fpga_ctrl->poke32(B100_REG_CLEAR_RX, 0); _fpga_ctrl->poke32(B100_REG_CLEAR_TX, 0); - //set the expected packet size in USB frames - _fpga_ctrl->poke32(B100_REG_MISC_RX_LEN, 4); - //allocate streamer weak ptrs containers _rx_streamers.resize(_rx_dsps.size()); _tx_streamers.resize(1/*known to be 1 dsp*/); |