Merge branch 'master' into usrp1

10 files changed, 332 insertions, 35 deletions

diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c
index f0a9702be..1dd6e80ac 100644
--- a/firmware/microblaze/apps/txrx_uhd.c
+++ b/firmware/microblaze/apps/txrx_uhd.c
@@ -172,6 +172,33 @@ void handle_udp_data_packet(
 #define OTW_GPIO_BANK_TO_NUM(bank) \
     (((bank) == USRP2_DIR_RX)? (GPIO_RX_BANK) : (GPIO_TX_BANK))
 
+//setup the output data
+static usrp2_ctrl_data_t ctrl_data_out;
+static struct socket_address i2c_src;
+static struct socket_address spi_src;
+
+static volatile bool i2c_done = false;
+void i2c_read_done_callback(void) {
+  //printf("I2C read done callback\n");
+  i2c_async_data_ready(ctrl_data_out.data.i2c_args.data);
+  i2c_done = true;
+  i2c_register_callback(0);
+}
+
+void i2c_write_done_callback(void) {
+  //printf("I2C write done callback\n");
+  i2c_done = true;
+  i2c_register_callback(0);
+}
+
+static volatile bool spi_done = false;
+static volatile uint32_t spi_readback_data;
+void get_spi_readback_data(void) {
+  ctrl_data_out.data.spi_args.data = spi_get_data();
+  spi_done = true;
+  spi_register_callback(0);
+}
+
 void handle_udp_ctrl_packet(
     struct socket_address src, struct socket_address dst,
     unsigned char *payload, int payload_len
@@ -197,11 +224,9 @@ void handle_udp_ctrl_packet(
     }
 
     //setup the output data
-    usrp2_ctrl_data_t ctrl_data_out = {
-        .proto_ver = USRP2_FW_COMPAT_NUM,
-        .id=USRP2_CTRL_ID_HUH_WHAT,
-        .seq=ctrl_data_in->seq
-    };
+    ctrl_data_out.proto_ver = USRP2_FW_COMPAT_NUM;
+    ctrl_data_out.id=USRP2_CTRL_ID_HUH_WHAT;
+    ctrl_data_out.seq=ctrl_data_in->seq;
 
     //handle the data based on the id
     switch(ctrl_data_in_id){
@@ -212,6 +237,7 @@ void handle_udp_ctrl_packet(
     case USRP2_CTRL_ID_WAZZUP_BRO:
         ctrl_data_out.id = USRP2_CTRL_ID_WAZZUP_DUDE;
         memcpy(&ctrl_data_out.data.ip_addr, get_ip_addr(), sizeof(struct ip_addr));
+        send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
         break;
 
     /*******************************************************************
@@ -219,19 +245,21 @@ void handle_udp_ctrl_packet(
      ******************************************************************/
     case USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO:{
             //transact
-            uint32_t result = spi_transact(
-                (ctrl_data_in->data.spi_args.readback == 0)? SPI_TXONLY : SPI_TXRX,
+            bool success = spi_async_transact(
+                //(ctrl_data_in->data.spi_args.readback == 0)? SPI_TXONLY : SPI_TXRX,
                 ctrl_data_in->data.spi_args.dev,      //which device
                 ctrl_data_in->data.spi_args.data,     //32 bit data
                 ctrl_data_in->data.spi_args.num_bits, //length in bits
-                (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE |
-                (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL
+                (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE | //flags
+                (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL,
+                get_spi_readback_data //callback
             );
 
             //load output
-            ctrl_data_out.data.spi_args.data = result;
             ctrl_data_out.id = USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE;
+            spi_src = src;
         }
+//        send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
         break;
 
     /*******************************************************************
@@ -239,11 +267,13 @@ void handle_udp_ctrl_packet(
      ******************************************************************/
     case USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO:{
             uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes;
-            i2c_read(
+            i2c_register_callback(i2c_read_done_callback);
+            i2c_async_read(
                 ctrl_data_in->data.i2c_args.addr,
-                ctrl_data_out.data.i2c_args.data,
                 num_bytes
             );
+            i2c_src = src;
+//            i2c_dst = dst;
             ctrl_data_out.id = USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE;
             ctrl_data_out.data.i2c_args.bytes = num_bytes;
         }
@@ -251,11 +281,14 @@ void handle_udp_ctrl_packet(
 
     case USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO:{
             uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes;
-            i2c_write(
+            i2c_register_callback(i2c_read_done_callback);
+            i2c_async_write(
                 ctrl_data_in->data.i2c_args.addr,
                 ctrl_data_in->data.i2c_args.data,
                 num_bytes
             );
+            i2c_src = src;
+//            i2c_dst = dst;
             ctrl_data_out.id = USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE;
             ctrl_data_out.data.i2c_args.bytes = num_bytes;
         }
@@ -287,6 +320,7 @@ void handle_udp_ctrl_packet(
 
         }
         ctrl_data_out.id = USRP2_CTRL_ID_OMG_POKED_REGISTER_SO_BAD_DUDE;
+        send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
         break;
 
     case USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO:
@@ -309,13 +343,14 @@ void handle_udp_ctrl_packet(
 
         }
         ctrl_data_out.id = USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE;
+        send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
         break;
 
     default:
         ctrl_data_out.id = USRP2_CTRL_ID_HUH_WHAT;
-
+        send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
     }
-    send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
+    
 }
 
 /*
@@ -481,6 +516,17 @@ main(void)
 
     buffer_irq_handler(0);
 
+    if(i2c_done) {
+      i2c_done = false;
+      send_udp_pkt(USRP2_UDP_CTRL_PORT, i2c_src, &ctrl_data_out, sizeof(ctrl_data_out));
+      //printf("Sending UDP packet from main loop for I2C...\n");
+    }
+
+    if(spi_done) {
+      spi_done = false;
+      send_udp_pkt(USRP2_UDP_CTRL_PORT, spi_src, &ctrl_data_out, sizeof(ctrl_data_out));
+    }
+
     int pending = pic_regs->pending;		// poll for under or overrun
 
     if (pending & PIC_UNDERRUN_INT){
diff --git a/firmware/microblaze/lib/dbsm.c b/firmware/microblaze/lib/dbsm.c
index d495860fd..cee343eaa 100644
--- a/firmware/microblaze/lib/dbsm.c
+++ b/firmware/microblaze/lib/dbsm.c
@@ -160,12 +160,12 @@ dbsm_process_status(dbsm_t *sm, uint32_t status)
     putchar('E');
     // Most likely an ethernet Rx error.  We just restart the transfer.
     if (status & (BPS_ERROR(sm->buf0)))
-      //dbsm_error_helper(sm, sm->buf0);
-      dbsm_process_helper(sm, sm->buf0); //forward errors
+      dbsm_error_helper(sm, sm->buf0);
+      //dbsm_process_helper(sm, sm->buf0); //forward errors
 
     if (status & (BPS_ERROR(sm->buf0 ^ 1)))
-      //dbsm_error_helper(sm, sm->buf0 ^ 1);
-      dbsm_process_helper(sm, sm->buf0 ^ 1); //forward errors
+      dbsm_error_helper(sm, sm->buf0 ^ 1);
+      //dbsm_process_helper(sm, sm->buf0 ^ 1); //forward errors
   }
 
   if (status & BPS_DONE(sm->buf0))
diff --git a/firmware/microblaze/lib/i2c.c b/firmware/microblaze/lib/i2c.c
index 3f738733b..177341267 100644
--- a/firmware/microblaze/lib/i2c.c
+++ b/firmware/microblaze/lib/i2c.c
@@ -19,12 +19,15 @@
 #include "i2c.h"
 #include "memory_map.h"
 #include "stdint.h"
+#include <string.h>
+#include "pic.h"
+#include "nonstdio.h"
 
 #define MAX_WB_DIV 4	// maximum wishbone divisor (from 100 MHz MASTER_CLK)
 
 // prescaler divisor values for 100 kHz I2C [uses 5 * SCLK internally]
 
-#define PRESCALER(wb_div) (((MASTER_CLK_RATE/(wb_div)) / (5 * 100000)) - 1)
+#define PRESCALER(wb_div) (((MASTER_CLK_RATE/(wb_div)) / (5 * 400000)) - 1)
 
 static uint16_t prescaler_values[MAX_WB_DIV+1] = {
   0xffff,	// 0: can't happen
@@ -34,6 +37,18 @@ static uint16_t prescaler_values[MAX_WB_DIV+1] = {
   PRESCALER(4), // 4:  25 MHz
 };
 
+//asynchronous (interrupt-driven) i2c state variables
+volatile uint8_t i2c_buf[17]; //tx/rx data transfer buffer
+volatile uint8_t *volatile i2c_bufptr = i2c_buf; //ptr to current position
+volatile uint8_t i2c_len = 0; //length remaining in current transfer
+volatile i2c_state_t i2c_state = I2C_STATE_IDLE; //current I2C transfer state
+i2c_dir_t i2c_dir; //I2C transfer direction
+
+void  (*volatile i2c_callback)(void); //function pointer to i2c callback to be called when transaction is complete
+
+static void i2c_irq_handler(unsigned irq);
+inline void i2c_async_err(void);
+
 void
 i2c_init(void)
 {
@@ -47,9 +62,10 @@ i2c_init(void)
   i2c_regs->prescaler_lo = prescaler_values[wb_div] & 0xff;
   i2c_regs->prescaler_hi = (prescaler_values[wb_div] >> 8) & 0xff;
 
-  i2c_regs->ctrl = I2C_CTRL_EN;	// enable core
+  i2c_regs->ctrl = I2C_CTRL_EN; //| I2C_CTRL_IE;	// enable core
 
-  // FIXME interrupt driven?
+  // FIXME interrupt driven?  
+  pic_register_handler(IRQ_I2C, i2c_irq_handler);
 }
 
 static inline void
@@ -107,7 +123,7 @@ i2c_write(unsigned char i2c_addr, const unsigned char *buf, unsigned int len)
   i2c_regs->data = (i2c_addr << 1) | 0;	 // 7 bit address and write bit (0)
 
   // generate START and write addr (and maybe STOP)
-  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START | (len == 0 ? I2C_CMD_STOP : 0);  
+  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START | (len == 0 ? I2C_CMD_STOP : 0);
   if (!wait_chk_ack())
     goto fail;
 
@@ -124,4 +140,163 @@ i2c_write(unsigned char i2c_addr, const unsigned char *buf, unsigned int len)
   return false;
 }
 
-  
+static void i2c_irq_handler(unsigned irq) {
+//i2c state machine.
+
+  //printf("I2C irq handler\n");
+  //first let's make sure nothing is f'ed up
+  //TODO: uncomment this error checking when we have some way to handle errors
+//  if(((i2c_regs->cmd_status & I2C_ST_RXACK) != 0) && i2c_dir == I2C_DIR_WRITE) { //we got a NACK and we didn't send it
+//    printf("\tNACK received\n");
+//    i2c_async_err();
+//    return;
+//  }// else printf("\tACK received, proceeding\n");
+
+  if(i2c_regs->cmd_status & I2C_ST_AL) { 
+    printf("\tArbitration lost!\n");
+    i2c_async_err();
+    return;
+  }
+
+  if(i2c_regs->cmd_status & I2C_ST_TIP) {
+    //printf("\tI2C still busy in interrupt\n");
+    return;
+  }
+
+  //now decide what to do
+  switch(i2c_state) {
+
+  case I2C_STATE_IDLE:
+    //this is an error. in idle state, we shouldn't be transferring data, and the fact that the IRQ fired is terrible bad.
+    printf("AAAAAHHHHH INTERRUPT IN THE IDLE STATE AAAHHHHHHHHH\n");
+    i2c_async_err();
+    break;
+
+  case I2C_STATE_CONTROL_BYTE_SENT: //here we've sent the control byte, and we're either clocking data in or out now, but we haven't received a byte yet.
+  case I2C_STATE_DATA:      //here we're sending/receiving data and if we're receiving there's data in the data reg
+
+    //if(i2c_state == I2C_STATE_DATA) printf("\tI2C in state DATA with dir=%d and len=%d\n", i2c_dir, i2c_len);
+    //else printf("\tI2C in state CONTROL_BYTE_SENT with dir=%d and len=%d\n", i2c_dir, i2c_len);
+
+    if(i2c_dir == I2C_DIR_READ) {
+      if(i2c_state == I2C_STATE_DATA) *(i2c_bufptr++) = i2c_regs->data;
+      //printf("\tRead %x\n", *(i2c_bufptr-1));
+      //set up another data byte
+      if(i2c_len > 1) //only one more byte to transfer
+        i2c_regs->cmd_status = I2C_CMD_RD;
+      else
+        i2c_regs->cmd_status = I2C_CMD_RD | I2C_CMD_NACK | I2C_CMD_STOP;
+    }
+    else if(i2c_dir == I2C_DIR_WRITE) {
+      //write a byte
+      //printf("\tWriting %x\n", *i2c_bufptr);
+      i2c_regs->data = *(i2c_bufptr++);
+      if(i2c_len > 1)
+        i2c_regs->cmd_status = I2C_CMD_WR;
+      else {
+        //printf("\tGenerating STOP\n");
+        i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_STOP;
+      }
+    };
+    i2c_len--;
+    if(i2c_len == 0) i2c_state = I2C_STATE_LAST_BYTE;
+    else i2c_state = I2C_STATE_DATA; //takes care of the addr_sent->data transition
+    break;
+
+
+  case I2C_STATE_LAST_BYTE: //here we've already sent the last read request and the last data is waiting for us.
+    //printf("\tI2C in state LAST BYTE\n");
+
+    if(i2c_dir == I2C_DIR_READ) {
+      *(i2c_bufptr++) = i2c_regs->data;
+      //printf("\tRead %x\n", *(i2c_bufptr-1));
+      i2c_state = I2C_STATE_DATA_READY;
+    } else {
+      i2c_state = I2C_STATE_IDLE;
+    }
+    i2c_regs->ctrl &= ~I2C_CTRL_IE; //disable interrupts until next time
+
+    if(i2c_callback) {
+      i2c_callback(); //if we registered a callback, call it!
+    }
+
+    break;
+
+
+  default: //terrible things have happened.
+    break;
+  }
+
+}
+
+void i2c_register_callback(void (*volatile callback)(void)) {
+  i2c_callback = callback;
+}
+
+inline void i2c_async_err(void) {
+  i2c_state = I2C_STATE_IDLE;
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  printf("I2C error\n");
+//TODO: set an error flag instead of just dropping things on the floor
+  i2c_regs->cmd_status = I2C_CMD_STOP;
+}
+
+bool i2c_async_read(uint8_t addr, unsigned int len) {
+  //printf("Starting async read\n");
+  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
+  if(len == 0) return true; //just idiot-proofing
+  if(len > sizeof(i2c_buf)) return false;
+
+  //disable I2C interrupts and clear pending interrupts on the I2C device
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  i2c_regs->cmd_status |= I2C_CMD_IACK;
+
+  i2c_len = len;
+  i2c_dir = I2C_DIR_READ;
+  i2c_bufptr = i2c_buf;
+  //then set up the transfer by issuing the control byte
+  i2c_regs->ctrl |= I2C_CTRL_IE;
+  i2c_regs->data = (addr << 1) | 0x01; //7 bit addr and read bit
+  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
+  //update the state so the irq handler knows what's going on
+  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
+  return true;
+}
+
+bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len) {
+  //printf("Starting async write\n");
+  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
+  if(len > sizeof(i2c_buf)) return false;
+
+  //disable I2C interrupts and clear pending interrupts on the I2C device
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  i2c_regs->cmd_status |= I2C_CMD_IACK;
+
+  //copy the buffer into our own if writing
+  memcpy((void *)i2c_buf, buf, len);
+
+  i2c_len = len;
+  i2c_dir = I2C_DIR_WRITE;
+  i2c_bufptr = i2c_buf;
+  //then set up the transfer by issuing the control byte
+  i2c_regs->ctrl |= I2C_CTRL_IE;
+  i2c_regs->data = (addr << 1) | 0x00; //7 bit addr and read bit
+  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
+  //update the state so the irq handler knows what's going on
+  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
+
+  return true;
+}
+
+//TODO: determine if it's better to read sequentially into the user's buffer, copy on transfer complete, or copy on request (shown below). probably best to copy on request.
+bool i2c_async_data_ready(void *buf) {
+  if(i2c_state == I2C_STATE_DATA_READY) {
+    i2c_state = I2C_STATE_IDLE;
+    memcpy(buf, (void *)i2c_buf, (i2c_bufptr - i2c_buf)); //TODO: not really comfortable with this
+    //printf("Copying %d bytes to user buffer\n", i2c_bufptr-i2c_buf);
+    return true;
+  }
+  return false;
+}
+
+
diff --git a/firmware/microblaze/lib/i2c.h b/firmware/microblaze/lib/i2c.h
index ecb6aa0d2..77129e922 100644
--- a/firmware/microblaze/lib/i2c.h
+++ b/firmware/microblaze/lib/i2c.h
@@ -20,20 +20,38 @@
 #define INCLUDED_I2C_H
 
 #include <stdbool.h>
+#include "stdint.h"
+
+typedef enum { I2C_STATE_IDLE, 
+               I2C_STATE_CONTROL_BYTE_SENT, 
+               I2C_STATE_DATA, 
+               I2C_STATE_LAST_BYTE, 
+               I2C_STATE_DATA_READY, 
+               I2C_STATE_ERROR 
+             } i2c_state_t;
+
+typedef enum { I2C_DIR_WRITE=0, I2C_DIR_READ=1 } i2c_dir_t;
 
 void i2c_init(void);
 bool i2c_read (unsigned char i2c_addr, unsigned char *buf, unsigned int len);
 bool i2c_write(unsigned char i2c_addr, const unsigned char *buf, unsigned int len);
 
+bool i2c_async_read(uint8_t addr, unsigned int len);
+bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len);
+bool i2c_async_data_ready(void *);
+//static void i2c_irq_handler(unsigned irq);
+void i2c_register_callback(void (*callback)(void));
 
 // Write 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
 // Which EEPROM is determined by i2c_addr.  See i2c_addr.h
 
 bool eeprom_write (int i2c_addr, int eeprom_offset, const void *buf, int len);
+bool eeprom_write_async (int i2c_addr, int eeprom_offset, const void *buf, int len, void (*callback)(void));
 
 // Read 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
 // Which EEPROM is determined by i2c_addr.  See i2c_addr.h
 
 bool eeprom_read (int i2c_addr, int eeprom_offset, void *buf, int len);
+bool eeprom_read_async(int i2c_addr, int eeprom_offset, void *buf, int len, void (*callback)(void));
 
 #endif /* INCLUDED_I2C_H */
diff --git a/firmware/microblaze/lib/spi.c b/firmware/microblaze/lib/spi.c
index bef808e57..2a41a1bfa 100644
--- a/firmware/microblaze/lib/spi.c
+++ b/firmware/microblaze/lib/spi.c
@@ -17,6 +17,12 @@
 
 #include "spi.h"
 #include "memory_map.h"
+#include "pic.h"
+#include "nonstdio.h"
+
+void (*volatile spi_callback)(void); //SPI callback when xfer complete.
+
+static void spi_irq_handler(unsigned irq);
 
 void
 spi_init(void) 
@@ -59,3 +65,44 @@ spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags
   else
     return 0;
 }
+
+void spi_register_callback(void (*volatile callback)(void)) {
+  spi_callback = callback;
+}
+
+static void spi_irq_handler(unsigned irq) {
+//  printf("SPI IRQ handler\n");
+//  uint32_t wat = spi_regs->ctrl; //read a register just to clear the interrupt
+  //spi_regs->ctrl &= ~SPI_CTRL_IE;
+  if(spi_callback) spi_callback(); //we could just use the PIC to register the user's callback, but this provides the ability to do other things later
+}
+
+uint32_t spi_get_data(void) {
+  return spi_regs->txrx0;
+}
+
+bool 
+spi_async_transact(int slave, uint32_t data, int length, uint32_t flags, void (*volatile callback)(void)) {
+  flags &= (SPI_CTRL_TXNEG | SPI_CTRL_RXNEG);
+  int ctrl = SPI_CTRL_ASS | SPI_CTRL_IE | (SPI_CTRL_CHAR_LEN_MASK & length) | flags;
+
+  if(spi_regs->ctrl & SPI_CTRL_GO_BSY) {
+    printf("Async SPI busy!\n");
+    return false; //we don't wait on busy, we just return failure. we count on the host to not set up another transaction before the last one finishes.
+  }
+
+  // Tell it which SPI slave device to access
+  spi_regs->ss = slave & 0xffff;
+
+  // Data we will send
+  spi_regs->txrx0 = data;
+
+  spi_register_callback(callback);
+  pic_register_handler(IRQ_SPI, spi_irq_handler);
+
+  // Run it -- write once and rewrite with GO set
+  spi_regs->ctrl = ctrl;
+  spi_regs->ctrl = ctrl | SPI_CTRL_GO_BSY;
+
+  return true;
+}
diff --git a/firmware/microblaze/lib/spi.h b/firmware/microblaze/lib/spi.h
index 01e4d26fd..54618cedd 100644
--- a/firmware/microblaze/lib/spi.h
+++ b/firmware/microblaze/lib/spi.h
@@ -48,6 +48,13 @@ void spi_wait(void);
 uint32_t
 spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags);
 
+uint32_t spi_get_data(void);
+//static void spi_irq_handler(unsigned irq);
+void spi_register_callback(void (*volatile callback)(void));
+
+bool 
+spi_async_transact(int slave, uint32_t data, int length, uint32_t flags, void (*volatile callback)(void));
+
 // ----------------------------------------------------------------
 // Routines that manipulate the FLASH SPI BUS
 // ----------------------------------------------------------------
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c
index 75bc40859..8d666b76b 100644
--- a/firmware/microblaze/lib/u2_init.c
+++ b/firmware/microblaze/lib/u2_init.c
@@ -45,22 +45,26 @@ get_hw_rev(void)
 bool
 u2_init(void)
 {
+  hal_disable_ints();
   hal_io_init();
 
   // init spi, so that we can switch over to the high-speed clock
   spi_init();
 
-  // init i2c so we can read our rev
-  i2c_init();
-  get_hw_rev();
-
   // set up the default clocks
   clocks_init();
 
+  hal_uart_init();
+
+  // init i2c so we can read our rev
   pic_init();	// progammable interrupt controller
+  i2c_init();
+  hal_enable_ints();
+  get_hw_rev();
+
   bp_init();	// buffer pool
   
-  hal_enable_ints();
+
 
   // flash all leds to let us know board is alive
   hal_set_leds(0x0, 0x1f);
diff --git a/fpga/usrp2/vrt/vita_rx_framer.v b/fpga/usrp2/vrt/vita_rx_framer.v
index fd82263d0..235817941 100644
--- a/fpga/usrp2/vrt/vita_rx_framer.v
+++ b/fpga/usrp2/vrt/vita_rx_framer.v
@@ -128,7 +128,7 @@ module vita_rx_framer
        VITA_ERR_SECS : pkt_fifo_line <= {2'b00,vita_time_fifo_o[63:32]};
        VITA_ERR_TICS : pkt_fifo_line <= {2'b00,32'd0};
        VITA_ERR_TICS2 : pkt_fifo_line <= {2'b00,vita_time_fifo_o[31:0]};
-       VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b11,28'd0,flags_fifo_o};
+       VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b10,28'd0,flags_fifo_o};
        //VITA_ERR_TRAILER : pkt_fifo_line <= {2'b11,vita_trailer};
        
        default : pkt_fifo_line <= 34'h0_FFFF_FFFF;
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index a781c1a21..cc6c41ba7 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -34,7 +34,7 @@ extern "C" {
 
 //fpga and firmware compatibility numbers
 #define USRP2_FPGA_COMPAT_NUM 1
-#define USRP2_FW_COMPAT_NUM 5
+#define USRP2_FW_COMPAT_NUM 6
 
 //used to differentiate control packets over data port
 #define USRP2_INVALID_VRT_HEADER 0
@@ -104,12 +104,12 @@ typedef struct{
     union{
         __stdint(uint32_t) ip_addr;
         struct {
-            __stdint(uint8_t) dev;
+            __stdint(uint32_t) dev;
+            __stdint(uint32_t) data;
             __stdint(uint8_t) miso_edge;
             __stdint(uint8_t) mosi_edge;
-            __stdint(uint8_t) readback;
-            __stdint(uint32_t) data;
             __stdint(uint8_t) num_bits;
+            __stdint(uint8_t) readback;
         } spi_args;
         struct {
             __stdint(uint8_t) addr;
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index 4124221ef..2d450bfc6 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -115,7 +115,7 @@ public:
         //setup the out data
         usrp2_ctrl_data_t out_data;
         out_data.id = htonl(USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO);
-        out_data.data.spi_args.dev = which_slave;
+        out_data.data.spi_args.dev = htonl(which_slave);
         out_data.data.spi_args.miso_edge = spi_edge_to_otw[config.miso_edge];
         out_data.data.spi_args.mosi_edge = spi_edge_to_otw[config.mosi_edge];
         out_data.data.spi_args.readback = (readback)? 1 : 0;