summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJosh Blum <josh@joshknows.com>2012-02-04 16:38:15 -0800
committerJosh Blum <josh@joshknows.com>2012-02-04 16:38:15 -0800
commitc6e63c9d2af2c0b2e168aa6fdd63fe7b214927de (patch)
tree7d2bf4c7480f68c55eb215fcad16ef400d29dfcc
parent1e3cb86432ee1d695a12fd99590206e43caab2cc (diff)
downloaduhd-c6e63c9d2af2c0b2e168aa6fdd63fe7b214927de.tar.gz
uhd-c6e63c9d2af2c0b2e168aa6fdd63fe7b214927de.tar.bz2
uhd-c6e63c9d2af2c0b2e168aa6fdd63fe7b214927de.zip
b100/e100: unify rx/tx fifo clears into one
-rw-r--r--host/lib/usrp/b100/b100_regs.hpp6
-rw-r--r--host/lib/usrp/b100/io_impl.cpp5
-rw-r--r--host/lib/usrp/e100/e100_regs.hpp6
-rw-r--r--host/lib/usrp/e100/io_impl.cpp5
4 files changed, 8 insertions, 14 deletions
diff --git a/host/lib/usrp/b100/b100_regs.hpp b/host/lib/usrp/b100/b100_regs.hpp
index cc94d0a2a..77b643372 100644
--- a/host/lib/usrp/b100/b100_regs.hpp
+++ b/host/lib/usrp/b100/b100_regs.hpp
@@ -103,8 +103,7 @@
#define B100_SR_TX_FRONT 54 // 5 regs (+0 to +4)
#define B100_SR_REG_TEST32 60 // 1 reg
-#define B100_SR_CLEAR_RX_FIFO 61 // 1 reg
-#define B100_SR_CLEAR_TX_FIFO 62 // 1 reg
+#define B100_SR_CLEAR_FIFO 61 // 1 reg
#define B100_SR_GLOBAL_RESET 63 // 1 reg
#define B100_SR_USER_REGS 64 // 2 regs
@@ -117,8 +116,7 @@
/////////////////////////////////////////////////
// Magic reset regs
////////////////////////////////////////////////
-#define B100_REG_CLEAR_RX B100_REG_SR_ADDR(B100_SR_CLEAR_RX_FIFO)
-#define B100_REG_CLEAR_TX B100_REG_SR_ADDR(B100_SR_CLEAR_RX_FIFO)
+#define B100_REG_CLEAR_FIFO B100_REG_SR_ADDR(B100_SR_CLEAR_FIFO)
#define B100_REG_GLOBAL_RESET B100_REG_SR_ADDR(B100_SR_GLOBAL_RESET)
#endif
diff --git a/host/lib/usrp/b100/io_impl.cpp b/host/lib/usrp/b100/io_impl.cpp
index db5af0dc5..ac7c860d2 100644
--- a/host/lib/usrp/b100/io_impl.cpp
+++ b/host/lib/usrp/b100/io_impl.cpp
@@ -54,9 +54,8 @@ struct b100_impl::io_impl{
**********************************************************************/
void b100_impl::io_init(void){
- //clear state machines
- _fpga_ctrl->poke32(B100_REG_CLEAR_RX, 0);
- _fpga_ctrl->poke32(B100_REG_CLEAR_TX, 0);
+ //clear fifo state machines
+ _fpga_ctrl->poke32(B100_REG_CLEAR_FIFO, 0);
//allocate streamer weak ptrs containers
_rx_streamers.resize(_rx_dsps.size());
diff --git a/host/lib/usrp/e100/e100_regs.hpp b/host/lib/usrp/e100/e100_regs.hpp
index eee27b5b3..0ec5f4de3 100644
--- a/host/lib/usrp/e100/e100_regs.hpp
+++ b/host/lib/usrp/e100/e100_regs.hpp
@@ -116,8 +116,7 @@
#define UE_SR_TX_FRONT 54 // 5 regs (+0 to +4)
#define UE_SR_REG_TEST32 60 // 1 reg
-#define UE_SR_CLEAR_RX_FIFO 61 // 1 reg
-#define UE_SR_CLEAR_TX_FIFO 62 // 1 reg
+#define UE_SR_CLEAR_FIFO 61 // 1 reg
#define UE_SR_GLOBAL_RESET 63 // 1 reg
#define UE_SR_USER_REGS 64 // 2 regs
@@ -131,8 +130,7 @@
/////////////////////////////////////////////////
// Magic reset regs
////////////////////////////////////////////////
-#define E100_REG_CLEAR_RX E100_REG_SR_ADDR(UE_SR_CLEAR_RX_FIFO)
-#define E100_REG_CLEAR_TX E100_REG_SR_ADDR(UE_SR_CLEAR_RX_FIFO)
+#define E100_REG_CLEAR_FIFO E100_REG_SR_ADDR(UE_SR_CLEAR_FIFO)
#define E100_REG_GLOBAL_RESET E100_REG_SR_ADDR(UE_SR_GLOBAL_RESET)
#endif
diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp
index 4d530585b..8c7f5e742 100644
--- a/host/lib/usrp/e100/io_impl.cpp
+++ b/host/lib/usrp/e100/io_impl.cpp
@@ -164,9 +164,8 @@ void e100_impl::io_init(void){
_io_impl->demuxer = recv_packet_demuxer::make(_data_transport, _rx_dsps.size(), E100_RX_SID_BASE);
_io_impl->iface = _fpga_ctrl;
- //clear state machines
- _fpga_ctrl->poke32(E100_REG_CLEAR_RX, 0);
- _fpga_ctrl->poke32(E100_REG_CLEAR_TX, 0);
+ //clear fifo state machines
+ _fpga_ctrl->poke32(E100_REG_CLEAR_FIFO, 0);
//allocate streamer weak ptrs containers
_rx_streamers.resize(_rx_dsps.size());