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| author | Matt Ettus <matt@ettus.com> | 2010-07-09 14:22:51 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-07-09 14:22:51 -0700 |
| commit | 5b76de10206ab2d8e824c059bb84f6de2fb79995 (patch) | |
| tree | 332f6ec5747ae6838e65aa9db81440039cb8468a | |
| parent | c3ef4c04fd8d887a733fa9a8ed5b6702cf453a01 (diff) | |
| parent | 4f79676f7d51a2718c13f79151f2ed852c7447b6 (diff) | |
| download | uhd-5b76de10206ab2d8e824c059bb84f6de2fb79995.tar.gz uhd-5b76de10206ab2d8e824c059bb84f6de2fb79995.tar.bz2 uhd-5b76de10206ab2d8e824c059bb84f6de2fb79995.zip | |
Merge branch 'reload' into u1e
* reload:
fix to stop endless error packets
updated tests to match new features
| -rw-r--r-- | usrp2/vrt/vita_rx_framer.v | 4 | ||||
| -rw-r--r-- | usrp2/vrt/vita_rx_tb.v | 11 |
2 files changed, 10 insertions, 5 deletions
diff --git a/usrp2/vrt/vita_rx_framer.v b/usrp2/vrt/vita_rx_framer.v index 3c910924c..fd82263d0 100644 --- a/usrp2/vrt/vita_rx_framer.v +++ b/usrp2/vrt/vita_rx_framer.v @@ -193,7 +193,7 @@ module vita_rx_framer VITA_PAYLOAD : // Write if sample ready and no error flags req_write_pkt_fifo <= (sample_fifo_src_rdy_i & ~|flags_fifo_o[3:1]); - VITA_ERR_HEADER, VITA_ERR_STREAMID, VITA_ERR_SECS, VITA_ERR_TICS, VITA_ERR_TICS2, VITA_ERR_PAYLOAD, VITA_ERR_TRAILER : + VITA_ERR_HEADER, VITA_ERR_STREAMID, VITA_ERR_SECS, VITA_ERR_TICS, VITA_ERR_TICS2, VITA_ERR_PAYLOAD : req_write_pkt_fifo <= 1; default : req_write_pkt_fifo <= 0; @@ -213,7 +213,7 @@ module vita_rx_framer ( ((vita_state==VITA_PAYLOAD) & (sample_phase == (numchan-4'd1)) & ~|flags_fifo_o[3:1]) | - (vita_state==VITA_ERR_TRAILER)); + (vita_state==VITA_ERR_PAYLOAD)); assign debug_rx = vita_state; diff --git a/usrp2/vrt/vita_rx_tb.v b/usrp2/vrt/vita_rx_tb.v index b4fda9622..3e01e2ee2 100644 --- a/usrp2/vrt/vita_rx_tb.v +++ b/usrp2/vrt/vita_rx_tb.v @@ -3,8 +3,8 @@ module vita_rx_tb; localparam DECIM = 8'd4; - localparam MAXCHAN=4; - localparam NUMCHAN=4; + localparam MAXCHAN=1; + localparam NUMCHAN=1; reg clk = 0; reg reset = 1; @@ -94,7 +94,7 @@ module vita_rx_tb; @(posedge clk); write_setting(4,32'hDEADBEEF); // VITA header write_setting(5,32'hF00D1234); // VITA streamid - write_setting(6,32'h98765432); // VITA trailer + write_setting(6,32'hF0000000); // VITA trailer write_setting(7,8); // Samples per VITA packet write_setting(8,NUMCHAN); // Samples per VITA packet queue_rx_cmd(1,0,8,32'h0,32'h0); // send imm, single packet @@ -111,8 +111,13 @@ module vita_rx_tb; queue_rx_cmd(0,0,8,32'h0,32'h340); // send at, on time queue_rx_cmd(0,0,8,32'h0,32'h100); // send at, but late + #100000; + $display("\nChained, break chain\n"); queue_rx_cmd(1,1,8,32'h0,32'h0); // chained, but break chain #100000; + $display("\nSingle packet\n"); + queue_rx_cmd(1,0,8,32'h0,32'h0); // send imm, single packet + #100000; $display("\nEnd chain with zero samples, shouldn't error\n"); queue_rx_cmd(1,1,8,32'h0,32'h0); // chained queue_rx_cmd(0,0,0,32'h0,32'h0); // end chain with zero samples, should keep us out of error |