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authorjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2009-07-14 17:21:04 +0000
committerjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2009-07-14 17:21:04 +0000
commit569ef2d1e0030c41098b5501eefef6b8c6f220bb (patch)
tree422a3d0d7f1a34f5b23b6bbbec0e038eb78154b9
parent0e3a462242cdcb2e664cbc87db84636bd545c774 (diff)
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Revert erroneous file included in r11424
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@11425 221aa14e-8319-0410-a670-987f0aec2ac5
-rw-r--r--toplevel/usrp_std/usrp_std.qsf9
1 files changed, 3 insertions, 6 deletions
diff --git a/toplevel/usrp_std/usrp_std.qsf b/toplevel/usrp_std/usrp_std.qsf
index 2ef4727e3..e0bac4893 100644
--- a/toplevel/usrp_std/usrp_std.qsf
+++ b/toplevel/usrp_std/usrp_std.qsf
@@ -27,7 +27,7 @@
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003"
-set_global_assignment -name LAST_QUARTUS_VERSION 8.1
+set_global_assignment -name LAST_QUARTUS_VERSION "7.1 SP1"
# Pin & Location Assignments
# ==========================
@@ -368,7 +368,7 @@ set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk
# end ENTITY(usrp_std)
# --------------------
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k_18.v
set_global_assignment -name VERILOG_FILE ../../sdr_lib/atr_delay.v
@@ -406,7 +406,4 @@ set_global_assignment -name VERILOG_FILE usrp_std.v
set_global_assignment -name VERILOG_FILE ../../sdr_lib/clk_divider.v
set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v
set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v
-set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v
-set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
-set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" \ No newline at end of file
+set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v \ No newline at end of file