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author | Matt Ettus <matt@ettus.com> | 2011-05-13 12:47:52 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2011-06-08 10:52:52 -0700 |
commit | e0654430583fb4980165adbcfd04aa9bf04c429b (patch) | |
tree | d28f502d07efbcf84182c3faed7f91b05bbbb88a | |
parent | f2ea250dc491c284bbfa895c79a44e5f4f34c484 (diff) | |
download | uhd-e0654430583fb4980165adbcfd04aa9bf04c429b.tar.gz uhd-e0654430583fb4980165adbcfd04aa9bf04c429b.tar.bz2 uhd-e0654430583fb4980165adbcfd04aa9bf04c429b.zip |
dsp: use round_sd in small_hb_dec
-rw-r--r-- | usrp2/sdr_lib/small_hb_dec.v | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/usrp2/sdr_lib/small_hb_dec.v b/usrp2/sdr_lib/small_hb_dec.v index 151b8c287..ecafc2b68 100644 --- a/usrp2/sdr_lib/small_hb_dec.v +++ b/usrp2/sdr_lib/small_hb_dec.v @@ -107,13 +107,16 @@ module small_hb_dec accum <= accum + {prod}; wire [17:0] accum_rnd; - round #(.bits_in(36),.bits_out(18)) round_acc (.in(accum),.out(accum_rnd)); + wire stb_round; + + round_sd #(.WIDTH_IN(36),.WIDTH_OUT(18)) round_acc + (.clk(clk), .reset(rst), .in(accum), .strobe_in(go_d4), .out(accum_rnd), .strobe_out(stb_round)); reg [17:0] final_sum; always @(posedge clk) if(bypass) final_sum <= data_in_d1; - else if(go_d4) + else if(stb_round) final_sum <= accum_rnd; assign data_out = final_sum; @@ -124,5 +127,5 @@ module small_hb_dec else if(bypass) stb_out <= stb_in_d1; else - stb_out <= go_d4; + stb_out <= stb_round; endmodule // small_hb_dec |