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| author | Nick Foster <nick@nerdnetworks.org> | 2011-09-19 16:36:07 -0700 |
|---|---|---|
| committer | Nick Foster <nick@nerdnetworks.org> | 2011-09-19 16:36:07 -0700 |
| commit | 5a475ae9f1a1cbd1a6718cdf92de1712537e46f6 (patch) | |
| tree | a1bb3c01713836e996f2b27781bf7d79dddb0c8e | |
| parent | c218450c0067a0735034af2cdd740d39d90e843f (diff) | |
| download | uhd-5a475ae9f1a1cbd1a6718cdf92de1712537e46f6.tar.gz uhd-5a475ae9f1a1cbd1a6718cdf92de1712537e46f6.tar.bz2 uhd-5a475ae9f1a1cbd1a6718cdf92de1712537e46f6.zip | |
B100: use gpif_misc on R2 hw, invert direction of gpif_misc pins
| -rw-r--r-- | usrp2/top/B100/B100.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/top/B100/B100.v b/usrp2/top/B100/B100.v index fa3ea70eb..f2d75c54e 100644 --- a/usrp2/top/B100/B100.v +++ b/usrp2/top/B100/B100.v @@ -24,7 +24,7 @@ module B100 // GPIF inout [15:0] GPIF_D, input [3:0] GPIF_CTL, output [3:0] GPIF_RDY, - input [1:0] GPIF_ADR, input GPIF_CS, input GPIF_SLOE, input GPIF_PKTEND, + input [1:0] GPIF_ADR, output GPIF_CS, output GPIF_SLOE, output GPIF_PKTEND, input IFCLK, inout SDA_FPGA, inout SCL_FPGA, // I2C @@ -157,7 +157,7 @@ module B100 .debug_led(debug_led), .debug(debug), .debug_clk(debug_clk), .debug_txd(), .debug_rxd(1'b1), .gpif_d(GPIF_D), .gpif_ctl(GPIF_CTL), .gpif_rdy(GPIF_RDY), - //.gpif_misc({GPIF_ADR[1:0],GPIF_CS,GPIF_SLOE,GPIF_PKTEND}), + .gpif_misc({GPIF_CS,GPIF_SLOE,GPIF_PKTEND}), .gpif_clk(IFCLK), .db_sda(SDA_FPGA), .db_scl(SCL_FPGA), |