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| author | Josh Blum <josh@joshknows.com> | 2011-06-17 09:44:07 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-06-17 09:44:07 -0700 |
| commit | a984d9059a9cd405b18815f5e7669fbd0b0fa555 (patch) | |
| tree | 9f439189a231157d44b4c8cfc82157c2db94df4c | |
| parent | 5f49df7cab3cf4e726771178a87201f884947a6e (diff) | |
| download | uhd-a984d9059a9cd405b18815f5e7669fbd0b0fa555.tar.gz uhd-a984d9059a9cd405b18815f5e7669fbd0b0fa555.tar.bz2 uhd-a984d9059a9cd405b18815f5e7669fbd0b0fa555.zip | |
b100: tweaks to get dsp branch working
| -rw-r--r-- | host/lib/usrp/b100/b100_ctrl.cpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/b100/b100_impl.hpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/host/lib/usrp/b100/b100_ctrl.cpp b/host/lib/usrp/b100/b100_ctrl.cpp index 2e5afcae3..70decd4c1 100644 --- a/host/lib/usrp/b100/b100_ctrl.cpp +++ b/host/lib/usrp/b100/b100_ctrl.cpp @@ -198,7 +198,7 @@ void b100_ctrl_impl::viking_marauder_loop(boost::barrier &spawn_barrier) { const boost::uint32_t *vrt_hdr = rbuf->cast<const boost::uint32_t *>(); vrt::if_hdr_unpack_le(vrt_hdr, if_packet_info); - if( if_packet_info.sid == 0 + if( if_packet_info.sid == B100_ASYNC_SID and if_packet_info.packet_type != vrt::if_packet_info_t::PACKET_TYPE_DATA){ //fill in the async metadata async_metadata_t metadata; @@ -222,7 +222,7 @@ void b100_ctrl_impl::viking_marauder_loop(boost::barrier &spawn_barrier) { async_msg_fifo.push_with_pop_on_full(metadata); continue; } - throw uhd::runtime_error("Control: unknown async response"); + UHD_MSG(error) << "Control: unknown async response" << std::endl; } } } diff --git a/host/lib/usrp/b100/b100_impl.hpp b/host/lib/usrp/b100/b100_impl.hpp index 9d4314694..2cea57eb5 100644 --- a/host/lib/usrp/b100/b100_impl.hpp +++ b/host/lib/usrp/b100/b100_impl.hpp @@ -37,7 +37,7 @@ static const std::string B100_FW_FILE_NAME = "usrp_b100_fw.bin"; static const std::string B100_FPGA_FILE_NAME = "usrp_b100_fpga.bin"; static const boost::uint16_t B100_FW_COMPAT_NUM = 0x02; -static const boost::uint16_t B100_FPGA_COMPAT_NUM = 0x04; +static const boost::uint16_t B100_FPGA_COMPAT_NUM = 0x05; static const size_t B100_NUM_RX_DSPS = 2; static const size_t B100_NUM_TX_DSPS = 1; static const boost::uint32_t B100_DSP_SID_BASE = 2; //leave room for other dsp (increments by 1) |