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author | Matt Ettus <matt@ettus.com> | 2010-11-09 18:26:02 -0800 |
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committer | Matt Ettus <matt@ettus.com> | 2010-11-09 18:26:02 -0800 |
commit | 9cd8652b42b5afcba67ef0475e5681b951fe0bdc (patch) | |
tree | e27d60f49b894b206a7be2b119dd216f7469de3b | |
parent | 57fcaa242088516813a178713f9316e8ef7657a1 (diff) | |
download | uhd-9cd8652b42b5afcba67ef0475e5681b951fe0bdc.tar.gz uhd-9cd8652b42b5afcba67ef0475e5681b951fe0bdc.tar.bz2 uhd-9cd8652b42b5afcba67ef0475e5681b951fe0bdc.zip |
invert led signals because they are active low
-rw-r--r-- | usrp2/top/u1e/u1e_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u1e/u1e_core.v b/usrp2/top/u1e/u1e_core.v index 256146a99..e7e798b34 100644 --- a/usrp2/top/u1e/u1e_core.v +++ b/usrp2/top/u1e/u1e_core.v @@ -344,7 +344,7 @@ module u1e_core assign rx_enable = xfer_rate[14]; assign rate = xfer_rate[7:0]; - assign { debug_led[3:0] } = {run_rx,run_tx,reg_leds[1:0]}; + assign { debug_led[3:0] } = ~{run_rx,run_tx,reg_leds[1:0]}; assign { cgen_sync_b, cgen_ref_sel } = reg_cgen_ctrl; assign s0_dat_miso = (s0_adr[6:0] == REG_LEDS) ? reg_leds : |