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author | Josh Blum <josh@joshknows.com> | 2011-01-25 14:13:21 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2011-01-25 14:13:21 -0800 |
commit | 3db02acdfd44b22c05eaafe66e751f8fbfb29dcd (patch) | |
tree | 8423823c3a6e19dd54fc463d253aa68054c3fc76 | |
parent | 135ff0a63c05a506e03a6badc1cb5378a76110af (diff) | |
download | uhd-3db02acdfd44b22c05eaafe66e751f8fbfb29dcd.tar.gz uhd-3db02acdfd44b22c05eaafe66e751f8fbfb29dcd.tar.bz2 uhd-3db02acdfd44b22c05eaafe66e751f8fbfb29dcd.zip |
usrp-e100: added misc test register 32 bits
-rw-r--r-- | host/lib/usrp/usrp_e100/usrp_e100_regs.hpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp b/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp index 05d27be11..7dc3a4ba8 100644 --- a/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp +++ b/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp @@ -112,6 +112,7 @@ #define UE_REG_RB_TIME_NOW_TICKS UE_REG_RB_MUX_32_BASE + 4 #define UE_REG_RB_TIME_PPS_SECS UE_REG_RB_MUX_32_BASE + 8 #define UE_REG_RB_TIME_PPS_TICKS UE_REG_RB_MUX_32_BASE + 12 +#define UE_REG_RB_MISC_TEST32 UE_REG_RB_MUX_32_BASE + 16 //////////////////////////////////////////////////// // Slave 8 -- Settings Bus @@ -122,6 +123,8 @@ #define UE_REG_SETTINGS_BASE_ADDR(n) (UE_REG_SLAVE(8) + (4*(n))) +#define UE_REG_SR_MISC_TEST32 UE_REG_SETTINGS_BASE_ADDR(52) + ///////////////////////////////////////////////// // DSP RX Regs //////////////////////////////////////////////// |