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author | Josh Blum <josh@joshknows.com> | 2010-12-21 17:27:46 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-12-21 17:27:46 -0800 |
commit | 64293ea66b52ad00cfc6862d39d0b16f0a1a63b0 (patch) | |
tree | bb4fd066c7992098c86a5603535b70c00650e76b | |
parent | 6dbdffd226139b3a780f3894a46b844869956571 (diff) | |
download | uhd-64293ea66b52ad00cfc6862d39d0b16f0a1a63b0.tar.gz uhd-64293ea66b52ad00cfc6862d39d0b16f0a1a63b0.tar.bz2 uhd-64293ea66b52ad00cfc6862d39d0b16f0a1a63b0.zip |
udp_ports: fixed address comparison B+14 is comparison
-rw-r--r-- | usrp2/udp/prot_eng_tx.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/udp/prot_eng_tx.v b/usrp2/udp/prot_eng_tx.v index 76250029c..c642842f6 100644 --- a/usrp2/udp/prot_eng_tx.v +++ b/usrp2/udp/prot_eng_tx.v @@ -55,7 +55,7 @@ module prot_eng_tx header_ram[set_addr[4:0]] <= set_data; always @(posedge clk) - if(set_stb & ((set_addr[4:0] & 8'hE0) == (BASE + 14))) + if(set_stb & (set_addr == (BASE + 14))) chk_precompute <= set_data[15:0]; always @(posedge clk) |