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author | Matt Ettus <matt@ettus.com> | 2010-10-11 16:40:25 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-10-11 16:40:25 -0700 |
commit | 41489884015ceb3dd2d4731ece813445d20629d3 (patch) | |
tree | c25cb314dbf2d679932cb81f6622f69aa14b2629 | |
parent | e650ed086c68c9e3458c91817fd0b01da261cd57 (diff) | |
download | uhd-41489884015ceb3dd2d4731ece813445d20629d3.tar.gz uhd-41489884015ceb3dd2d4731ece813445d20629d3.tar.bz2 uhd-41489884015ceb3dd2d4731ece813445d20629d3.zip |
increase compatibility number for flow control
-rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index 809218a75..d2bc01d6d 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -427,7 +427,7 @@ module u2_core cycle_count <= cycle_count + 1; //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = 32'd2; + localparam compat_num = 32'd3; wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), |