Merge branch 'master' of git@ettus.sourcerepo.com:ettus/uhdpriv into usrp2p

Conflicts:

	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_regs.hpp

7 files changed, 134 insertions, 4 deletions

diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c
index 4e03bc869..092d216aa 100644
--- a/firmware/microblaze/apps/txrx_uhd.c
+++ b/firmware/microblaze/apps/txrx_uhd.c
@@ -483,7 +483,7 @@ main(void)
     int pending = pic_regs->pending;		// poll for under or overrun
 
     if (pending & PIC_UNDERRUN_INT){
-      dbsm_handle_tx_underrun(&dsp_tx_sm);
+      //dbsm_handle_tx_underrun(&dsp_tx_sm);
       pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
       putchar('U');
     }
diff --git a/host/examples/CMakeLists.txt b/host/examples/CMakeLists.txt
index 5071b114f..10a9a833a 100644
--- a/host/examples/CMakeLists.txt
+++ b/host/examples/CMakeLists.txt
@@ -15,6 +15,10 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 #
 
+
+ADD_EXECUTABLE(tx_continuous_samples tx_continuous_samples.cpp)
+TARGET_LINK_LIBRARIES(tx_continuous_samples uhd)
+
 ADD_EXECUTABLE(benchmark_rx_rate benchmark_rx_rate.cpp)
 TARGET_LINK_LIBRARIES(benchmark_rx_rate uhd)
 
@@ -25,6 +29,7 @@ ADD_EXECUTABLE(tx_timed_samples tx_timed_samples.cpp)
 TARGET_LINK_LIBRARIES(tx_timed_samples uhd)
 
 INSTALL(TARGETS
+    tx_continuous_samples
     benchmark_rx_rate
     rx_timed_samples
     tx_timed_samples
diff --git a/host/examples/tx_continuous_samples.cpp b/host/examples/tx_continuous_samples.cpp
new file mode 100644
index 000000000..cf70b07fb
--- /dev/null
+++ b/host/examples/tx_continuous_samples.cpp
@@ -0,0 +1,110 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include <uhd/utils/thread_priority.hpp>
+#include <uhd/utils/safe_main.hpp>
+#include <uhd/usrp/simple_usrp.hpp>
+#include <boost/program_options.hpp>
+#include <boost/thread/thread_time.hpp> //system time
+#include <boost/format.hpp>
+#include <iostream>
+#include <complex>
+
+namespace po = boost::program_options;
+
+int UHD_SAFE_MAIN(int argc, char *argv[]){
+    uhd::set_thread_priority_safe();
+
+    //variables to be set by po
+    std::string args;
+    size_t total_duration;
+    size_t samps_per_packet;
+    double tx_rate, freq;
+    float ampl;
+
+    //setup the program options
+    po::options_description desc("Allowed options");
+    desc.add_options()
+        ("help", "help message")
+        ("args", po::value<std::string>(&args)->default_value(""), "simple uhd device address args")
+        ("duration", po::value<size_t>(&total_duration)->default_value(3), "number of seconds to transmit")
+        ("spp", po::value<size_t>(&samps_per_packet)->default_value(1000), "number of samples per packet")
+        ("txrate", po::value<double>(&tx_rate)->default_value(100e6/16), "rate of outgoing samples")
+        ("freq", po::value<double>(&freq)->default_value(0), "rf center frequency in Hz")
+        ("ampl", po::value<float>(&ampl)->default_value(float(0.3)), "amplitude of each sample")
+        ("dilv", "specify to disable inner-loop verbose")
+    ;
+    po::variables_map vm;
+    po::store(po::parse_command_line(argc, argv, desc), vm);
+    po::notify(vm);
+
+    //print the help message
+    if (vm.count("help")){
+        std::cout << boost::format("UHD TX Continuous Samples %s") % desc << std::endl;
+        return ~0;
+    }
+
+    bool verbose = vm.count("dilv") == 0;
+
+    //create a usrp device
+    std::cout << std::endl;
+    std::cout << boost::format("Creating the usrp device with: %s...") % args << std::endl;
+    uhd::usrp::simple_usrp::sptr sdev = uhd::usrp::simple_usrp::make(args);
+    uhd::device::sptr dev = sdev->get_device();
+    std::cout << boost::format("Using Device: %s") % sdev->get_pp_string() << std::endl;
+
+    //set properties on the device
+    std::cout << boost::format("Setting TX Rate: %f Msps...") % (tx_rate/1e6) << std::endl;
+    sdev->set_tx_rate(tx_rate);
+    std::cout << boost::format("Actual TX Rate: %f Msps...") % (sdev->get_tx_rate()/1e6) << std::endl;
+    sdev->set_tx_freq(freq);
+
+    //allocate data to send
+    std::vector<std::complex<float> > buff(samps_per_packet, std::complex<float>(ampl, ampl));
+
+    //setup the metadata flags
+    uhd::tx_metadata_t md;
+    md.start_of_burst = true; //always SOB (good for continuous streaming)
+    md.end_of_burst   = false;
+
+    //send the data in multiple packets
+    boost::system_time end_time(boost::get_system_time() + boost::posix_time::seconds(total_duration));
+    while(end_time > boost::get_system_time()){
+        //send samples per packet (driver fragments internally)
+        size_t num_tx_samps = dev->send(
+            &buff.front(), samps_per_packet, md,
+            uhd::io_type_t::COMPLEX_FLOAT32,
+            uhd::device::SEND_MODE_FULL_BUFF
+        );
+        if(verbose) std::cout << std::endl << boost::format("Sent %d samples") % num_tx_samps << std::endl;
+    }
+
+    //send a mini EOB packet
+    if(verbose) std::cout << std::endl << boost::format("Sending packet with end-of-burst") << std::endl;
+    md.start_of_burst = false;
+    md.end_of_burst   = true;
+    dev->send(
+        NULL, 0, md,
+        uhd::io_type_t::COMPLEX_FLOAT32,
+        uhd::device::SEND_MODE_FULL_BUFF
+    );
+
+    //finished
+    std::cout << std::endl << "Done!" << std::endl << std::endl;
+
+    return 0;
+}
diff --git a/host/include/uhd/transport/alignment_buffer.ipp b/host/include/uhd/transport/alignment_buffer.ipp
index ed7cfd26c..61b3b60f5 100644
--- a/host/include/uhd/transport/alignment_buffer.ipp
+++ b/host/include/uhd/transport/alignment_buffer.ipp
@@ -57,12 +57,15 @@ namespace uhd{ namespace transport{ namespace{ /*anon*/
             std::vector<elem_type> &elems,
             const time_duration_t &time
         ){
+            boost::system_time exit_time = boost::get_system_time() + time;
             buff_contents_type buff_contents_tmp;
             std::list<size_t> indexes_to_do(_all_indexes);
 
             //do an initial pop to load an initial sequence id
             size_t index = indexes_to_do.front();
-            if (not _buffs[index]->pop_with_timed_wait(buff_contents_tmp, time)) return false;
+            if (not _buffs[index]->pop_with_timed_wait(
+                buff_contents_tmp, exit_time - boost::get_system_time()
+            )) return false;
             elems[index] = buff_contents_tmp.first;
             seq_type expected_seq_id = buff_contents_tmp.second;
             indexes_to_do.pop_front();
@@ -75,7 +78,9 @@ namespace uhd{ namespace transport{ namespace{ /*anon*/
                     _there_was_a_clear = false;
                     indexes_to_do = _all_indexes;
                     index = indexes_to_do.front();
-                    if (not _buffs[index]->pop_with_timed_wait(buff_contents_tmp, time)) return false;
+                    if (not _buffs[index]->pop_with_timed_wait(
+                        buff_contents_tmp, exit_time - boost::get_system_time()
+                    )) return false;
                     elems[index] = buff_contents_tmp.first;
                     expected_seq_id = buff_contents_tmp.second;
                     indexes_to_do.pop_front();
@@ -83,7 +88,9 @@ namespace uhd{ namespace transport{ namespace{ /*anon*/
 
                 //pop an element off for this index
                 index = indexes_to_do.front();
-                if (not _buffs[index]->pop_with_timed_wait(buff_contents_tmp, time)) return false;
+                if (not _buffs[index]->pop_with_timed_wait(
+                    buff_contents_tmp, exit_time - boost::get_system_time()
+                )) return false;
 
                 //if the sequence id matches:
                 //  store the popped element into the output,
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 7243880f3..c8e22a709 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -89,6 +89,7 @@ usrp2_mboard_impl::usrp2_mboard_impl(
     _iface->poke32(_iface->regs.tx_ctrl_num_chan, 0);    //1 channel
     _iface->poke32(_iface->regs.tx_ctrl_clear_state, 1); //reset
     _iface->poke32(_iface->regs.tx_ctrl_report_sid, 1);  //sid 1 (different from rx)
+    _iface->poke32(_iface->regs.tx_ctrl_policy, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET);
 
     //init the ddc
     init_ddc_config();
diff --git a/host/lib/usrp/usrp2/usrp2_regs.cpp b/host/lib/usrp/usrp2/usrp2_regs.cpp
index e40407f99..857fbda9c 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.cpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.cpp
@@ -92,6 +92,7 @@ usrp2_regs_t usrp2_get_regs(int hw_rev) {
   x.tx_ctrl_num_chan = sr_addr(misc_output_base, x.sr_tx_ctrl + 0);
   x.tx_ctrl_clear_state = sr_addr(misc_output_base, x.sr_tx_ctrl + 1);
   x.tx_ctrl_report_sid = sr_addr(misc_output_base, x.sr_tx_ctrl + 2);
+  x.tx_ctrl_policy = sr_addr(misc_output_base, x.sr_tx_ctrl + 3);
 
   return x;
 }
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 8dbd6c4b4..c12098c8e 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -97,6 +97,7 @@ typedef struct {
   int tx_ctrl_num_chan;
   int tx_ctrl_clear_state;
   int tx_ctrl_report_sid;
+  int tx_ctrl_policy;
 } usrp2_regs_t;
 
 extern const usrp2_regs_t usrp2_regs; //the register definitions, set in usrp2_regs.cpp and usrp2p_regs.cpp
@@ -261,5 +262,10 @@ usrp2_regs_t usrp2_get_regs(int hw_rev);
 //#define U2_REG_TX_CTRL_NUM_CHAN          _SR_ADDR(SR_TX_CTRL + 0)
 //#define U2_REG_TX_CTRL_CLEAR_STATE       _SR_ADDR(SR_TX_CTRL + 1)
 //#define U2_REG_TX_CTRL_REPORT_SID        _SR_ADDR(SR_TX_CTRL + 2)
+//#define U2_REG_TX_CTRL_POLICY            _SR_ADDR(SR_TX_CTRL + 3)
+
+#define U2_FLAG_TX_CTRL_POLICY_WAIT          (0x1 << 0)
+#define U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET   (0x1 << 1)
+#define U2_FLAG_TX_CTRL_POLICY_NEXT_BURST    (0x1 << 2)
 
 #endif /* INCLUDED_USRP2_REGS_HPP */