Deleted manually those files to correspond with USRP2P branch.

63 files changed, 180 insertions, 8748 deletions

diff --git a/firmware/microblaze/apps/.gitignore b/firmware/microblaze/apps/.gitignore
deleted file mode 100644
index 968b04cd7..000000000
--- a/firmware/microblaze/apps/.gitignore
+++ /dev/null
@@ -1,8 +0,0 @@
-/*.elf
-/*.bin
-/*.dump
-/*.log
-/*.rom
-/*.map
-/Makefile
-/Makefile.in
diff --git a/firmware/microblaze/apps/Makefile.am b/firmware/microblaze/apps/Makefile.am
deleted file mode 100644
index a4f79935b..000000000
--- a/firmware/microblaze/apps/Makefile.am
+++ /dev/null
@@ -1,82 +0,0 @@
-#
-# Copyright 2010 Ettus Research LLC
-#
-# Copyright 2007,2008 Free Software Foundation, Inc.
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-include $(top_srcdir)/Makefile.common
-
-LDADD = $(top_srcdir)/lib/libu2fw.a
-
-AM_CFLAGS += -I$(top_srcdir)/../../host/lib/usrp
-
-noinst_PROGRAMS = txrx_uhd.elf
-
-#	blink_leds \
-#	blink_leds2 \
-#	buf_ram_test \
-#	burn_dbsrx_eeprom \
-#	can_i_sub \
-#	echo \
-#	hello \
-#	read_dbids \
-#	set_hw_rev \
-#	test1 \
-#	test_db_spi \
-#	test_i2c \
-#	test_sd \
-#	test_ram \
-#	test_phy_comm \
-#	test_lsadc \
-#	test_lsdac \
-#	timer_test \
-#	txrx \
-#	burnrev30 \
-#	burnrev31 \
-#	burnrev40 \
-#	sd_gentest \
-#	sd_bounce
-#
-
-#nononono =  \
-#	eth_serdes \
-#	gen_eth_packets \
-#	rcv_eth_packets \
-#	tx_standalone \
-#	factory_test \
-#	serdes_txrx \
-#	mimo_tx \
-#	mimo_tx_slave \
-#	ibs_rx_test \
-#	ibs_tx_test
-
-# tx_drop_SOURCES = tx_drop.c app_common.c
-# tx_drop_rate_limited_SOURCES = tx_drop_rate_limited.c app_common.c
-# tx_drop2_SOURCES = tx_drop2.c app_common.c
-txrx_uhd_elf_SOURCES = txrx_uhd.c
-# app_common_v2.c
-#factory_test_SOURCES = factory_test.c app_common_v2.c
-#eth_serdes_SOURCES = eth_serdes.c app_passthru_v2.c
-#serdes_txrx_SOURCES = serdes_txrx.c app_common_v2.c
-#mimo_tx_SOURCES = mimo_tx.c mimo_app_common_v2.c
-#mimo_tx_slave_SOURCES = mimo_tx_slave.c app_common_v2.c
-
-#noinst_HEADERS = \
-#        app_common_v2.h \
-#        app_passthru_v2.h \
-#        mimo_app_common_v2.h
-#
-
diff --git a/firmware/microblaze/apps/app_passthru_v2.c b/firmware/microblaze/apps/app_passthru_v2.c
deleted file mode 100644
index 406c56b3b..000000000
--- a/firmware/microblaze/apps/app_passthru_v2.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "app_passthru_v2.h"
-#include "buffer_pool.h"
-#include "memcpy_wa.h"
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "print_rmon_regs.h"
-#include "db.h"
-#include "clocks.h"
-#include <string.h>
-
-volatile bool link_is_up = false;	// eth handler sets this
-
-
-// If this is non-zero, this dbsm could be writing to the ethernet
-dbsm_t *ac_could_be_sending_to_eth;
-
-//static unsigned char exp_seqno = 0;
-
-void
-set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt)
-{
-  reply_pkt->ehdr.dst = cmd_pkt->ehdr.src;
-  reply_pkt->ehdr.src = *ethernet_mac_addr();
-  reply_pkt->ehdr.ethertype = U2_ETHERTYPE;
-  reply_pkt->thdr.flags = 0;
-  reply_pkt->thdr.fifo_status = 0;	// written by protocol engine
-  reply_pkt->thdr.seqno = 0;		// written by protocol engine
-  reply_pkt->thdr.ack = 0;		// written by protocol engine
-  u2p_set_word0(&reply_pkt->fixed, 0, CONTROL_CHAN);
-  reply_pkt->fixed.timestamp = timer_regs->time;
-}
-
-static void
-send_reply(unsigned char *reply, size_t reply_len)
-{
-  if (reply_len < 64)
-    reply_len = 64;
-
-  // wait for buffer to become idle
-  hal_set_leds(0x4, 0x4);
-  while((buffer_pool_status->status & BPS_IDLE(CPU_TX_BUF)) == 0)
-    ;
-  hal_set_leds(0x0, 0x4);
-
-  // copy reply into CPU_TX_BUF
-  memcpy_wa(buffer_ram(CPU_TX_BUF), reply, reply_len);
-
-  // wait until nobody else is sending to the ethernet
-  if (ac_could_be_sending_to_eth){
-    hal_set_leds(0x8, 0x8);
-    dbsm_wait_for_opening(ac_could_be_sending_to_eth);
-    hal_set_leds(0x0, 0x8);
-  }
-
-  // fire it off
-  bp_send_from_buf(CPU_TX_BUF, PORT_ETH, 1, 0, reply_len/4);
-
-  // wait for it to complete (not long, it's a small pkt)
-  while((buffer_pool_status->status & (BPS_DONE(CPU_TX_BUF) | BPS_ERROR(CPU_TX_BUF))) == 0)
-    ;
-
-  bp_clear_buf(CPU_TX_BUF);
-}
-
-
-static size_t
-op_id_cmd(const op_generic_t *p,
-	  void *reply_payload, size_t reply_payload_space)
-{
-  op_id_reply_t *r = (op_id_reply_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))	// no room
-    return 0;
-
-  // Build reply subpacket
-
-  r->opcode = OP_ID_REPLY;
-  r->len = sizeof(op_id_reply_t);
-  r->rid = p->rid;
-  r->addr = *ethernet_mac_addr();
-  r->hw_rev = 0x0000;	// FIXME
-  // r->fpga_md5sum = ;	// FIXME
-  // r->sw_md5sum = ;	// FIXME
-
-  // FIXME Add d'board info, including dbid, min/max gain, min/max freq
-
-  return r->len;
-}
-
-static size_t
-add_eop(void *reply_payload, size_t reply_payload_space)
-{
-  op_generic_t *r = (op_generic_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))		
-    return 0;					// no room
-
-  r->opcode = OP_EOP;
-  r->len = sizeof(*r);
-  r->rid = 0;
-  r->ok =  0;
-
-  return r->len;
-}
-
-bool
-handle_control_chan_frame(u2_eth_packet_t *pkt, size_t len)
-{
-  unsigned char reply[sizeof(u2_eth_packet_t) + 4 * sizeof(u2_subpkt_t)] _AL4;
-  unsigned char *reply_payload = &reply[sizeof(u2_eth_packet_t)];
-  int reply_payload_space = sizeof(reply) - sizeof(u2_eth_packet_t);
-
-  bool handled_it = false;
-
-  // initialize reply
-  memset(reply, 0, sizeof(reply));
-  set_reply_hdr((u2_eth_packet_t *) reply, pkt);
-
-  // point to beginning of payload (subpackets)
-  unsigned char *payload = ((unsigned char *) pkt) + sizeof(u2_eth_packet_t);
-  int payload_len = len - sizeof(u2_eth_packet_t);
-
-  size_t subpktlen = 0;
-
-  while (payload_len >= sizeof(op_generic_t)){
-    const op_generic_t *gp = (const op_generic_t *) payload;
-    subpktlen = 0;
-
-    switch(gp->opcode){
-    case OP_EOP:		// end of subpackets
-      goto end_of_subpackets;
-
-    case OP_ID:
-      subpktlen = op_id_cmd(gp, reply_payload, reply_payload_space);
-      handled_it = true;
-      break;
-
-    default:
-      if (0){
-	printf("\npassing on %d\n", gp->opcode);
-      }
-      break;
-    }
-
-    int t = (gp->len + 3) & ~3;		// bump to a multiple of 4
-    payload += t;
-    payload_len -= t;
-
-    subpktlen = (subpktlen + 3) & ~3;	// bump to a multiple of 4
-    reply_payload += subpktlen;
-    reply_payload_space -= subpktlen;
-  }
-
- end_of_subpackets:
-
-  if (handled_it){
-    // add the EOP marker
-    subpktlen = add_eop(reply_payload, reply_payload_space);
-    subpktlen = (subpktlen + 3) & ~3;	// bump to a multiple of 4
-    reply_payload += subpktlen;
-    reply_payload_space -= subpktlen;
-
-    send_reply(reply, reply_payload - reply);
-  }
-
-  return handled_it;
-}
-
-
-/*
- * Called when an ethernet packet is received.
- * Return true if we handled it here, otherwise
- * it'll be passed on to the DSP Tx pipe
- */
-bool
-eth_pkt_inspector(dbsm_t *sm, int bufno)
-{
-  u2_eth_packet_t *pkt = (u2_eth_packet_t *) buffer_ram(bufno);
-  size_t byte_len = (buffer_pool_status->last_line[bufno] - 3) * 4;
-
-  //static size_t last_len = 0;
-
-  // hal_toggle_leds(0x1);
-
-  // inspect rcvd frame and figure out what do do.
-
-  if (pkt->ehdr.ethertype != U2_ETHERTYPE)
-    return true;	// ignore, probably bogus PAUSE frame from MAC
-
-  int chan = u2p_chan(&pkt->fixed);
-
-  switch (chan){
-  case CONTROL_CHAN:
-    return handle_control_chan_frame(pkt, byte_len);
-    break;
-
-  case 0:
-  default:
-#if 0
-    if (last_len != 0){
-      if (byte_len != last_len){
-	printf("Len: %d last: %d\n", byte_len, last_len);
-      }
-    }
-    last_len = byte_len;
-
-    if((pkt->thdr.seqno) == exp_seqno){
-      exp_seqno++;
-      //putchar('.');
-    }
-    else {
-      // putchar('S');
-      //printf("S%d %d ",exp_seqno,pkt->thdr.seqno);
-      exp_seqno = pkt->thdr.seqno + 1;
-    }
-#endif
-    return false;	// pass it on to Tx DSP
-    break;
-  }
-}
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  link_is_up = speed != 0;
-  hal_set_leds(link_is_up ? LED_RJ45 : 0x0, LED_RJ45);
-  printf("\neth link changed: speed = %d\n", speed);
-}
diff --git a/firmware/microblaze/apps/app_passthru_v2.h b/firmware/microblaze/apps/app_passthru_v2.h
deleted file mode 100644
index 3904c670f..000000000
--- a/firmware/microblaze/apps/app_passthru_v2.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_APP_COMMON_H
-#define INCLUDED_APP_COMMON_H
-
-#include <stdbool.h>
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include <stddef.h>
-#include <db.h>
-
-#define CPU_TX_BUF 	7	// cpu -> eth
-
-#define	_AL4 __attribute__((aligned (4)))
-
-extern volatile bool link_is_up;	// eth handler sets this
-
-
-// If there's a dbsm that sends to the ethernet, put it's address here
-extern dbsm_t *ac_could_be_sending_to_eth;
-
-
-void set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt);
-
-/*
- * Called when an ethernet packet is received.
- * Return true if we handled it here, otherwise
- * it'll be passed on to the DSP Tx pipe
- */
-bool eth_pkt_inspector(dbsm_t *sm, int bufno);
-
-void link_changed_callback(int speed);
-
-bool handle_control_chan_frame(u2_eth_packet_t *pkt, size_t len);
-
-#endif /* INCLUDED_APP_COMMON_H */
diff --git a/firmware/microblaze/apps/blink_leds.c b/firmware/microblaze/apps/blink_leds.c
deleted file mode 100644
index 682ca8db2..000000000
--- a/firmware/microblaze/apps/blink_leds.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include "nonstdio.h"
-
-int
-main(void)
-{
-  int	counter = 0;
-
-  u2_init();
-  
-  putstr("blink_leds\n");
-  while(1){
-    output_regs->leds = (counter++ & 0x3);
-  }
-  
-  return 0;
-}
diff --git a/firmware/microblaze/apps/blink_leds2.c b/firmware/microblaze/apps/blink_leds2.c
deleted file mode 100644
index 13e78afb3..000000000
--- a/firmware/microblaze/apps/blink_leds2.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include "pic.h"
-#include "nonstdio.h"
-
-//#define DELTA_T  (MASTER_CLK_RATE/2)	// 0.5s (10ns per tick)
-#define DELTA_T  5000  		// 5 us (10ns per tick)
-
-
-void
-timer_handler(unsigned irq)
-{
-  hal_set_timeout(DELTA_T);	// schedule next timeout
-  hal_toggle_leds(0x2);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("blink_leds2\n");
-  pic_register_handler(IRQ_ONETIME, timer_handler);
-  hal_set_timeout(DELTA_T);	// schedule next timeout
-
-  while(1){
-    hal_toggle_leds(0x1);
-  }
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/buf_ram_test.c b/firmware/microblaze/apps/buf_ram_test.c
deleted file mode 100644
index 1aca2aec5..000000000
--- a/firmware/microblaze/apps/buf_ram_test.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include <stdbool.h>
-#include "nonstdio.h"
-#include "hal_io.h"
-#include "mdelay.h"
-
-
-static void
-write_bufs(void)
-{
-  int	i, n;
-  int	counter = 0;
-
-  for (n = 0; n < NBUFFERS; n++){
-    volatile int *p = buffer_ram(n);
-    for (i = 0; i < BP_NLINES; i++)
-      p[i] = counter++;
-  }
-}
-
-// return number of errors detected
-static int
-check_bufs(void)
-{
-  int	i, n;
-  int	counter = 0;
-  int	nerrors = 0;
-
-  for (n = 0; n < NBUFFERS; n++){
-    volatile int *p = buffer_ram(n);
-    for (i = 0; i < BP_NLINES; i++, counter++){
-      int rd = p[i];
-      if (rd != counter){
-	putchar('b');
-	putchar(n + '0');
-	putchar('[');
-	puthex16(i);
-	putstr("] exp: ");
-	puthex32(counter);
-	putstr(" got: ");
-	puthex32_nl(rd);
-	nerrors++;
-      }
-    }
-  }
-  return nerrors;
-}
-
-
-int
-main(void)
-{
-  u2_init();
-
-  output_regs->leds = 0;
-
-  write_bufs();
-  int nerrors = check_bufs();
-
-  if (nerrors == 0){
-    output_regs->leds = 0x3;		// leds on  -> PASS
-    putstr("PASS\n");
-  }
-  else {
-    output_regs->leds = 0x0;		// leds off -> FAIL
-    putstr("FAIL\n");
-  }
-
-  hal_finish();
-  return 0;
-}
diff --git a/firmware/microblaze/apps/burn_dbsrx_eeprom.c b/firmware/microblaze/apps/burn_dbsrx_eeprom.c
deleted file mode 100644
index 116d4d8d0..000000000
--- a/firmware/microblaze/apps/burn_dbsrx_eeprom.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "i2c.h"
-#include "usrp2_i2c_addr.h"
-#include "mdelay.h"
-#include "hal_io.h"
-#include "nonstdio.h"
-#include <stdbool.h>
-
-
-
-int read_dboard_eeprom(int i2c_addr);
-
-
-#define USRP_DBID_DBS_RX          	 0x0002
-#define USRP_DBID_DBS_RX_WITH_CLOCK_MOD  0x000d
-
-const char dbs_rx_rev2_eeprom[] = {
-  0xdb, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18
-};
-
-#define	LED_VALS   (LED_A | LED_B | LED_C | LED_D)
-#define	LED_MASK   (LED_A | LED_B | LED_C | LED_D)
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("\nburn_dbsrx_eeprom\n");
-
-  hal_set_leds(0, ~0);	// all off
-
-  int i2c_addr = I2C_ADDR_RX_A;
-  int dbid = read_dboard_eeprom(i2c_addr);
-  bool ok;
-  const char *msg = 0;
-
-  switch (dbid){
-  case -1:
-    msg = "No RX daughterboard found";
-    goto bad;
-
-  case -2:
-    msg = "Invalid RX EEPROM contents";
-    goto bad;
-
-  case USRP_DBID_DBS_RX_WITH_CLOCK_MOD:
-    msg = "RX Daughterboard already reports being a DBS RX w/ CLOCK_MOD";
-    goto good;
-
-  case USRP_DBID_DBS_RX:
-    // Says it's a DBS_RX, attempt to burn the EEPROM
-    ok = eeprom_write(i2c_addr, 0,
-		      dbs_rx_rev2_eeprom, sizeof(dbs_rx_rev2_eeprom));
-    if (ok){
-      msg = "Successfully programmed db as DBS RX Rev 2.1";
-      goto good;
-    }
-    else {
-      msg = "Failed to write daugherboard eeprom";
-      goto bad;
-    }
-
-  default:
-    msg = "Daughterboard is not a DBS RX; ignored";
-    goto bad;
-  }
-  
- good:
-  puts(msg);
-  hal_set_leds(LED_VALS, LED_MASK);
-  while (1)
-    ;
-
- bad:
-  puts(msg);
-  while(1){
-    hal_toggle_leds(LED_VALS);
-    mdelay(50);
-  }
-}
diff --git a/firmware/microblaze/apps/burnrev30.c b/firmware/microblaze/apps/burnrev30.c
deleted file mode 100644
index 40fa53e34..000000000
--- a/firmware/microblaze/apps/burnrev30.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common_v2.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <i2c.h>
-#include <usrp2_i2c_addr.h>
-#include <clocks.h>
-#include "sd.h"
-#include "mdelay.h"
-
-#define HW_REV_MAJOR 3
-#define HW_REV_MINOR 0
-
-int test_ram()
-{
-  int i,j,k;
-  output_regs->ram_page = 1<<10;
-  
-  extram[0] = 0xDEADBEEF;
-  extram[1] = 0xF00D1234;
-  extram[7] = 0x76543210;
-  
-  output_regs->ram_page = 2<<10;
-  extram[7] = 0x55555555;
-  extram[1] = 0xaaaaaaaa;
-  extram[0] = 0xeeeeeeee;
-  
-  output_regs->ram_page = 1<<10;
-  
-  i = extram[0];
-  k = extram[1];
-  j = extram[7];
-  
-  if((i != 0xDEADBEEF)||(j!=0x76543210)||(k!=0xF00D1234)) {
-    puts("RAM FAIL1!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  
-  output_regs->ram_page = 2<<10;
-
-  j = extram[7];
-  k = extram[1];
-  i = extram[0];
-
-  if((i != 0xeeeeeeee)||(j!=0x55555555)||(k!=0xaaaaaaaa)) {
-    puts("RAM FAIL2!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  return 1;
-}
-
-int test_sd()
-{
-  int i = sd_init();
-  if(i==0) {
-    puts("FAILED INIT of Card\n");
-    return 0;
-  }
-  
-  unsigned char buf[512];
-  i = sd_read_block(2048,buf);
-  if(i == 0) {
-    puts("READ Command Rejected\n");
-    return 0;
-  }
-  if((buf[0]==0xb8)&&(buf[1]==0x08)&&(buf[2]==0x00)&&(buf[3]==0x50))
-    ;
-  else {
-    puts("Read bad data from SD Card\n");
-    return 0;
-  }
-  return 1;
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nFactory Test, Board Rev 3.0\n");
-
-  bool ok = true;
-  unsigned char maj = HW_REV_MAJOR;
-  unsigned char min = HW_REV_MINOR;
-  ok = eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &maj, 1);
-  ok &= eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &min, 1);
-
-  putstr("\nset_hw_rev\n");
-  if (ok)
-    printf("OK: set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-  else {
-    printf("FAILED to set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-    hal_finish();
-    return 0;
-  }
-
-  if(test_sd())
-    puts("SD OK\n");
-  else {
-    puts("SD FAIL\n");
-    //hal_finish();
-    //return 0;
-  }
-  if(test_ram())
-    puts("RAM OK\n");
-  else {
-    puts("RAM FAIL\n");
-    hal_finish();
-    return 0;
-  }
-
-  print_mac_addr(ethernet_mac_addr()->addr);
-  newline();
-
-  clocks_mimo_config(MC_WE_LOCK_TO_SMA);
-
-  while (!clocks_lock_detect()) {
-    puts("No Lock");
-    mdelay(1000);
-  }
-  puts("Clock Locked\n");
-
-}
diff --git a/firmware/microblaze/apps/burnrev31.c b/firmware/microblaze/apps/burnrev31.c
deleted file mode 100644
index f6b08d187..000000000
--- a/firmware/microblaze/apps/burnrev31.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common_v2.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <i2c.h>
-#include <usrp2_i2c_addr.h>
-#include <clocks.h>
-#include "sd.h"
-#include "mdelay.h"
-
-#define HW_REV_MAJOR 3
-#define HW_REV_MINOR 1
-
-int test_ram()
-{
-  int i,j,k;
-  output_regs->ram_page = 1<<10;
-  
-  extram[0] = 0xDEADBEEF;
-  extram[1] = 0xF00D1234;
-  extram[7] = 0x76543210;
-  
-  output_regs->ram_page = 2<<10;
-  extram[7] = 0x55555555;
-  extram[1] = 0xaaaaaaaa;
-  extram[0] = 0xeeeeeeee;
-  
-  output_regs->ram_page = 1<<10;
-  
-  i = extram[0];
-  k = extram[1];
-  j = extram[7];
-  
-  if((i != 0xDEADBEEF)||(j!=0x76543210)||(k!=0xF00D1234)) {
-    puts("RAM FAIL1!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  
-  output_regs->ram_page = 2<<10;
-
-  j = extram[7];
-  k = extram[1];
-  i = extram[0];
-
-  if((i != 0xeeeeeeee)||(j!=0x55555555)||(k!=0xaaaaaaaa)) {
-    puts("RAM FAIL2!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  return 1;
-}
-
-int test_sd()
-{
-  int i = sd_init();
-  if(i==0) {
-    puts("FAILED INIT of Card\n");
-    return 0;
-  }
-  
-  unsigned char buf[512];
-  i = sd_read_block(2048,buf);
-  if(i == 0) {
-    puts("READ Command Rejected\n");
-    return 0;
-  }
-  if((buf[0]==0xb8)&&(buf[1]==0x08)&&(buf[2]==0x00)&&(buf[3]==0x50))
-    ;
-  else {
-    puts("Read bad data from SD Card\n");
-    return 0;
-  }
-  return 1;
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nFactory Test, Board Rev 3.1\n");
-
-  bool ok = true;
-  unsigned char maj = HW_REV_MAJOR;
-  unsigned char min = HW_REV_MINOR;
-  ok = eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &maj, 1);
-  ok &= eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &min, 1);
-
-  putstr("\nset_hw_rev\n");
-  if (ok)
-    printf("OK: set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-  else {
-    printf("FAILED to set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-    hal_finish();
-    return 0;
-  }
-
-  if(test_sd())
-    puts("SD OK\n");
-  else {
-    puts("SD FAIL\n");
-    //hal_finish();
-    //return 0;
-  }
-  if(test_ram())
-    puts("RAM OK\n");
-  else {
-    puts("RAM FAIL\n");
-    hal_finish();
-    return 0;
-  }
-
-  print_mac_addr(ethernet_mac_addr()->addr);
-  newline();
-
-  clocks_mimo_config(MC_WE_LOCK_TO_SMA);
-
-  while (!clocks_lock_detect()) {
-    puts("No Lock");
-    mdelay(1000);
-  }
-  puts("Clock Locked\n");
-
-}
diff --git a/firmware/microblaze/apps/can_i_sub.c b/firmware/microblaze/apps/can_i_sub.c
deleted file mode 100644
index ed49791f0..000000000
--- a/firmware/microblaze/apps/can_i_sub.c
+++ /dev/null
@@ -1,25 +0,0 @@
-#include <u2_init.h>
-#include <nonstdio.h>
-
-//typedef long long int64_t;
-
-
-int64_t sub(int64_t a, int64_t b);
-void print(int64_t d);
-
-int main(void)
-{
-  u2_init();
-
-  int64_t d = sub(462550990848000LL, 462028800000000LL);
-  print_uint64(d);
-  newline();
-  return 0;
-}
-
-int64_t sub(int64_t a, int64_t b)
-{
-  return a - b;
-}
-
-
diff --git a/firmware/microblaze/apps/double_buffer_fragment.c b/firmware/microblaze/apps/double_buffer_fragment.c
deleted file mode 100644
index cfc061247..000000000
--- a/firmware/microblaze/apps/double_buffer_fragment.c
+++ /dev/null
@@ -1,138 +0,0 @@
-#if 0
-void 
-double_buffering(int port) {
-  unsigned int localstatus = buffer_pool_status->status;
-
-  if(localstatus & BPS_DONE_0) {
-    bp_clear_buf(0);
-    if(buffer_state[0] == FILLING) {
-      buffer_state[0] = FULL;
-      if(buffer_state[1] == EMPTY) {
-	bp_receive_to_buf(1, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[1] = FILLING;
-      }
-      else
-	dsp_rx_idle = 1;
-      if(serdes_tx_idle) {
-	serdes_tx_idle = 0;
-	bp_send_from_buf(0, port, 1, 10, 509);  // SERDES_TX from buffer 0
-	buffer_state[0] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[0] = EMPTY;
-      if(dsp_rx_idle) {
-	dsp_rx_idle = 0;
-	bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 0, use 500 lines
-	buffer_state[0] = FILLING;
-      }
-      if(buffer_state[1] == FULL) {
-	bp_send_from_buf(1, port, 1, 10, 509);  // SERDES_TX from buffer 1
-	buffer_state[1] = EMPTYING;
-      }
-      else
-	serdes_tx_idle = 1;
-    }
-    putstr("Int Proc'ed 0\n");
-  }
-
-  if(localstatus & BPS_DONE_1) {
-    bp_clear_buf(1);
-    if(buffer_state[1] == FILLING) {
-      buffer_state[1] = FULL;
-      if(buffer_state[0] == EMPTY) {
-	bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[0] = FILLING;
-      }
-      else
-	dsp_rx_idle = 1;
-      if(serdes_tx_idle) {
-	serdes_tx_idle = 0;
-	bp_send_from_buf(1, port, 1, 10, 509);  // SERDES_TX from buffer 1
-	buffer_state[1] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[1] = EMPTY;
-      if(dsp_rx_idle) {
-	dsp_rx_idle = 0;
-	bp_receive_to_buf(1, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[1] = FILLING;
-      }
-      if(buffer_state[0] == FULL) {
-	bp_send_from_buf(0, port, 1, 10, 509);  // SERDES_TX from buffer 0
-	buffer_state[0] = EMPTYING;
-      }
-      else
-	serdes_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 1\n");
-  }
-
-  if(localstatus & BPS_DONE_2) {
-    bp_clear_buf(2);
-    if(buffer_state[2] == FILLING) {
-      buffer_state[2] = FULL;
-      if(buffer_state[3] == EMPTY) {
-	bp_receive_to_buf(3, port, 1, 5, 504);  // SERDES_RX to buffer 3, use 500 lines
-	buffer_state[3] = FILLING;
-      }
-      else
-	serdes_rx_idle = 1;
-      if(dsp_tx_idle) {
-	dsp_tx_idle = 0;
-	bp_send_from_buf(2, 1, 1, 5, 504);  // DSP_TX from buffer 2
-	buffer_state[2] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[2] = EMPTY;
-      if(serdes_rx_idle) {
-	serdes_rx_idle = 0;
-	bp_receive_to_buf(2, port, 1, 5, 504);  // SERDES_RX to buffer 2
-	buffer_state[2] = FILLING;
-      }
-      if(buffer_state[3] == FULL) {
-	bp_send_from_buf(3, 1, 1, 5, 504);  // DSP_TX from buffer 3
-	buffer_state[3] = EMPTYING;
-      }
-      else
-	dsp_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 2\n");
-  }
-
-  if(localstatus & BPS_DONE_3) {
-    bp_clear_buf(3);
-    if(buffer_state[3] == FILLING) {
-      buffer_state[3] = FULL;
-      if(buffer_state[2] == EMPTY) {
-	bp_receive_to_buf(2, port, 1, 5, 504);  // SERDES_RX to buffer 2, use 500 lines
-	buffer_state[2] = FILLING;
-      }
-      else
-	serdes_rx_idle = 1;
-      if(dsp_tx_idle) {
-	dsp_tx_idle = 0;
-	bp_send_from_buf(3, 1, 1, 5, 504);  // DSP_TX from buffer 3
-	buffer_state[3] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[3] = EMPTY;
-      if(serdes_rx_idle) {
-	serdes_rx_idle = 0;
-	bp_receive_to_buf(3, port, 1, 5, 504);  // SERDES_RX to buffer 3
-	buffer_state[3] = FILLING;
-      }
-      if(buffer_state[2] == FULL) {
-	bp_send_from_buf(2, 1, 1, 5, 504);  // DSP_TX from buffer 2
-	buffer_state[2] = EMPTYING;
-      }
-      else
-	dsp_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 3\n");
-  }
-}
-#endif
diff --git a/firmware/microblaze/apps/echo.c b/firmware/microblaze/apps/echo.c
deleted file mode 100644
index 89108ee80..000000000
--- a/firmware/microblaze/apps/echo.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "u2_init.h"
-#include "stdio.h"
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("\n>>> echo <<<");
-
-  while (1){
-    int ch = getchar();
-    putchar(ch);
-  }
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/eth_serdes.c b/firmware/microblaze/apps/eth_serdes.c
deleted file mode 100644
index 2d2ddc1ca..000000000
--- a/firmware/microblaze/apps/eth_serdes.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_passthru_v2.h"
-#include "memcpy_wa.h"
-#include "clocks.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-
-#define FW_SETS_SEQNO	1	// define to 0 or 1 (FIXME must be 1 for now)
-
-#if (FW_SETS_SEQNO)
-static int fw_seqno __attribute__((unused));	// used when f/w is filling in sequence numbers
-#endif
-
-
-/*
- * Full duplex Tx and Rx between ethernet and serdes
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
- * Buffers 4 and 5 are used to double-buffer the eth to DSP Tx  eth flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-
-#define	DSP_RX_BUF_0	2	// serdes -> eth (double buffer)
-#define	DSP_RX_BUF_1	3	// serdes -> eth
-#define	DSP_TX_BUF_0	4	// eth -> serdes (double buffer)
-#define	DSP_TX_BUF_1	5	// eth -> serdes
-
-/*
- * ================================================================
- *   configure serdes double buffering state machine (eth -> serdes)
- * ================================================================
- */
-
-
-// Receive from ethernet
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_ETH,
-  0,
-  BP_LAST_LINE
-};
-
-// send to serdes
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_SERDES,
-  0,
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-/*
- * ====================================================================
- *   configure serdes RX double buffering state machine (serdes -> eth)
- * ====================================================================
- */
-
-// receive from serdes
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_SERDES,
-  0,
-  BP_LAST_LINE
-};
-
-// send to ETH
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_ETH,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-// ----------------------------------------------------------------
-
-
-#if (FW_SETS_SEQNO)
-/*
- * Debugging ONLY.  This will be handled by the tx_protocol_engine.
- *
- * This is called when the DSP Rx chain has filled in a packet.
- * We set and increment the seqno, then return false, indicating
- * that we didn't handle the packet.  A bit of a kludge
- * but it should work.
- */
-
-bool 
-fw_sets_seqno_inspector(dbsm_t *sm, int buf_this)	// returns false
-{
-#if 0
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t last_line = buffer_pool_status->last_line[buf_this] - sm->last_line_adj;
-  printf("fw_sets_seqno_inspector: buf_this = %d, last_line = %d\n",
-	 buf_this, last_line);
-
-  print_buffer(p, (last_line + 1));
-#endif
-
-#if 0
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t seqno = fw_seqno++;
-
-  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
-  uint32_t t = p[4];
-  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
-  p[4] = t;
-#endif
-
-  return false;		// we didn't handle the packet
-}
-#endif
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  uint32_t  status = buffer_pool_status->status;
-
-  if (0 && (status & ~BPS_IDLE_ALL)){
-    putstr("status = ");
-    puthex32_nl(status);
-  }
-    
-  dbsm_process_status(&dsp_tx_sm, status);
-  dbsm_process_status(&dsp_rx_sm, status);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  output_regs->led_src = 0x3;		// h/w controls bottom two bits
-  clocks_enable_test_clk(true, 1);
-
-  putstr("\neth <-> serdes\n");
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-  ethernet_init();
-
-  // clocks_mimo_config(MC_WE_LOCK_TO_SMA | MC_PROVIDE_CLK_TO_MIMO);
-  clocks_mimo_config(MC_WE_DONT_LOCK | MC_PROVIDE_CLK_TO_MIMO);
-
-#if 0
-  // make bit 15 of Tx gpio's be a s/w output
-  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
-#endif
-
-#if 1
-  output_regs->debug_mux_ctrl = 1;
-  hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
-  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
-#endif
-
-
-  // initialize double buffering state machine for ethernet -> serdes
-
-  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
-	    &dsp_tx_recv_args, &dsp_tx_send_args,
-	    eth_pkt_inspector);
-
-
-  // initialize double buffering state machine for serdes -> ethernet
-
-  if (FW_SETS_SEQNO){
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      fw_sets_seqno_inspector);
-  }
-  else {
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      dbsm_nop_inspector);
-  }
-
-  // tell app_common that this dbsm could be sending to the ethernet
-  ac_could_be_sending_to_eth = &dsp_rx_sm;
-
-
-  // kick off the state machines
-  dbsm_start(&dsp_tx_sm);
-  dbsm_start(&dsp_rx_sm);
-
-  //int which = 0;
-
-  while(1){
-    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
-    // which ^= 0x8000;
-
-    buffer_irq_handler(0);
-  }
-}
diff --git a/firmware/microblaze/apps/factory_test.c b/firmware/microblaze/apps/factory_test.c
deleted file mode 100644
index e1fbb0e40..000000000
--- a/firmware/microblaze/apps/factory_test.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common_v2.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <i2c.h>
-#include <usrp2_i2c_addr.h>
-#include <clocks.h>
-#include "sd.h"
-
-#define FW_SETS_SEQNO	1	// define to 0 or 1 (FIXME must be 1 for now)
-
-#if (FW_SETS_SEQNO)
-static int fw_seqno;	// used when f/w is filling in sequence numbers
-#endif
-
-
-/*
- * Full duplex Tx and Rx between ethernet and DSP pipelines
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
- * Buffers 4 and 5 are used to double-buffer the eth to DSP Tx  eth flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-
-#define	DSP_RX_BUF_0	2	// dsp rx -> eth (double buffer)
-#define	DSP_RX_BUF_1	3	// dsp rx -> eth
-#define	DSP_TX_BUF_0	4	// eth -> dsp tx (double buffer)
-#define	DSP_TX_BUF_1	5	// eth -> dsp tx
-
-/*
- * ================================================================
- *   configure DSP TX double buffering state machine (eth -> dsp)
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4)
-
-// Receive from ethernet
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_ETH,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past transport header
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-/*
- * ================================================================
- *   configure DSP RX double buffering state machine (dsp -> eth)
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4 + 1)
-
-// receive from DSP
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_DSP,
-  DSP_RX_FIRST_LINE,
-  BP_LAST_LINE
-};
-
-// send to ETH
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_ETH,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-// variables for streaming mode
-
-static bool         streaming_p = false;
-static unsigned int streaming_items_per_frame = 0;
-static int          streaming_frame_count = 0;
-#define FRAMES_PER_CMD	1000
-
-bool is_streaming(void){ return streaming_p; }
-
-// ----------------------------------------------------------------
-
-
-void
-restart_streaming(void)
-{
-  // setup RX DSP regs
-  dsp_rx_regs->clear_state = 1;			// reset
-
-  streaming_p = true;
-  streaming_frame_count = FRAMES_PER_CMD;
-
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);			// set "chain" bit
-
-  // kick off the state machine
-  dbsm_start(&dsp_rx_sm);
-
-  dsp_rx_regs->rx_time = 0;		// enqueue first of two commands
-
-  // make sure this one and the rest have the "now" and "chain" bits set.
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);				
-
-  dsp_rx_regs->rx_time = 0;		// enqueue second command
-}
-
-void
-start_rx_streaming_cmd(const eth_mac_addr_t *host, op_start_rx_streaming_t *p)
-{
-  host_mac_addr = *host;	// remember who we're sending to
-
-  /*
-   * Construct  ethernet header and word0 and preload into two buffers
-   */
-  u2_eth_packet_t	pkt;
-  memset(&pkt, 0, sizeof(pkt));
-  pkt.ehdr.dst = *host;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  u2p_set_word0(&pkt.fixed, 0, 0);
-  // DSP RX will fill in timestamp
-
-  memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
-  memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
-
-
-  if (FW_SETS_SEQNO)
-    fw_seqno = 0;
-
-  streaming_items_per_frame = p->items_per_frame;
-  restart_streaming();
-}
-
-
-void
-stop_rx_cmd(void)
-{
-  streaming_p = false;
-  dsp_rx_regs->clear_state = 1;	// flush cmd queue
-  bp_clear_buf(DSP_RX_BUF_0);
-  bp_clear_buf(DSP_RX_BUF_1);
-}
-
-
-static void
-setup_tx()
-{
-  dsp_tx_regs->clear_state = 1;
-  bp_clear_buf(DSP_TX_BUF_0);
-  bp_clear_buf(DSP_TX_BUF_1);
-
-  int tx_scale = 256;
-  int interp = 32;
-
-  // setup some defaults
-
-  dsp_tx_regs->freq = 0;
-  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = interp;
-}
-
-
-#if (FW_SETS_SEQNO)
-/*
- * Debugging ONLY.  This will be handled by the tx_protocol_engine.
- *
- * This is called when the DSP Rx chain has filled in a packet.
- * We set and increment the seqno, then return false, indicating
- * that we didn't handle the packet.  A bit of a kludge
- * but it should work.
- */
-bool 
-fw_sets_seqno_inspector(dbsm_t *sm, int buf_this)	// returns false
-{
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t seqno = fw_seqno++;
-
-  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
-  uint32_t t = p[4];
-  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
-  p[4] = t;
-
-  // queue up another rx command when required
-  if (streaming_p && --streaming_frame_count == 0){
-    streaming_frame_count = FRAMES_PER_CMD;
-    dsp_rx_regs->rx_time = 0;
-  }
-
-  return false;		// we didn't handle the packet
-}
-#endif
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  uint32_t  status = buffer_pool_status->status;
-
-  dbsm_process_status(&dsp_tx_sm, status);
-  dbsm_process_status(&dsp_rx_sm, status);
-}
-
-int test_ram()
-{
-  int i,j,k;
-  output_regs->ram_page = 1<<10;
-  
-  extram[0] = 0xDEADBEEF;
-  extram[1] = 0xF00D1234;
-  extram[7] = 0x76543210;
-  
-  output_regs->ram_page = 2<<10;
-  extram[7] = 0x55555555;
-  extram[1] = 0xaaaaaaaa;
-  extram[0] = 0xeeeeeeee;
-  
-  output_regs->ram_page = 1<<10;
-  
-  i = extram[0];
-  k = extram[1];
-  j = extram[7];
-  
-  if((i != 0xDEADBEEF)||(j!=0x76543210)||(k!=0xF00D1234)) {
-    puts("RAM FAIL1!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  
-  output_regs->ram_page = 2<<10;
-
-  j = extram[7];
-  k = extram[1];
-  i = extram[0];
-
-  if((i != 0xeeeeeeee)||(j!=0x55555555)||(k!=0xaaaaaaaa)) {
-    puts("RAM FAIL2!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  return 1;
-}
-
-int test_sd()
-{
-  int i = sd_init();
-  if(i==0) {
-    puts("FAILED INIT of Card\n");
-    return 0;
-  }
-  
-  unsigned char buf[512];
-  i = sd_read_block(2048,buf);
-  if(i == 0) {
-    puts("READ Command Rejected\n");
-    return 0;
-  }
-  if((buf[0]==0xb8)&&(buf[1]==0x08)&&(buf[2]==0x00)&&(buf[3]==0x50))
-    ;
-  else {
-    puts("Read bad data from SD Card\n");
-    return 0;
-  }
-  return 1;
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nFactory Test\n");
-
-  print_mac_addr(ethernet_mac_addr()->addr);
-  newline();
-
-  if(test_sd())
-    puts("SD OK\n");
-  else {
-    puts("SD FAIL\n");
-    //    hal_finish();
-    //return 0;
-  }
-  if(test_ram())
-    puts("RAM OK\n");
-  else {
-    puts("RAM FAIL\n");
-    hal_finish();
-    return 0;
-  }
-
-  print_mac_addr(ethernet_mac_addr()->addr);
-  newline();
-
-  output_regs->led_src = 0x7;  // make bottom 3 controlled by HW
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-  ethernet_init();
-
-  clocks_enable_tx_dboard(true,1);
-  clocks_mimo_config(MC_WE_LOCK_TO_SMA);
-#if 0
-  // make bit 15 of Tx gpio's be a s/w output
-  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
-#endif
-
-  output_regs->debug_mux_ctrl = 1;
-#if 0
-  hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
-  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
-#endif
-
-
-  // initialize double buffering state machine for ethernet -> DSP Tx
-
-  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
-	    &dsp_tx_recv_args, &dsp_tx_send_args,
-	    eth_pkt_inspector);
-
-
-  // initialize double buffering state machine for DSP RX -> Ethernet
-
-  if (FW_SETS_SEQNO){
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      fw_sets_seqno_inspector);
-  }
-  else {
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      dbsm_nop_inspector);
-  }
-
-  // tell app_common that this dbsm could be sending to the ethernet
-  ac_could_be_sending_to_eth = &dsp_rx_sm;
-
-
-  // program tx registers
-  setup_tx();
-
-  // kick off the state machine
-  dbsm_start(&dsp_tx_sm);
-
-  //int which = 0;
-
-  while(1){
-    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
-    // which ^= 0x8000;
-
-    buffer_irq_handler(0);
-
-    int pending = pic_regs->pending;		// poll for under or overrun
-
-    if (pending & PIC_UNDERRUN_INT){
-      dbsm_handle_tx_underrun(&dsp_tx_sm);
-      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
-      putchar('U');
-    }
-
-    if (pending & PIC_OVERRUN_INT){
-      dbsm_handle_rx_overrun(&dsp_rx_sm);
-      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt
-
-      // FIXME Figure out how to handle this robustly.
-      // Any buffers that are emptying should be allowed to drain...
-
-      if (streaming_p){
-	// restart_streaming();
-	// FIXME report error
-      }
-      else {
-	// FIXME report error
-      }
-      putchar('O');
-    }
-  }
-}
diff --git a/firmware/microblaze/apps/gen_eth_packets.c b/firmware/microblaze/apps/gen_eth_packets.c
deleted file mode 100644
index 4d521f6bf..000000000
--- a/firmware/microblaze/apps/gen_eth_packets.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "memcpy_wa.h"
-#include "print_rmon_regs.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-
-// ----------------------------------------------------------------
-
-static eth_mac_addr_t dst_mac_addr =
-  {{  0xff, 0xff, 0xff, 0xff, 0xff, 0xff }};
-
-// ----------------------------------------------------------------
-
-// #define	PACKET_SIZE 1500		// bytes
-// #define ETH_DATA_RATE 1000000		// 1MB/s
-// #define	ETH_PACKET_RATE (ETH_DATA_RATE/PACKET_SIZE)	// 13,3333 pkts/s
-
-// static int timer_delta = MASTER_CLK_RATE/ETH_PACKET_RATE;	// ticks between interrupts
-
-static int timer_delta = (int)(MASTER_CLK_RATE * 1e-3);		// tick at 1 kHz
-static int sim_timer_delta = (int)(MASTER_CLK_RATE * 100e-6);	// tick at 10 kHz
-
-static volatile bool send_packet_now = false;   // timer handler sets this
-static volatile bool link_is_up = false;	// eth handler sets this
-
-int packet_number = 0;
-
-
-#define CPU_TX_BUF	0	// cpu xmits ethernet frames from here
-#define CPU_RX_BUF	1	// receive ethernet frames here
-
-// ----------------------------------------------------------------
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  link_is_up = speed == 0 ? false : true;
-  hal_set_leds(link_is_up ? 0x2 : 0x0, 0x2);
-  printf("\neth link changed: speed = %d\n", speed);
-}
-
-void
-timer_irq_handler(unsigned irq)
-{
-  hal_set_timeout(timer_delta);	// schedule next timeout
-  send_packet_now = 1;
-}
-
-
-static void
-init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
-{
-  int i = 0;
-  int mark = ((bufnum & 0xff) << 24) | 0x005A0000;
-
-  for (i = 0; i < BP_NLINES; i++){
-    buf[i] = mark | i;
-    mark ^= 0x00FF0000;
-  }
-
-  // copy header into buffer
-  memcpy_wa(buf, pkt, sizeof(*pkt));
-}
-
-static void
-init_packets(void)
-{
-  u2_eth_packet_t	pkt __attribute__((aligned (4)));
-
-  memset(&pkt, 0, sizeof(pkt));
-
-  pkt.ehdr.dst = dst_mac_addr;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  pkt.fixed.word0 = 0x01234567;
-  pkt.fixed.timestamp = 0xffffffff;
-
-  // init just the one we're using
-  init_packet((void *)buffer_ram(CPU_TX_BUF), &pkt, CPU_TX_BUF);
-}
-
-int
-main(void)
-{
-  int npackets_sent = 0;
-
-  u2_init();
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\ngen_eth_packets\n");
-  
-  hal_set_leds(0x0, 0x3);
-
-  init_packets();
-
-  pic_register_handler(IRQ_TIMER, timer_irq_handler);
-
-  if (hwconfig_simulation_p())
-    timer_delta = sim_timer_delta;
-
-  hal_set_timeout(timer_delta);
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-  ethernet_init();
-
-  /*
-  if (hwconfig_simulation_p()){
-    eth_mac->speed = 4;	// hardcode mac speed to 1000
-    link_is_up = true;
-  }
-  */
-
-  // fire off a receive from the ethernet
-  bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
-
-  while(1){
-    uint32_t status = buffer_pool_status->status;
-
-    if (status & (BPS_DONE(CPU_RX_BUF) | BPS_ERROR(CPU_RX_BUF))){
-      bp_clear_buf(CPU_RX_BUF);
-      // ignore incoming ethernet packets; they were looped back in sim
-      bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
-    }
-
-    if (status & (BPS_DONE(CPU_TX_BUF) | BPS_ERROR(CPU_TX_BUF))){
-      if (status & BPS_ERROR(CPU_TX_BUF)){
-	putchar('E');
-      }
-      bp_clear_buf(CPU_TX_BUF);
-      npackets_sent++;
-      if ((npackets_sent & 0xF) == 0){	// print after every 16 packets
-	//print_rmon_regs();
-	putchar('.');
-      }
-    }
-
-    if (link_is_up && send_packet_now && (status & BPS_IDLE(CPU_TX_BUF))){
-      send_packet_now = false;
-
-      // kick off the next packet
-      // FIXME set packet number in packet
-
-      bp_send_from_buf(CPU_TX_BUF, PORT_ETH, 1, 0, 255);	// 1KB total
-      hal_toggle_leds(0x1);
-    }
-  }
-
-  hal_finish();
-  return 1;
-}
diff --git a/firmware/microblaze/apps/gen_pause_frames.c b/firmware/microblaze/apps/gen_pause_frames.c
deleted file mode 100644
index 0f81dafff..000000000
--- a/firmware/microblaze/apps/gen_pause_frames.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "u2_eth_packet.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-
-
-// ----------------------------------------------------------------
-
-unsigned char dst_mac_addr[6] = {
-  0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-// ----------------------------------------------------------------
-
-// #define	PACKET_SIZE 1500		// bytes
-// #define ETH_DATA_RATE 1000000		// 1MB/s
-// #define	ETH_PACKET_RATE (ETH_DATA_RATE/PACKET_SIZE)	// 13,3333 pkts/s
-
-// static int timer_delta = MASTER_CLK_RATE/ETH_PACKET_RATE;	// ticks between interrupts
-
-static int timer_delta = MASTER_CLK_RATE/1000;	// tick at 1kHz
-
-static volatile bool send_packet_now = false;   // timer handler sets this
-static volatile bool link_is_up = false;	// eth handler sets this
-
-int packet_number = 0;
-
-// ----------------------------------------------------------------
-
-// debugging output on tx pins
-#define LS_MASK  0xE0000
-#define LS_1000  0x80000
-#define LS_100   0x40000
-#define LS_10    0x20000
-
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  int v = 0;
-  switch(speed){
-  case 10:
-    v = LS_10;
-    link_is_up = true;
-    break;
-    
-  case 100:
-    v = LS_100;
-    link_is_up = true;
-    break;
-    
-  case 1000:
-    v = LS_100;
-    link_is_up = true;
-    break;
-
-  default:
-    v = 0;
-    link_is_up = false;
-    break;
-  }
-
-  hal_gpio_set_tx(v, LS_MASK);	/* set debug bits on d'board */
-
-  putstr("\neth link changed: speed = ");
-  puthex16_nl(speed);
-}
-
-void
-timer_irq_handler(unsigned irq)
-{
-  hal_set_timeout(timer_delta);	// schedule next timeout
-  send_packet_now = 1;
-}
-
-
-void
-buffer_irq_handler(unsigned irq)
-{
-  // FIXME
-}
-
-static void
-init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
-{
-  int i = 0;
-  int mark = ((bufnum & 0xff) << 24) | 0x005A0000;
-
-  for (i = 0; i < BP_NLINES; i++){
-    buf[i] = mark | i;
-    mark ^= 0x00FF0000;
-  }
-
-  // copy header into buffer
-  memcpy_wa(buf, pkt, sizeof(*pkt));
-}
-
-static void
-init_packets(void)
-{
-  int	i;
-  
-  u2_eth_packet_t	pkt __attribute__((aligned (4)));
-
-  for (i = 0; i < 6; i++){
-    pkt.ehdr.dst.addr[i] = dst_mac_addr[i];
-  }
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-
-  // fill ALL buffers for debugging
-  for (i = 0; i < 8; i++)
-    init_packet((void *)buffer_ram(i), &pkt, i);
-}
-
-static int led_counter = 0;
-
-int
-main(void)
-{
-  int send_pause = 1;
-  
-  u2_init();
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\ngen_eth_packets\n");
-  
-  // Control LEDs
-  output_regs->leds = 0x00;
-
-  init_packets();
-
-  // pic_register_handler(IRQ_BUFFER, buffer_irq_handler);  // poll for now
-  pic_register_handler(IRQ_TIMER, timer_irq_handler);
-  hal_set_timeout(timer_delta);
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-
-  ethernet_init();
-
-  eth_mac->pause_frame_send_en = 1;
-  eth_mac->pause_quanta_set = 16384 / 512;
-
-  // eth_mac->speed = 4;	// FIXME hardcode mac speed to 1000
-
-  while(1){
-    if (link_is_up && send_packet_now){
-      send_packet_now = false;
-
-
-      if (send_pause)
-	eth_mac->xon_cpu = 1;
-      else
-	eth_mac->xon_cpu = 0;
-
-      send_pause ^= 1;
-
-      // kick off the next packet
-      // FIXME set packet number in packet
-
-#if 0
-      bp_send_from_buf(0, PORT_ETH, 1, 0, 255);	// 1KB total
-
-      while ((buffer_pool_status->status & (BPS_DONE_0|BPS_ERROR_0)) == 0)
-	;
-      bp_clear_buf(0);
-#endif
-
-      output_regs->leds = ((++led_counter) & 0x1) | (link_is_up ? 0x2 : 0x0);
-    }
-  }
-
-  hal_finish();
-  return 1;
-}
diff --git a/firmware/microblaze/apps/hello.c b/firmware/microblaze/apps/hello.c
deleted file mode 100644
index bce843093..000000000
--- a/firmware/microblaze/apps/hello.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "u2_init.h"
-#include "stdio.h"
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("Hello World");
-  puts("Goodbye World");
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/ibs_rx_test.c b/firmware/microblaze/apps/ibs_rx_test.c
deleted file mode 100644
index bdc04747e..000000000
--- a/firmware/microblaze/apps/ibs_rx_test.c
+++ /dev/null
@@ -1,82 +0,0 @@
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "nonstdio.h"
-
-#define PORT 2    // ethernet = 2, serdes = 0
-int dsp_rx_buf, dsp_tx_buf, serdes_rx_buf, serdes_tx_buf;
-int dsp_rx_idle, dsp_tx_idle, serdes_rx_idle, serdes_tx_idle;
-
-int buffer_state[4];
-
-static void __attribute__((unused))
-wait_until_status_nonzero(void) 
-{
-  while (buffer_pool_status->status == 0)
-    ;
-}
-
-int
-main(void)
-{
-  int i;
-  
-  u2_init();
-
-  output_regs->adc_ctrl = 0x0A;
-
-  dsp_rx_regs->freq = 0;
-  dsp_rx_regs->scale_iq = (1 << 16) | 1;
-  dsp_rx_regs->decim_rate = 8;
-
-  volatile unsigned int *buffer0 = buffer_ram(0);
-  volatile unsigned int *buffer1 = buffer_ram(1);
-  volatile unsigned int *buffer2 = buffer_ram(2);
-  
-  putstr("Starting RX\n");
-  bp_clear_buf(0);
-  bp_receive_to_buf(0, 1, 1, 0, 99);
-
-  dsp_rx_regs->rx_command = (50 << 9) | 100;   // Numlines, lines per frame
-  dsp_rx_regs->rx_time = 0x2000;
-
-  dsp_rx_regs->rx_command = (137 << 9) | 50;   // Numlines, lines per frame
-  dsp_rx_regs->rx_time = 0x2200;
-
-  while (buffer_pool_status->status == 0)
-    ;
-  bp_clear_buf(0);
-  bp_clear_buf(1);
-  bp_receive_to_buf(1, 1, 1, 0, 99);
-  while (buffer_pool_status->status == 0)
-    ;
-  bp_clear_buf(2);
-  bp_receive_to_buf(2, 1, 1, 0, 99);
-  while (buffer_pool_status->status == 0)
-    ;
-  
-  for(i=0;i<100;i++) {
-    puthex(i);
-    putstr("   ");
-    puthex_nl(buffer0[i]);
-  }
-  for(i=0;i<60;i++) {
-    puthex(i);
-    putstr("   ");
-    puthex_nl(buffer1[i]);
-  }
-  for(i=0;i<60;i++) {
-    puthex(i);
-    putstr("   ");
-    puthex_nl(buffer2[i]);
-  }
-  //while(timer_regs -> time < 0x6000)
-  //  {}
-
-  putstr("Done\n");
-  hal_finish();
-  
-  return 1;
-}
diff --git a/firmware/microblaze/apps/ibs_tx_test.c b/firmware/microblaze/apps/ibs_tx_test.c
deleted file mode 100644
index ff9446d92..000000000
--- a/firmware/microblaze/apps/ibs_tx_test.c
+++ /dev/null
@@ -1,160 +0,0 @@
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "nonstdio.h"
-
-// Globals
-#define EMPTY 0
-#define FILLING 1
-#define FULL 2
-#define EMPTYING 3
-
-#define PORT 2    // ethernet = 2, serdes = 0
-int dsp_rx_buf, dsp_tx_buf, serdes_rx_buf, serdes_tx_buf;
-int dsp_rx_idle, dsp_tx_idle, serdes_rx_idle, serdes_tx_idle;
-
-int buffer_state[4];
-
-static void
-wait_until_status_nonzero(void)
-{
-  while (buffer_pool_status->status == 0)
-    ;
-}
-
-int
-main(void)
-{
-  int i;
-  
-  u2_init();
-  
-  dsp_tx_regs->freq = 0;
-  dsp_tx_regs->scale_iq = (1 << 16) | 1;
-  dsp_tx_regs->interp_rate = 8;
-
-  // Write data to be sent into the first buffer
-  volatile unsigned int *buffer0 = buffer_ram(0);
-  volatile unsigned int *buffer1 = buffer_ram(1);
-  
-
-  putstr("Starting to fill in RAM\n");
-  for(i=0;i<512;i++) 
-    buffer0[i] = i;
-  putstr("Filled in RAM\n");
-  
-  buffer0[0] = 7; // start and end of buffer, send immediately
-  buffer0[1] = 0x0000;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-  while(timer_regs -> time < 0x6000)
-    {}
-
-  buffer0[0] = 3; // start and end of buffer
-  buffer0[1] = 0x8000;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-  while(timer_regs -> time < 0x8400)
-    {}
-
-  buffer0[0] = 3; // start and end of buffer
-  buffer0[1] = 0x8800;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-  while(timer_regs -> time < 0x9000)
-    {}
-
-  buffer0[0] = 0x2;  // not last
-  buffer0[1] = 0x9100;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-  buffer0[0] = 0x1;  // last
-  buffer0[1] = 0x0000;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-
-  
-  buffer0[0] = 0x3;  // first and last
-  buffer0[1] = 0x8000;  // Time in the past
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-
-  /*
-  buffer0[0] = 0x2; // not last
-  buffer0[1] = 0x9600;  // start time
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 1, 1, 0, 9);
-  while (buffer_pool_status->status == 0)
-    ;
-  */
-
-  while(timer_regs -> time < 0xa000)
-    {}
-
-  putstr("Done\n");
-
-  while(1)
-    {}
-  hal_finish();
-  
-  // Send a bunch, let them pile up in FIFO
-  bp_send_from_buf(0, 2, 1, 21, 80);    wait_until_status_nonzero();
-  bp_clear_buf(0);
-  putstr("First add'l TX done\n");
-  bp_send_from_buf(0, 2, 1, 81, 288);   wait_until_status_nonzero();
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 2, 1, 289, 292);  wait_until_status_nonzero();
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 2, 1, 293, 326);  wait_until_status_nonzero();
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 2, 1, 327, 399);  wait_until_status_nonzero();
-  bp_clear_buf(0);
-  bp_send_from_buf(0, 2, 1, 400, 511);  wait_until_status_nonzero();
-  bp_clear_buf(0);
-  putstr("All add'l TX done\n");
-  
-  bp_receive_to_buf(1, 2, 1, 21, 80);   wait_until_status_nonzero();
-  bp_clear_buf(1);
-  putstr("First add'l RX done\n");
-  bp_receive_to_buf(1, 2, 1, 81, 288);  wait_until_status_nonzero();
-  bp_clear_buf(1);
-  bp_receive_to_buf(1, 2, 1, 289, 292); wait_until_status_nonzero();
-  bp_clear_buf(1);
-  bp_receive_to_buf(1, 2, 1, 293, 326); wait_until_status_nonzero();
-  bp_clear_buf(1);
-  bp_receive_to_buf(1, 2, 1, 327, 399); wait_until_status_nonzero();
-  bp_clear_buf(1);
-  bp_receive_to_buf(1, 2, 1, 400, 511); wait_until_status_nonzero();
-  bp_clear_buf(1);
-  putstr("All add'l RX done\n");
-
-  for(i=0;i<512;i++)
-    if(buffer0[i] != buffer1[i]) {
-      putstr("ERROR at location: ");
-      puthex_nl(i);
-      putstr("Value sent: ");
-      puthex_nl(buffer0[i]);
-      putstr("Value rcvd: ");
-      puthex_nl(buffer1[i]);
-      //break;
-    }
-  
-  putstr("Done Testing\n");
-  
-  hal_finish();
-  return 1;
-}
diff --git a/firmware/microblaze/apps/mimo_app_common_v2.c b/firmware/microblaze/apps/mimo_app_common_v2.c
deleted file mode 100644
index 5dbecb0d0..000000000
--- a/firmware/microblaze/apps/mimo_app_common_v2.c
+++ /dev/null
@@ -1,582 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007,2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "mimo_app_common_v2.h"
-#include "buffer_pool.h"
-#include "memcpy_wa.h"
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "print_rmon_regs.h"
-#include "db.h"
-#include "db_base.h"
-#include "clocks.h"
-#include "u2_init.h"
-#include <string.h>
-
-volatile bool link_is_up = false;	// eth handler sets this
-int cpu_tx_buf_dest_port = PORT_ETH;
-
-// If this is non-zero, this dbsm could be writing to the ethernet
-dbsm_t *ac_could_be_sending_to_eth;
-
-static unsigned char exp_seqno __attribute__((unused)) = 0;
-
-void abort(void);
-
-static bool
-burn_mac_addr(const op_burn_mac_addr_t *p)
-{
-  return ethernet_set_mac_addr(&p->addr);
-}
-
-static bool
-sync_to_pps(const op_generic_t *p)
-{
-  timesync_regs->sync_on_next_pps = 1;
-  putstr("SYNC to PPS\n");
-  return true;
-}
-
-static bool
-config_mimo_cmd(const op_config_mimo_t *p)
-{
-  clocks_mimo_config(p->flags);
-  return true;
-}
-
-void
-set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt)
-{
-  reply_pkt->ehdr.dst = cmd_pkt->ehdr.src;
-  reply_pkt->ehdr.src = *ethernet_mac_addr();
-  reply_pkt->ehdr.ethertype = U2_ETHERTYPE;
-  reply_pkt->thdr.flags = 0;
-  reply_pkt->thdr.fifo_status = 0;	// written by protocol engine
-  reply_pkt->thdr.seqno = 0;		// written by protocol engine
-  reply_pkt->thdr.ack = 0;		// written by protocol engine
-  u2p_set_word0(&reply_pkt->fixed, 0, CONTROL_CHAN);
-  reply_pkt->fixed.timestamp = timer_regs->time;
-}
-
-static void
-send_reply(unsigned char *reply, size_t reply_len)
-{
-  if (reply_len < 64)
-    reply_len = 64;
-
-  // wait for buffer to become idle
-  hal_set_leds(0x4, 0x4);
-  while((buffer_pool_status->status & BPS_IDLE(CPU_TX_BUF)) == 0)
-    ;
-  hal_set_leds(0x0, 0x4);
-
-  // copy reply into CPU_TX_BUF
-  memcpy_wa(buffer_ram(CPU_TX_BUF), reply, reply_len);
-
-  // wait until nobody else is sending to the ethernet
-  if (ac_could_be_sending_to_eth){
-    hal_set_leds(0x8, 0x8);
-    dbsm_wait_for_opening(ac_could_be_sending_to_eth);
-    hal_set_leds(0x0, 0x8);
-  }
-
-  if (0){
-    printf("sending_reply to port %d, len = %d\n", cpu_tx_buf_dest_port, (int)reply_len);
-    print_buffer(buffer_ram(CPU_TX_BUF), reply_len/4);
-  }
-
-  // fire it off
-  bp_send_from_buf(CPU_TX_BUF, cpu_tx_buf_dest_port, 1, 0, reply_len/4);
-
-  // wait for it to complete (not long, it's a small pkt)
-  while((buffer_pool_status->status & (BPS_DONE(CPU_TX_BUF) | BPS_ERROR(CPU_TX_BUF))) == 0)
-    ;
-
-  bp_clear_buf(CPU_TX_BUF);
-}
-
-
-static size_t
-op_id_cmd(const op_generic_t *p,
-	  void *reply_payload, size_t reply_payload_space)
-{
-  op_id_reply_t *r = (op_id_reply_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))	// no room
-    return 0;
-
-  // Build reply subpacket
-
-  r->opcode = OP_ID_REPLY;
-  r->len = sizeof(op_id_reply_t);
-  r->rid = p->rid;
-  r->addr = *ethernet_mac_addr();
-  r->hw_rev = (u2_hw_rev_major << 8) | u2_hw_rev_minor;
-  // r->fpga_md5sum = ;	// FIXME
-  // r->sw_md5sum = ;	// FIXME
-
-  return r->len;
-}
-
-
-static size_t
-config_tx_v2_cmd(const op_config_tx_v2_t *p,
-		 void *reply_payload, size_t reply_payload_space)
-{
-  op_config_tx_reply_v2_t *r = (op_config_tx_reply_v2_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))
-    return 0;					// no room
-
-  struct tune_result	tune_result;
-  memset(&tune_result, 0, sizeof(tune_result));
-
-  bool ok = true;
-  
-#if 0
-  if (p->valid & CFGV_GAIN){
-    ok &= db_set_gain(tx_dboard, p->gain);
-  }
-
-  if (p->valid & CFGV_FREQ){
-    bool was_streaming = is_streaming();
-    if (was_streaming)
-      stop_rx_cmd();
-    
-    u2_fxpt_freq_t f = u2_fxpt_freq_from_hilo(p->freq_hi, p->freq_lo);
-    bool tune_ok = db_tune(tx_dboard, f, &tune_result);
-    ok &= tune_ok;
-    print_tune_result("Tx", tune_ok, f, &tune_result);
-
-    if (was_streaming)
-      restart_streaming();
-  }
-
-  if (p->valid & CFGV_INTERP_DECIM){
-    int interp = p->interp;
-    int hb1 = 0;
-    int hb2 = 0;
-
-    if (!(interp & 1)){
-      hb2 = 1;
-      interp = interp >> 1;
-    }
-
-    if (!(interp & 1)){
-      hb1 = 1;
-      interp = interp >> 1;
-    }
-    
-    if (interp < MIN_CIC_INTERP || interp > MAX_CIC_INTERP)
-      ok = false;
-    else {
-      dsp_tx_regs->interp_rate = (hb1<<9) | (hb2<<8) | interp;
-      // printf("Interp: %d, register %d\n", p->interp, (hb1<<9) | (hb2<<8) | interp);
-    }
-  }
-
-  if (p->valid & CFGV_SCALE_IQ){
-    dsp_tx_regs->scale_iq = p->scale_iq;
-  }
-#endif
-
-  // Build reply subpacket
-
-  r->opcode = OP_CONFIG_TX_REPLY_V2;
-  r->len = sizeof(*r);
-  r->rid = p->rid;
-  r->ok = ok;
-  r->inverted = tune_result.inverted;
-  r->baseband_freq_hi = u2_fxpt_freq_hi(tune_result.baseband_freq);
-  r->baseband_freq_lo = u2_fxpt_freq_lo(tune_result.baseband_freq);
-  r->duc_freq_hi = u2_fxpt_freq_hi(tune_result.dxc_freq);
-  r->duc_freq_lo = u2_fxpt_freq_lo(tune_result.dxc_freq);
-  r->residual_freq_hi = u2_fxpt_freq_hi(tune_result.residual_freq);
-  r->residual_freq_lo = u2_fxpt_freq_lo(tune_result.residual_freq);
-  return r->len;
-}
-
-static size_t
-config_rx_v2_cmd(const op_config_rx_v2_t *p, 
-		 void *reply_payload, size_t reply_payload_space)
-{
-  op_config_rx_reply_v2_t *r = (op_config_rx_reply_v2_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))
-    return 0;				// no room
-
-  struct tune_result	tune_result;
-  memset(&tune_result, 0, sizeof(tune_result));
-
-  bool ok = true;
-  
-  if (p->valid & CFGV_GAIN){
-    ok &= db_set_gain(rx_dboard, p->gain);
-  }
-
-  if (p->valid & CFGV_FREQ){
-    bool was_streaming = is_streaming();
-    if (was_streaming)
-      stop_rx_cmd();
-    
-    u2_fxpt_freq_t f = u2_fxpt_freq_from_hilo(p->freq_hi, p->freq_lo);
-    bool tune_ok = db_tune(rx_dboard, f, &tune_result);
-    ok &= tune_ok;
-    print_tune_result("Rx", tune_ok, f, &tune_result);
-
-    if (was_streaming)
-      restart_streaming();
-  }
-
-  if (p->valid & CFGV_INTERP_DECIM){
-    int decim = p->decim;
-    int hb1 = 0;
-    int hb2 = 0;
-    
-    if(!(decim & 1)) {
-      hb2 = 1;
-      decim = decim >> 1;
-    }
-    
-    if(!(decim & 1)) {
-      hb1 = 1;
-      decim = decim >> 1;
-    }
-    
-    if (decim < MIN_CIC_DECIM || decim > MAX_CIC_DECIM)
-      ok = false;
-    else {
-      dsp_rx_regs->decim_rate = (hb1<<9) | (hb2<<8) | decim;
-      // printf("Decim: %d, register %d\n", p->decim, (hb1<<9) | (hb2<<8) | decim);
-    }
-  }
-
-  if (p->valid & CFGV_SCALE_IQ){
-    dsp_rx_regs->scale_iq = p->scale_iq;
-  }
-
-  // Build reply subpacket
-
-  r->opcode = OP_CONFIG_RX_REPLY_V2;
-  r->len = sizeof(*r);
-  r->rid = p->rid;
-  r->ok = ok;
-  r->inverted = tune_result.inverted;
-  r->baseband_freq_hi = u2_fxpt_freq_hi(tune_result.baseband_freq);
-  r->baseband_freq_lo = u2_fxpt_freq_lo(tune_result.baseband_freq);
-  r->ddc_freq_hi = u2_fxpt_freq_hi(tune_result.dxc_freq);
-  r->ddc_freq_lo = u2_fxpt_freq_lo(tune_result.dxc_freq);
-  r->residual_freq_hi = u2_fxpt_freq_hi(tune_result.residual_freq);
-  r->residual_freq_lo = u2_fxpt_freq_lo(tune_result.residual_freq);
-
-  return r->len;
-}
-
-static size_t
-read_time_cmd(const op_generic_t *p,
-	      void *reply_payload, size_t reply_payload_space)
-{
-  op_read_time_reply_t *r = (op_read_time_reply_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))		
-    return 0;					// no room
-
-  r->opcode = OP_READ_TIME_REPLY;
-  r->len = sizeof(*r);
-  r->rid = p->rid;
-  r->time = timer_regs->time;
-
-  return r->len;
-}
-
-static void
-fill_db_info(u2_db_info_t *p, const struct db_base *db)
-{
-  p->dbid = db->dbid;
-  p->freq_min_hi = u2_fxpt_freq_hi(db->freq_min);
-  p->freq_min_lo = u2_fxpt_freq_lo(db->freq_min);
-  p->freq_max_hi = u2_fxpt_freq_hi(db->freq_max);
-  p->freq_max_lo = u2_fxpt_freq_lo(db->freq_max);
-  p->gain_min = db->gain_min;
-  p->gain_max = db->gain_max;
-  p->gain_step_size = db->gain_step_size;
-}
-
-static size_t
-dboard_info_cmd(const op_generic_t *p,
-		void *reply_payload, size_t reply_payload_space)
-{
-  op_dboard_info_reply_t *r = (op_dboard_info_reply_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))		
-    return 0;					// no room
-
-  r->opcode = OP_DBOARD_INFO_REPLY;
-  r->len = sizeof(*r);
-  r->rid = p->rid;
-  r->ok = true;
-
-  fill_db_info(&r->tx_db_info, tx_dboard);
-  fill_db_info(&r->rx_db_info, rx_dboard);
-
-  return r->len;
-}
-
-static size_t
-peek_cmd(const op_peek_t *p,
-	 void *reply_payload, size_t reply_payload_space)
-{
-  op_generic_t *r = (op_generic_t *) reply_payload;
-
-  putstr("peek: addr="); puthex32(p->addr);
-  printf(" bytes=%u\n", p->bytes);
-
-  if ((reply_payload_space < (sizeof(*r) + p->bytes)) ||
-      p->bytes > MAX_SUBPKT_LEN - sizeof(op_generic_t)) {
-    putstr("peek: insufficient reply packet space\n");
-    return 0;			// FIXME do partial read?
-  }
-
-  r->opcode = OP_PEEK_REPLY;
-  r->len = sizeof(*r)+p->bytes;
-  r->rid = p->rid;
-  r->ok = true;
-
-  memcpy_wa(reply_payload+sizeof(*r), (void *)p->addr, p->bytes);
-
-  return r->len;
-}
-
-static bool
-poke_cmd(const op_poke_t *p)
-{
-  int bytes = p->len - sizeof(*p);
-  putstr("poke: addr="); puthex32(p->addr);
-  printf(" bytes=%u\n", bytes);
-
-  uint8_t *src = (uint8_t *)p + sizeof(*p);
-  memcpy_wa((void *)p->addr, src, bytes);
-
-  return true;
-}
-
-static size_t
-generic_reply(const op_generic_t *p,
-	      void *reply_payload, size_t reply_payload_space,
-	      bool ok)
-{
-  op_generic_t *r = (op_generic_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))		
-    return 0;					// no room
-
-  r->opcode = p->opcode | OP_REPLY_BIT;
-  r->len = sizeof(*r);
-  r->rid = p->rid;
-  r->ok = ok;
-
-  return r->len;
-}
-
-static size_t
-add_eop(void *reply_payload, size_t reply_payload_space)
-{
-  op_generic_t *r = (op_generic_t *) reply_payload;
-  if (reply_payload_space < sizeof(*r))		
-    return 0;					// no room
-
-  r->opcode = OP_EOP;
-  r->len = sizeof(*r);
-  r->rid = 0;
-  r->ok =  0;
-
-  return r->len;
-}
-
-void
-handle_control_chan_frame(u2_eth_packet_t *pkt, size_t len)
-{
-  unsigned char reply[sizeof(u2_eth_packet_t) + 4 * sizeof(u2_subpkt_t)] _AL4;
-  unsigned char *reply_payload = &reply[sizeof(u2_eth_packet_t)];
-  int reply_payload_space = sizeof(reply) - sizeof(u2_eth_packet_t);
-
-  // initialize reply
-  memset(reply, 0, sizeof(reply));
-  set_reply_hdr((u2_eth_packet_t *) reply, pkt);
-
-  // point to beginning of payload (subpackets)
-  unsigned char *payload = ((unsigned char *) pkt) + sizeof(u2_eth_packet_t);
-  int payload_len = len - sizeof(u2_eth_packet_t);
-
-  size_t subpktlen = 0;
-
-  while (payload_len >= sizeof(op_generic_t)){
-    const op_generic_t *gp = (const op_generic_t *) payload;
-    subpktlen = 0;
-
-    // printf("\nopcode = %d\n", gp->opcode);
-
-    switch(gp->opcode){
-    case OP_EOP:		// end of subpackets
-      goto end_of_subpackets;
-
-    case OP_ID:
-      subpktlen = op_id_cmd(gp, reply_payload, reply_payload_space);
-      break;
-    
-    case OP_CONFIG_TX_V2:
-      subpktlen = config_tx_v2_cmd((op_config_tx_v2_t *) payload,
-				   reply_payload, reply_payload_space);
-      break;
-
-    case OP_CONFIG_RX_V2:
-      subpktlen = config_rx_v2_cmd((op_config_rx_v2_t *) payload,
-				   reply_payload, reply_payload_space);
-      break;
-
-    case OP_START_RX_STREAMING:
-      start_rx_streaming_cmd(&pkt->ehdr.src, (op_start_rx_streaming_t *) payload);
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space, true);
-      break;
-    
-    case OP_STOP_RX:
-      stop_rx_cmd();
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space, true);
-      break;
-    
-    case OP_BURN_MAC_ADDR:
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space,
-				burn_mac_addr((op_burn_mac_addr_t *) payload));
-      break;
-
-    case OP_CONFIG_MIMO:
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space,
-				config_mimo_cmd((op_config_mimo_t *) payload));
-      break;
-
-    case OP_READ_TIME:
-      subpktlen = read_time_cmd(gp, reply_payload, reply_payload_space);
-      break;
-
-    case OP_DBOARD_INFO:
-      subpktlen = dboard_info_cmd(gp, reply_payload, reply_payload_space);
-      break;
-
-    case OP_SYNC_TO_PPS:
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space,
-				sync_to_pps((op_generic_t *) payload));
-      break;
-
-    case OP_PEEK:
-      subpktlen = peek_cmd((op_peek_t *)payload, reply_payload, reply_payload_space);
-      break;
-
-    case OP_POKE:
-      subpktlen = generic_reply(gp, reply_payload, reply_payload_space,
-				poke_cmd((op_poke_t *)payload));
-      break;
-
-    default:
-      printf("app_common_v2: unhandled opcode = %d\n", gp->opcode);
-      break;
-    }
-
-    int t = (gp->len + 3) & ~3;		// bump to a multiple of 4
-    payload += t;
-    payload_len -= t;
-
-    subpktlen = (subpktlen + 3) & ~3;	// bump to a multiple of 4
-    reply_payload += subpktlen;
-    reply_payload_space -= subpktlen;
-  }
-
- end_of_subpackets:
-
-  // add the EOP marker
-  subpktlen = add_eop(reply_payload, reply_payload_space);
-  subpktlen = (subpktlen + 3) & ~3;	// bump to a multiple of 4
-  reply_payload += subpktlen;
-  reply_payload_space -= subpktlen;
-
-  send_reply(reply, reply_payload - reply);
-}
-
-
-/*
- * Called when an ethernet packet is received.
- * Return true if we handled it here, otherwise
- * it'll be passed on to the DSP Tx pipe
- */
-int
-eth_pkt_inspector(bsm12_t *sm, int bufno)
-{
-  u2_eth_packet_t *pkt = (u2_eth_packet_t *) buffer_ram(bufno);
-  size_t byte_len = (buffer_pool_status->last_line[bufno] - 3) * 4;
-
-  //static size_t last_len = 0;
-
-  // hal_toggle_leds(0x1);
-
-  // inspect rcvd frame and figure out what do do.
-
-  if (pkt->ehdr.ethertype != U2_ETHERTYPE)
-    return true;	// ignore, probably bogus PAUSE frame from MAC
-
-  int chan = u2p_chan(&pkt->fixed);
-
-  switch (chan){
-  case CONTROL_CHAN:
-    handle_control_chan_frame(pkt, byte_len);
-    return -1;
-    break;
-
-  case 0:
-    return 0;	// pass it off to DSP TX
-
-  case 1:
-    return 1;	// pass it off to SERDES TX
-
-  default:
-    abort();
-    break;
-  }
-}
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  link_is_up = speed != 0;
-  hal_set_leds(link_is_up ? LED_RJ45 : 0x0, LED_RJ45);
-  printf("\neth link changed: speed = %d\n", speed);
-}
-
-
-void
-print_tune_result(char *msg, bool tune_ok,
-		  u2_fxpt_freq_t target_freq, struct tune_result *r)
-{
-#if 0
-  printf("db_tune %s %s\n", msg, tune_ok ? "true" : "false");
-  putstr("  target_freq   "); print_fxpt_freq(target_freq); newline();
-  putstr("  baseband_freq "); print_fxpt_freq(r->baseband_freq); newline();
-  putstr("  dxc_freq      "); print_fxpt_freq(r->dxc_freq); newline();
-  putstr("  residual_freq "); print_fxpt_freq(r->residual_freq); newline();
-  printf("  inverted      %s\n", r->inverted ? "true" : "false");
-#endif
-}
diff --git a/firmware/microblaze/apps/mimo_app_common_v2.h b/firmware/microblaze/apps/mimo_app_common_v2.h
deleted file mode 100644
index 1e62ced37..000000000
--- a/firmware/microblaze/apps/mimo_app_common_v2.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_APP_COMMON_H
-#define INCLUDED_APP_COMMON_H
-
-#include <stdbool.h>
-#include "usrp2_eth_packet.h"
-#include "bsm12.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include <stddef.h>
-#include <db.h>
-
-#define CPU_TX_BUF 	7	// cpu -> eth
-
-#define	_AL4 __attribute__((aligned (4)))
-
-extern volatile bool link_is_up;	// eth handler sets this
-
-// If there's a dbsm that sends to the ethernet, put it's address here
-extern dbsm_t *ac_could_be_sending_to_eth;
-
-extern int cpu_tx_buf_dest_port;
-
-void set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt);
-
-/*
- * Called when an ethernet packet is received.
- */
-int eth_pkt_inspector(bsm12_t *sm, int bufno);
-
-
-void link_changed_callback(int speed);
-
-void
-print_tune_result(char *msg, bool tune_ok,
-		  u2_fxpt_freq_t target_freq, struct tune_result *r);
-
-
-void start_rx_streaming_cmd(const eth_mac_addr_t *host, op_start_rx_streaming_t *p);
-void stop_rx_cmd(void);
-void restart_streaming(void);
-bool is_streaming(void);
-
-void handle_control_chan_frame(u2_eth_packet_t *pkt, size_t len);
-
-#endif /* INCLUDED_APP_COMMON_H */
diff --git a/firmware/microblaze/apps/mimo_tx.c b/firmware/microblaze/apps/mimo_tx.c
deleted file mode 100644
index e0f8aa6fa..000000000
--- a/firmware/microblaze/apps/mimo_tx.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * Copyright 2007,2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/*
- * This is a down and dirty test program that confirms that the we can
- * coherently transmit different signals to two USRP2s connected via a
- * mimo cable.  This code runs in the USRP2 connected to the ethernet.
- * The other USRP runs mimo_tx_slave.  The host runs test_mimo_tx.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "bsm12.h"
-#include "mimo_app_common_v2.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include "clocks.h"
-
-#define FW_SETS_SEQNO	1	// define to 0 or 1 (FIXME must be 1 for now)
-
-#if (FW_SETS_SEQNO)
-static int fw_seqno;	// used when f/w is filling in sequence numbers
-#endif
-
-
-/*
- * Experimental code to transmit packets to DSP Tx and SERDES
- *
- * Hard wire the Tx config so we don't have to deal with control stuff yet.
- */
-
-#define	BUF_BSM12_0	4
-#define	BUF_BSM12_1	5
-#define	BUF_BSM12_2	6
-
-//#define CPU_TX_BUF	7	// cpu -> eth
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4)
-
-// Receive from ethernet
-buf_cmd_args_t bsm12_recv_args = {
-  PORT_ETH,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t bsm12_send0_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past transport header
-  0			// filled in from last_line register
-};
-
-// send to SERDES
-buf_cmd_args_t bsm12_send1_args = {
-  PORT_SERDES,
-  0,			// starts just past transport header
-  0			// filled in from last_line register
-};
-
-bsm12_t bsm12_sm;	// the state machine
-
-#if 0
-/*
- * ================================================================
- *   configure DSP RX double buffering state machine (dsp -> eth)
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4 + 1)
-
-// receive from DSP
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_DSP,
-  DSP_RX_FIRST_LINE,
-  BP_LAST_LINE
-};
-
-// send to ETH
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_ETH,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-#endif
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-// variables for streaming mode
-
-static bool         streaming_p = false;
-static unsigned int streaming_items_per_frame = 0;
-static int          streaming_frame_count = 0;
-#define FRAMES_PER_CMD	1000
-
-bool is_streaming(void){ return streaming_p; }
-
-
-// ----------------------------------------------------------------
-
-
-void
-restart_streaming(void)
-{
-#if 0
-  // setup RX DSP regs
-  dsp_rx_regs->clear_state = 1;			// reset
-
-  streaming_p = true;
-  streaming_frame_count = FRAMES_PER_CMD;
-
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);			// set "chain" bit
-
-  // kick off the state machine
-  dbsm_start(&dsp_rx_sm);
-
-  dsp_rx_regs->rx_time = 0;		// enqueue first of two commands
-
-  // make sure this one and the rest have the "now" and "chain" bits set.
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);				
-
-  dsp_rx_regs->rx_time = 0;		// enqueue second command
-#endif
-}
-
-void
-start_rx_streaming_cmd(const eth_mac_addr_t *host, op_start_rx_streaming_t *p)
-{
-#if 0
-  host_mac_addr = *host;	// remember who we're sending to
-
-  /*
-   * Construct  ethernet header and word0 and preload into two buffers
-   */
-  u2_eth_packet_t	pkt;
-  memset(&pkt, 0, sizeof(pkt));
-  pkt.ehdr.dst = *host;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  u2p_set_word0(&pkt.fixed, 0, 0);
-  // DSP RX will fill in timestamp
-
-  memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
-  memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
-
-
-  if (FW_SETS_SEQNO)
-    fw_seqno = 0;
-
-  streaming_items_per_frame = p->items_per_frame;
-  restart_streaming();
-#endif
-}
-
-
-void
-stop_rx_cmd(void)
-{
-#if 0
-  streaming_p = false;
-  dsp_rx_regs->clear_state = 1;	// flush cmd queue
-  bp_clear_buf(DSP_RX_BUF_0);
-  bp_clear_buf(DSP_RX_BUF_1);
-#endif
-}
-
-
-static void
-setup_tx()
-{
-  dsp_tx_regs->clear_state = 1;
-
-  int tx_scale = 2500;
-  int interp = 8;		// * 4
-
-  // setup some defaults
-
-  dsp_tx_regs->freq = 429496730;	// 10MHz
-  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = (1 << 9) | (1 << 8) | interp;
-}
-
-
-#if 0
-#if (FW_SETS_SEQNO)
-/*
- * Debugging ONLY.  This will be handled by the tx_protocol_engine.
- *
- * This is called when the DSP Rx chain has filled in a packet.
- * We set and increment the seqno, then return false, indicating
- * that we didn't handle the packet.  A bit of a kludge
- * but it should work.
- */
-int
-fw_sets_seqno_inspector(bsm12_t *sm, int buf_this)
-{
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t seqno = fw_seqno++;
-
-  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
-  uint32_t t = p[4];
-  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
-  p[4] = t;
-
-  // queue up another rx command when required
-  if (streaming_p && --streaming_frame_count == 0){
-    streaming_frame_count = FRAMES_PER_CMD;
-    dsp_rx_regs->rx_time = 0;
-  }
-
-  return false;		// we didn't handle the packet
-}
-#endif
-#endif
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  uint32_t  status = buffer_pool_status->status;
-
-  bsm12_process_status(&bsm12_sm, status);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nMIMO Tx\n");
-  print_mac_addr(ethernet_mac_addr()->addr);
-  newline();
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-  ethernet_init();
-
-  clocks_mimo_config(MC_WE_DONT_LOCK | MC_PROVIDE_CLK_TO_MIMO);
-
-#if 0
-  // make bit 15 of Tx gpio's be a s/w output
-  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
-#endif
-
-  output_regs->debug_mux_ctrl = 1;
-#if 0
-  hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
-  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
-#endif
-
-
-  // initialize double buffering state machine for ethernet -> DSP Tx
-
-  bsm12_init(&bsm12_sm, BUF_BSM12_0,
-	     &bsm12_recv_args, &bsm12_send0_args, &bsm12_send1_args,
-	     eth_pkt_inspector);
-
-
-#if 0
-  // initialize double buffering state machine for DSP RX -> Ethernet
-
-  if (FW_SETS_SEQNO){
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      fw_sets_seqno_inspector);
-  }
-  else {
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      dbsm_nop_inspector);
-  }
-
-  // tell app_common that this dbsm could be sending to the ethernet
-  ac_could_be_sending_to_eth = &dsp_rx_sm;
-#endif
-
-
-  // program tx registers
-  setup_tx();
-
-  // kick off the state machine
-  bsm12_start(&bsm12_sm);
-
-  //int which = 0;
-
-  while(1){
-    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
-    // which ^= 0x8000;
-
-    buffer_irq_handler(0);
-
-    int pending = pic_regs->pending;		// poll for under or overrun
-
-    if (pending & PIC_UNDERRUN_INT){
-      // dbsm_handle_tx_underrun(&dsp_tx_sm);
-      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
-      putchar('U');
-    }
-
-    if (pending & PIC_OVERRUN_INT){
-      // dbsm_handle_rx_overrun(&dsp_rx_sm);
-      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt
-
-      // FIXME Figure out how to handle this robustly.
-      // Any buffers that are emptying should be allowed to drain...
-
-      if (streaming_p){
-	// restart_streaming();
-	// FIXME report error
-      }
-      else {
-	// FIXME report error
-      }
-      putchar('O');
-    }
-  }
-}
diff --git a/firmware/microblaze/apps/mimo_tx_slave.c b/firmware/microblaze/apps/mimo_tx_slave.c
deleted file mode 100644
index cdf9c03c2..000000000
--- a/firmware/microblaze/apps/mimo_tx_slave.c
+++ /dev/null
@@ -1,376 +0,0 @@
-/*
- * Copyright 2007,2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/*
- * This is a down and dirty test program that confirms that the we can
- * coherently transmit different signals to two USRP2s connected via a
- * mimo cable.  This code runs in the USRP2 NOT connected to the
- * ethernet.  The USRP connected to the ethernet runs mimo_tx.  The
- * host runs test_mimo_tx.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common_v2.h"
-#include "memcpy_wa.h"
-#include "clocks.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-
-#define FW_SETS_SEQNO	1	// define to 0 or 1 (FIXME must be 1 for now)
-
-#if (FW_SETS_SEQNO)
-static int fw_seqno;	// used when f/w is filling in sequence numbers
-#endif
-
-
-/*
- * Full duplex Tx and Rx between serdes and DSP pipelines
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to serdes flow
- * Buffers 4 and 5 are used to double-buffer the serdes to DSP Tx flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-
-#define	DSP_RX_BUF_0	2	// dsp rx -> serdes (double buffer)
-#define	DSP_RX_BUF_1	3	// dsp rx -> serdes
-#define	DSP_TX_BUF_0	4	// serdes -> dsp tx (double buffer)
-#define	DSP_TX_BUF_1	5	// serdes -> dsp tx
-
-/*
- * ==================================================================
- *   configure DSP TX double buffering state machine (serdes -> dsp)
- * ==================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4)
-
-// Receive from serdes
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_SERDES,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past transport header
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-/*
- * =================================================================
- *   configure DSP RX double buffering state machine (dsp -> serdes)
- * =================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4 + 1)
-
-// receive from DSP
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_DSP,
-  DSP_RX_FIRST_LINE,
-  BP_LAST_LINE
-};
-
-// send to serdes
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_SERDES,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-// variables for streaming mode
-
-static bool         streaming_p = false;
-static unsigned int streaming_items_per_frame = 0;
-static int          streaming_frame_count = 0;
-#define FRAMES_PER_CMD	1000
-
-bool is_streaming(void){ return streaming_p; }
-
-// ----------------------------------------------------------------
-
-
-void
-restart_streaming(void)
-{
-  // setup RX DSP regs
-  dsp_rx_regs->clear_state = 1;			// reset
-
-  streaming_p = true;
-  streaming_frame_count = FRAMES_PER_CMD;
-
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);			// set "chain" bit
-
-  // kick off the state machine
-  dbsm_start(&dsp_rx_sm);
-
-  dsp_rx_regs->rx_time = 0;		// enqueue first of two commands
-
-  // make sure this one and the rest have the "now" and "chain" bits set.
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);				
-
-  dsp_rx_regs->rx_time = 0;		// enqueue second command
-}
-
-void
-start_rx_streaming_cmd(const eth_mac_addr_t *host, op_start_rx_streaming_t *p)
-{
-  host_mac_addr = *host;	// remember who we're sending to
-
-  /*
-   * Construct  ethernet header and word0 and preload into two buffers
-   */
-  u2_eth_packet_t	pkt;
-  memset(&pkt, 0, sizeof(pkt));
-  pkt.ehdr.dst = *host;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  u2p_set_word0(&pkt.fixed, 0, 0);
-  // DSP RX will fill in timestamp
-
-  memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
-  memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
-
-
-  if (FW_SETS_SEQNO)
-    fw_seqno = 0;
-
-  streaming_items_per_frame = p->items_per_frame;
-  restart_streaming();
-}
-
-
-void
-stop_rx_cmd(void)
-{
-  streaming_p = false;
-  dsp_rx_regs->clear_state = 1;	// flush cmd queue
-  bp_clear_buf(DSP_RX_BUF_0);
-  bp_clear_buf(DSP_RX_BUF_1);
-}
-
-
-static void
-setup_tx()
-{
-  dsp_tx_regs->clear_state = 1;
-  bp_clear_buf(DSP_TX_BUF_0);
-  bp_clear_buf(DSP_TX_BUF_1);
-
-  int tx_scale = 2500;
-  int interp = 8;		// * 4
-
-  // setup some defaults
-
-  dsp_tx_regs->freq = 429496730;	// 10MHz
-  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = (1 << 9) | (1 << 8) | interp;
-}
-
-
-#if (FW_SETS_SEQNO)
-/*
- * Debugging ONLY.  This will be handled by the tx_protocol_engine.
- *
- * This is called when the DSP Rx chain has filled in a packet.
- * We set and increment the seqno, then return false, indicating
- * that we didn't handle the packet.  A bit of a kludge
- * but it should work.
- */
-bool 
-fw_sets_seqno_inspector(dbsm_t *sm, int buf_this)	// returns false
-{
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t seqno = fw_seqno++;
-
-  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
-  uint32_t t = p[4];
-  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
-  p[4] = t;
-
-  // queue up another rx command when required
-  if (streaming_p && --streaming_frame_count == 0){
-    streaming_frame_count = FRAMES_PER_CMD;
-    dsp_rx_regs->rx_time = 0;
-  }
-
-  return false;		// we didn't handle the packet
-}
-#endif
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  // hal_toggle_leds(LED_A);
-
-  uint32_t  status = buffer_pool_status->status;
-
-  if (0 && (status & ~BPS_IDLE_ALL)){
-    putstr("status = ");
-    puthex32_nl(status);
-  }
-
-  dbsm_process_status(&dsp_tx_sm, status);
-  dbsm_process_status(&dsp_rx_sm, status);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  output_regs->led_src = 0x3;		// h/w controls bottom two bits
-  clocks_enable_test_clk(true, 1);
-
-  putstr("\nMIMO Tx Slave\n");
-
-  cpu_tx_buf_dest_port = PORT_SERDES;
-
-  // ethernet_register_link_changed_callback(link_changed_callback);
-  // ethernet_init();
-
-  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);
-
-  // puts("post clocks_mimo_config");
-
-#if 0
-  // make bit 15 of Tx gpio's be a s/w output
-  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
-#endif
-
-#if 0
-  output_regs->debug_mux_ctrl = 1;
-  hal_gpio_set_sels(GPIO_TX_BANK, "0000000000000000");
-  hal_gpio_set_sels(GPIO_RX_BANK, "0000000000000000");
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
-  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
-#endif
-
-
-  // initialize double buffering state machine for ethernet -> DSP Tx
-
-  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
-	    &dsp_tx_recv_args, &dsp_tx_send_args,
-	    eth_pkt_inspector);
-
-
-  //output_regs->flush_icache = 1;
- 
-  // initialize double buffering state machine for DSP RX -> Ethernet
-
-  if (FW_SETS_SEQNO){
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      fw_sets_seqno_inspector);
-  }
-  else {
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      dbsm_nop_inspector);
-  }
-
-  // puts("post dbsm_init's");
-
-  // tell app_common that this dbsm could be sending to the ethernet
-  ac_could_be_sending_to_eth = &dsp_rx_sm;
-
-
-  // program tx registers
-  setup_tx();
-
-  // puts("post setup_tx");
-
-  // kick off the state machine
-  dbsm_start(&dsp_tx_sm);
-
-  // puts("post dbsm_start");
-
-  //int which = 0;
-
-  while(1){
-    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
-    // which ^= 0x8000;
-
-    buffer_irq_handler(0);
-
-    int pending = pic_regs->pending;		// poll for under or overrun
-
-    if (pending & PIC_UNDERRUN_INT){
-      dbsm_handle_tx_underrun(&dsp_tx_sm);
-      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
-      putchar('U');
-    }
-
-    if (pending & PIC_OVERRUN_INT){
-      dbsm_handle_rx_overrun(&dsp_rx_sm);
-      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt
-
-      // FIXME Figure out how to handle this robustly.
-      // Any buffers that are emptying should be allowed to drain...
-
-      if (streaming_p){
-	// restart_streaming();
-	// FIXME report error
-      }
-      else {
-	// FIXME report error
-      }
-      putchar('O');
-    }
-  }
-}
diff --git a/firmware/microblaze/apps/rcv_eth_packets.c b/firmware/microblaze/apps/rcv_eth_packets.c
deleted file mode 100644
index 03fc94354..000000000
--- a/firmware/microblaze/apps/rcv_eth_packets.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "memcpy_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-
-
-// ----------------------------------------------------------------
-
-static eth_mac_addr_t dst_mac_addr =
-  {{  0xff, 0xff, 0xff, 0xff, 0xff, 0xff }};
-
-
-// ----------------------------------------------------------------
-
-#define	PACKET_SIZE 1500		// bytes
-#define ETH_DATA_RATE 1000000		// 1MB/s
-#define	ETH_PACKET_RATE (ETH_DATA_RATE/PACKET_SIZE)	// 13,3333 pkts/s
-
-#define TIMER_RATE 100000000		// 100 MHz clock
-
-static int timer_delta = TIMER_RATE/ETH_PACKET_RATE;	// ticks between interrupts
-
-static volatile bool send_packet_now = false;   // timer handler sets this
-static volatile bool link_is_up = false;	// eth handler sets this
-
-int packet_number = 0;
-
-// ----------------------------------------------------------------
-
-// debugging output on tx pins
-#define LS_MASK  0xE0000
-#define LS_1000  0x80000
-#define LS_100   0x40000
-#define LS_10    0x20000
-
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  int v = 0;
-  switch(speed){
-  case 10:
-    v = LS_10;
-    link_is_up = true;
-    break;
-    
-  case 100:
-    v = LS_100;
-    link_is_up = true;
-    break;
-    
-  case 1000:
-    v = LS_100;
-    link_is_up = true;
-    break;
-
-  default:
-    v = 0;
-    link_is_up = false;
-    break;
-  }
-
-  //hal_gpio_set_tx(v, LS_MASK);	/* set debug bits on d'board */
-
-  putstr("\neth link changed: speed = ");
-  puthex16_nl(speed);
-}
-
-void
-timer_irq_handler(unsigned irq)
-{
-  hal_set_timeout(timer_delta);	// schedule next timeout
-  send_packet_now = 1;
-}
-
-
-void
-buffer_irq_handler(unsigned irq)
-{
-  // FIXME
-}
-
-static void
-init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
-{
-  int i = 0;
-  int mark = ((bufnum & 0xff) << 24) | 0x005A0000;
-
-  for (i = 0; i < BP_NLINES; i++){
-    buf[i] = mark | i;
-    mark ^= 0x00FF0000;
-  }
-
-  // copy header into buffer
-  memcpy_wa(buf, pkt, sizeof(*pkt));
-}
-
-static void
-init_packets(void)
-{
-  int	i;
-  
-  u2_eth_packet_t	pkt __attribute__((aligned (4)));
-
-  pkt.ehdr.dst = dst_mac_addr;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-
-  // fill ALL buffers for debugging
-  for (i = 0; i < 8; i++)
-    init_packet((void *)buffer_ram(i), &pkt, i);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  int	prev_leds = -1;
-  int	new_leds  = 0x00;
-  output_regs->leds = 0x00;
-
-  int peak_hold_count = 0;
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\nrcv_eth_packets\n");
-  
-  init_packets();
-
-  // pic_register_handler(IRQ_BUFFER, buffer_irq_handler);  // poll for now
-
-  // FIXME turn off timer since I don't think MTS and MFS instructions are implemented
-  // pic_register_handler(IRQ_TIMER, timer_irq_handler);
-  // hal_set_timeout(timer_delta);
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-
-  ethernet_init();
-
-  //eth_mac->speed = 4;	// FIXME hardcode mac speed to 1000
-
-  // kick off a receive
-  bp_receive_to_buf(2, PORT_ETH, 1, 0, 511);
-
-  while(1){
-    // u2_eth_packet_t	pkt;
-
-    new_leds = 0;
-    if (link_is_up)
-      new_leds = 0x2;
-
-    if ((buffer_pool_status->status & (BPS_DONE_2|BPS_ERROR_2)) != 0){
-      // we've got a packet!
-
-#if 0
-      // copy to stack buffer so we can byte address it
-      memcpy_wa(&pkt, (void *)buffer_ram(2), sizeof(pkt));
-      
-      putstr("Rx: src: ");
-      print_mac_addr(pkt.ehdr.dst_addr);
-      putstr(" dst: ");
-      print_mac_addr(pkt.ehdr.src_addr);
-      putstr(" ethtype: ");
-      puthex16(pkt.ehdr.ethertype);
-      putstr(" len: ");
-      int len = (buffer_pool_status->last_line[2] + 1) * 4;
-      puthex16_nl(len);
-#else
-      volatile int *bp = buffer_ram(2);
-      int	i;
-      for (i = 0; i < 16; i++){
-	puthex8(i);
-	putchar(':');
-	puthex32_nl(bp[i]);
-      }
-#endif
-      
-      // kick off next receive
-      bp_clear_buf(2);
-      bp_receive_to_buf(2, PORT_ETH, 1, 0, 511);
-
-      peak_hold_count = 2048 * 10;
-    }
-
-    if (peak_hold_count > 0){
-      peak_hold_count--;
-      new_leds |= 0x1;
-    }
-
-    if (new_leds != prev_leds){
-      prev_leds = new_leds;
-      output_regs->leds = new_leds;
-    }
-  }
-
-  hal_finish();
-  return 1;
-}
diff --git a/firmware/microblaze/apps/read_dbids.c b/firmware/microblaze/apps/read_dbids.c
deleted file mode 100644
index 24c6d9ab4..000000000
--- a/firmware/microblaze/apps/read_dbids.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <nonstdio.h>
-#include <u2_init.h>
-#include <stdbool.h>
-#include <usrp2_i2c_addr.h>
-#include <i2c.h>
-
-
-int main(void)
-{
-  u2_init();
-
-  puts("\nread_dbids");
-
-  unsigned char dbid_tx[2];
-  unsigned char dbid_rx[2];
-  bool ok;
-
-  ok = eeprom_read(I2C_ADDR_TX_A, 1, dbid_tx, 2);
-  if (!ok){
-    puts("failed to read Tx Daugherboard EEPROM");
-  }
-  else {
-    putstr("Tx Daugherboard ID: ");
-    puthex8(dbid_tx[1]);    // MSB
-    puthex8(dbid_tx[0]);    // LSB
-    newline();
-  }
-
-  ok = eeprom_read(I2C_ADDR_RX_A, 1, dbid_rx, 2);
-  if (!ok){
-    puts("failed to read Rx Daugherboard EEPROM");
-  }
-  else {
-    putstr("Rx Daugherboard ID: ");
-    puthex8(dbid_rx[1]);    // MSB
-    puthex8(dbid_rx[0]);    // LSB
-    newline();
-  }
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/sd_bounce.c b/firmware/microblaze/apps/sd_bounce.c
deleted file mode 100644
index c1b48f170..000000000
--- a/firmware/microblaze/apps/sd_bounce.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* 
- * Loopback SERDES to SERDES
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "nonstdio.h"
-#include "memset_wa.h"
-#include <dbsm.h>
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <clocks.h>
-
-
-
-// ----------------------------------------------------------------
-
-#define SERDES_RX_BUF_0		0
-#define	SERDES_RX_BUF_1		1
-
-/*
- * ================================================================
- *      configure SD RX double buffering state machine
- * ================================================================
- */
-
-// receive from SERDES
-buf_cmd_args_t sd_recv_args = {
-  PORT_SERDES,
-  0,
-  BP_LAST_LINE
-};
-
-// send to SERDES
-buf_cmd_args_t sd_send_args = {
-  PORT_SERDES,
-  0,		// starts with packet in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t sd_sm;	// the state machine
-
-
-
-
-// ----------------------------------------------------------------
-
-#if 0
-static bool
-check_packet(int *buf, int nlines)
-{
-  bool ok = true;
-  int i = 0;
-  for (i = 0; i < nlines; i++){
-    int expected = ((2*i + 0) << 16) | (2*i+1);
-    if (buf[i] != expected){
-      ok = false;
-      printf("buf[%d] = 0x%x  expected = 0x%x\n", i, buf[i], expected);
-    }
-  }
-  return ok;
-}
-
-static void
-zero_buffer(int bufno)
-{
-  memset_wa(buffer_ram(bufno), 0, BP_NLINES * 4);
-}
-#endif
-
-
-bool
-sd_rx_inspector(dbsm_t *sm, int buf_this)
-{
-  hal_toggle_leds(0x2);
-
-#if 0
-  int last_line = buffer_pool_status->last_line[buf_this];
-  bool ok = check_packet(buffer_ram(buf_this), last_line);
-  static int good = 0;
-  static int bad = 0;
-
-  if (ok)
-    good++;
-  else
-    bad++;
-
-  if(good+bad == 10000) {
-    printf("Good %d\tBad %d\n",good,bad);
-    good = 0;
-    bad = 0;
-  }
-#endif
-
-  return false;
-}
-
-
-inline static void
-buffer_irq_handler(void)
-{
-  uint32_t  status = buffer_pool_status->status;
-  dbsm_process_status(&sd_sm, status);
-}
-
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nsd_bounce\n");
-
-  // Get our clock from the mimo interface
-  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);
-
-  dbsm_init(&sd_sm, SERDES_RX_BUF_0,
-	    &sd_recv_args, &sd_send_args,
-	    sd_rx_inspector);
-
-  // kick off the state machine
-  dbsm_start(&sd_sm);
-
-  while(1){
-    buffer_irq_handler();
-  }
-}
diff --git a/firmware/microblaze/apps/sd_gentest.c b/firmware/microblaze/apps/sd_gentest.c
deleted file mode 100644
index 35e912615..000000000
--- a/firmware/microblaze/apps/sd_gentest.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "nonstdio.h"
-#include "memset_wa.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <clocks.h>
-#include <mdelay.h>
-
-// ----------------------------------------------------------------
-
-int packet_number = 0;
-volatile bool send_packet_now = 0;
-
-#define SERDES_TX_BUF	0
-#define	SERDES_RX_BUF 	1
-
-
-#define NLINES_PER_PKT	380
-
-
-// ----------------------------------------------------------------
-
-//static int timer_delta = (int)(MASTER_CLK_RATE * 100e-6);
-static int timer_delta = 1000000; // .01 second
-
-void
-timer_irq_handler(unsigned irq)
-{
-  hal_set_timeout(timer_delta);	// schedule next timeout
-  send_packet_now = true;
-}
-
-
-static void
-init_packet(int *buf)
-{
-  int i = 0;
-  for (i = 0; i < BP_NLINES; i++){
-    buf[i] = ((2*i + 0) << 16) | (2*i+1);
-  }
-}
-
-static bool
-check_packet(int *buf, int nlines)
-{
-  bool ok = true;
-  int i = 0;
-  for (i = 0; i < nlines; i++){
-    int expected = ((2*i + 0) << 16) | (2*i+1);
-    if (buf[i] != expected){
-      ok = false;
-      printf("buf[%d] = 0x%x  expected = 0x%x\n", i, buf[i], expected);
-    }
-  }
-  return ok;
-}
-
-static void
-zero_buffer(int bufno)
-{
-  memset_wa(buffer_ram(bufno), 0, BP_NLINES * 4);
-}
-
-static void
-init_packets(void)
-{
-  // init just the one we're using
-  init_packet(buffer_ram(SERDES_TX_BUF));
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  // We're free running and provide clock to the MIMO interface
-  clocks_mimo_config(MC_WE_DONT_LOCK | MC_PROVIDE_CLK_TO_MIMO);
-
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  // output_regs->debug_mux_ctrl = 1;
-  // hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  // hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\nsd_gentest\n");
-  
-  // Set up serdes (already enabled)
-  //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN | SERDES_LOOPEN);
-  //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
-
-  init_packets();
-
-  // pic_register_handler(IRQ_TIMER, timer_irq_handler);
-
-  //if (hwconfig_simulation_p())
-  //  timer_delta = sim_timer_delta;
-
-  // start a receive from sd
-  zero_buffer(SERDES_RX_BUF);
-  bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
-
-  // fire off the first packet
-  bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
-  hal_set_timeout(timer_delta);
-  int ready_to_send = 0;
-
-  int counter __attribute__((unused)) = 0;
-  int sent = 1;
-  int txerr = 0;
-  int rxerr = 0;
-  int rcvd = 0;
-  int rxcrc = 0;
-  int sent_acc = 0;
-  int txerr_acc = 0;
-  int rxerr_acc = 0;
-  int rcvd_acc = 0;
-  int rxcrc_acc = 0;
-
-#define EXPECTING_PKT() ((counter & 0x1) == 0)
-#define	SEND_PKT()      ((counter & 0x1) != 0)
-
-  bool got_packet = false;
-
-  while(1){
-    uint32_t status = buffer_pool_status->status;
-
-    if (status & (BPS_DONE(SERDES_RX_BUF))){
-      bp_clear_buf(SERDES_RX_BUF);
-      got_packet = true;
-
-      //hal_toggle_leds(0x2);
-
-      // check packet
-      int last_line = buffer_pool_status->last_line[SERDES_RX_BUF]-1;
-      bool ok = check_packet(buffer_ram(SERDES_RX_BUF), last_line);
-      
-      if (ok) {
-	rcvd++;
-	//putchar('r');
-      }
-      else {
-	rcvd++;
-	rxcrc++;
-	//putchar('P');
-      }
-      // start a receive from sd
-      zero_buffer(SERDES_RX_BUF);
-      bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
-    }
-
-    if (status & (BPS_ERROR(SERDES_RX_BUF))){
-      bp_clear_buf(SERDES_RX_BUF);
-      got_packet = true;
-      rcvd++;
-      rxerr++;
-      //putchar('E');
-
-      // start a receive from sd
-      zero_buffer(SERDES_RX_BUF);
-      bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
-    }
-
-    if (status & (BPS_DONE(SERDES_TX_BUF))){
-      bp_clear_buf(SERDES_TX_BUF);
-      //putchar('t');
-      bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
-      //mdelay(1);
-      int	i;
-      for (i = 0; i < 50; i++){
-	asm volatile ("or  r0, r0, r0\n\
-		   or  r0, r0, r0\n    \
-		   or  r0, r0, r0\n    \
-		   or  r0, r0, r0\n    \
-		   or  r0, r0, r0\n    \
-		   or  r0, r0, r0\n    \
-		   or  r0, r0, r0\n");
-      }
-      sent ++;
-      ready_to_send = 1;
-      //hal_toggle_leds(0x1);
-    }
-
-    if (status & BPS_ERROR(SERDES_TX_BUF)){
-      bp_clear_buf(SERDES_TX_BUF);
-      sent++;
-      txerr++;
-      ready_to_send = 1;
-      //putchar('X');
-    }
-
-    if(sent >=1000) {
-      printf("Status\tSENT %d\tTXERR %d\t",sent,txerr);
-      printf("RX %d\tERR %d\tCRC %d\tMISSED %d\n",rcvd, rxerr, rxcrc, sent-rcvd);
-      sent_acc += sent; sent = 0;
-      txerr_acc += txerr; txerr = 0;
-      rcvd_acc += rcvd; rcvd = 0;
-      rxerr_acc += rxerr; rxerr = 0;
-      rxcrc_acc += rxcrc; rxcrc = 0;
-    }
-
-    if(sent_acc >=10000) {
-      printf("\nOverall\tSENT %d\tTXERR %d\t",sent_acc,txerr_acc);
-      printf("RX %d\tERR %d\tCRC %d\tMISSED %d\n\n",rcvd_acc, rxerr_acc, rxcrc_acc, sent_acc-rcvd_acc);
-      sent_acc = 0;
-      txerr_acc = 0;
-      rcvd_acc = 0;
-      rxerr_acc = 0;
-      rxcrc_acc = 0;
-    }
-#if 0
-    int pending = pic_regs->pending;
-    if (pending & PIC_TIMER_INT){
-      hal_set_timeout(timer_delta);
-      
-      /*
-	if (EXPECTING_PKT()){
-	if (!got_packet)
-	  putchar('T');
-	got_packet = false;
-      }
-
-      if (SEND_PKT()){
-	if (status & BPS_IDLE(SERDES_TX_BUF))
-	  bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
-      }
-      counter++;
-      */
-
-      putchar('T');
-      if(ready_to_send) {
-	bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
-	counter++;
-	ready_to_send = 0;
-      }
-      
-      pic_regs->pending = PIC_TIMER_INT;	// clear pending interrupt
-    }
-#endif
-  }
-  
-  return 0;
-}
diff --git a/firmware/microblaze/apps/serdes_to_dsp.c b/firmware/microblaze/apps/serdes_to_dsp.c
deleted file mode 100644
index 4994e0a69..000000000
--- a/firmware/microblaze/apps/serdes_to_dsp.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-
-/*
- * This program can respond to queries from the host
- * and stream rx samples.
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
- * Buffers 4 and 5 are used to double-buffer the eth to DSP Tx  eth flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-//#define CPU_TX_BUF 	1	// cpu -> eth
-
-#define	DSP_RX_BUF_0	2	// dsp rx -> eth (double buffer)
-#define	DSP_RX_BUF_1	3	// dsp rx -> eth
-#define	DSP_TX_BUF_0	4	// eth -> dsp tx (double buffer)
-#define	DSP_TX_BUF_1	5	// eth -> dsp tx
-
-/*
- * ================================================================
- *      configure DSP TX double buffering state machine
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4)
-
-// Receive from ethernet
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_SERDES,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past transport header
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-
-// ----------------------------------------------------------------
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-void
-start_rx_cmd(const eth_mac_addr_t *host, op_start_rx_t *p)
-{
-}
-
-void
-stop_rx_cmd(void)
-{
-}
-
-static void
-setup_tx()
-{
-  dsp_tx_regs->clear_state = 1;
-  bp_clear_buf(DSP_TX_BUF_0);
-  bp_clear_buf(DSP_TX_BUF_1);
-
-  int tx_scale = 256;
-  int interp = 32;
-
-  op_config_tx_t def_config;
-  memset(&def_config, 0, sizeof(def_config));
-  def_config.phase_inc  = 408021893;			// 9.5 MHz [2**32 * fc/fsample]
-  def_config.scale_iq = (tx_scale << 16) | tx_scale;
-  def_config.interp = interp;
-
-  // setup Tx DSP regs
-  config_tx_cmd(&def_config);
-}
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  //hal_toggle_leds(0x2);
-
-  uint32_t  status = buffer_pool_status->status;
-
-  dbsm_process_status(&dsp_tx_sm, status);
-
-  if (status & BPS_DONE(CPU_TX_BUF)){
-    bp_clear_buf(CPU_TX_BUF);
-  }
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  // Get our clock from the mimo interface
-
-  clocks_enable_test_clk(true,1);
-  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);
-  
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\nserdes_to_dsp\n");
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-  ethernet_init();
-
-
-  // initialize double buffering state machine for ethernet -> DSP Tx
-
-  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
-	    &dsp_tx_recv_args, &dsp_tx_send_args,
-	    eth_pkt_inspector);
-
-  // program tx registers
-  setup_tx();
-
-  // kick off the state machine
-  dbsm_start(&dsp_tx_sm);
-
-  while(1){
-    buffer_irq_handler(0);
-
-    int pending = pic_regs->pending;	// poll for under or overrun
-
-    if (pending & PIC_UNDERRUN_INT){
-      dbsm_handle_tx_underrun(&dsp_tx_sm);
-      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
-      putchar('U');
-    }
-  }
-}
-
diff --git a/firmware/microblaze/apps/serdes_txrx.c b/firmware/microblaze/apps/serdes_txrx.c
deleted file mode 100644
index 2c47c9628..000000000
--- a/firmware/microblaze/apps/serdes_txrx.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/*
- * Copyright 2007,2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "dbsm.h"
-#include "app_common_v2.h"
-#include "memcpy_wa.h"
-#include "clocks.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-
-#define FW_SETS_SEQNO	1	// define to 0 or 1 (FIXME must be 1 for now)
-
-#if (FW_SETS_SEQNO)
-static int fw_seqno;	// used when f/w is filling in sequence numbers
-#endif
-
-
-/*
- * Full duplex Tx and Rx between serdes and DSP pipelines
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to serdes flow
- * Buffers 4 and 5 are used to double-buffer the serdes to DSP Tx flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-
-#define	DSP_RX_BUF_0	2	// dsp rx -> serdes (double buffer)
-#define	DSP_RX_BUF_1	3	// dsp rx -> serdes
-#define	DSP_TX_BUF_0	4	// serdes -> dsp tx (double buffer)
-#define	DSP_TX_BUF_1	5	// serdes -> dsp tx
-
-/*
- * ==================================================================
- *   configure DSP TX double buffering state machine (serdes -> dsp)
- * ==================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4)
-
-// Receive from serdes
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_SERDES,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past transport header
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-/*
- * =================================================================
- *   configure DSP RX double buffering state machine (dsp -> serdes)
- * =================================================================
- */
-
-// 4 lines of ethernet hdr + 1 line transport hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE ((sizeof(u2_eth_hdr_t) + sizeof(u2_transport_hdr_t))/4 + 1)
-
-// receive from DSP
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_DSP,
-  DSP_RX_FIRST_LINE,
-  BP_LAST_LINE
-};
-
-// send to serdes
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_SERDES,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from list_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-// variables for streaming mode
-
-static bool         streaming_p = false;
-static unsigned int streaming_items_per_frame = 0;
-static int          streaming_frame_count = 0;
-#define FRAMES_PER_CMD	1000
-
-bool is_streaming(void){ return streaming_p; }
-
-// ----------------------------------------------------------------
-
-
-void
-restart_streaming(void)
-{
-  // setup RX DSP regs
-  dsp_rx_regs->clear_state = 1;			// reset
-
-  streaming_p = true;
-  streaming_frame_count = FRAMES_PER_CMD;
-
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);			// set "chain" bit
-
-  // kick off the state machine
-  dbsm_start(&dsp_rx_sm);
-
-  dsp_rx_regs->rx_time = 0;		// enqueue first of two commands
-
-  // make sure this one and the rest have the "now" and "chain" bits set.
-  dsp_rx_regs->rx_command =
-    MK_RX_CMD(FRAMES_PER_CMD * streaming_items_per_frame,
-	      streaming_items_per_frame,
-	      1, 1);				
-
-  dsp_rx_regs->rx_time = 0;		// enqueue second command
-}
-
-void
-start_rx_streaming_cmd(const eth_mac_addr_t *host, op_start_rx_streaming_t *p)
-{
-  host_mac_addr = *host;	// remember who we're sending to
-
-  /*
-   * Construct  ethernet header and word0 and preload into two buffers
-   */
-  u2_eth_packet_t	pkt;
-  memset(&pkt, 0, sizeof(pkt));
-  pkt.ehdr.dst = *host;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  u2p_set_word0(&pkt.fixed, 0, 0);
-  // DSP RX will fill in timestamp
-
-  memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt));
-  memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt));
-
-
-  if (FW_SETS_SEQNO)
-    fw_seqno = 0;
-
-  streaming_items_per_frame = p->items_per_frame;
-  restart_streaming();
-}
-
-
-void
-stop_rx_cmd(void)
-{
-  streaming_p = false;
-  dsp_rx_regs->clear_state = 1;	// flush cmd queue
-  bp_clear_buf(DSP_RX_BUF_0);
-  bp_clear_buf(DSP_RX_BUF_1);
-}
-
-
-static void
-setup_tx()
-{
-  dsp_tx_regs->clear_state = 1;
-  bp_clear_buf(DSP_TX_BUF_0);
-  bp_clear_buf(DSP_TX_BUF_1);
-
-  int tx_scale = 256;
-  int interp = 32;
-
-  // setup some defaults
-
-  dsp_tx_regs->freq = 0;
-  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = interp;
-}
-
-
-#if (FW_SETS_SEQNO)
-/*
- * Debugging ONLY.  This will be handled by the tx_protocol_engine.
- *
- * This is called when the DSP Rx chain has filled in a packet.
- * We set and increment the seqno, then return false, indicating
- * that we didn't handle the packet.  A bit of a kludge
- * but it should work.
- */
-bool 
-fw_sets_seqno_inspector(dbsm_t *sm, int buf_this)	// returns false
-{
-  uint32_t *p = buffer_ram(buf_this);
-  uint32_t seqno = fw_seqno++;
-
-  // KLUDGE all kinds of nasty magic numbers and embedded knowledge
-  uint32_t t = p[4];
-  t = (t & 0xffff00ff) | ((seqno & 0xff) << 8);
-  p[4] = t;
-
-  // queue up another rx command when required
-  if (streaming_p && --streaming_frame_count == 0){
-    streaming_frame_count = FRAMES_PER_CMD;
-    dsp_rx_regs->rx_time = 0;
-  }
-
-  return false;		// we didn't handle the packet
-}
-#endif
-
-
-inline static void
-buffer_irq_handler(unsigned irq)
-{
-  // hal_toggle_leds(LED_A);
-
-  uint32_t  status = buffer_pool_status->status;
-
-  if (0 && (status & ~BPS_IDLE_ALL)){
-    putstr("status = ");
-    puthex32_nl(status);
-  }
-
-  dbsm_process_status(&dsp_tx_sm, status);
-  dbsm_process_status(&dsp_rx_sm, status);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  output_regs->led_src = 0x3;		// h/w controls bottom two bits
-  clocks_enable_test_clk(true, 1);
-
-  putstr("\nSERDES TxRx\n");
-
-  cpu_tx_buf_dest_port = PORT_SERDES;
-
-  // ethernet_register_link_changed_callback(link_changed_callback);
-  // ethernet_init();
-
-  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);
-
-  // puts("post clocks_mimo_config");
-
-#if 0
-  // make bit 15 of Tx gpio's be a s/w output
-  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
-#endif
-
-#if 0
-  output_regs->debug_mux_ctrl = 1;
-  hal_gpio_set_sels(GPIO_TX_BANK, "0000000000000000");
-  hal_gpio_set_sels(GPIO_RX_BANK, "0000000000000000");
-  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
-  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
-#endif
-
-
-  // initialize double buffering state machine for ethernet -> DSP Tx
-
-  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
-	    &dsp_tx_recv_args, &dsp_tx_send_args,
-	    eth_pkt_inspector);
-
-
-  //output_regs->flush_icache = 1;
- 
-  // initialize double buffering state machine for DSP RX -> Ethernet
-
-  if (FW_SETS_SEQNO){
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      fw_sets_seqno_inspector);
-  }
-  else {
-    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	      &dsp_rx_recv_args, &dsp_rx_send_args,
-	      dbsm_nop_inspector);
-  }
-
-  // puts("post dbsm_init's");
-
-  // tell app_common that this dbsm could be sending to the ethernet
-  ac_could_be_sending_to_eth = &dsp_rx_sm;
-
-
-  // program tx registers
-  setup_tx();
-
-  // puts("post setup_tx");
-
-  // kick off the state machine
-  dbsm_start(&dsp_tx_sm);
-
-  // puts("post dbsm_start");
-
-  //int which = 0;
-
-  while(1){
-    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
-    // which ^= 0x8000;
-
-    buffer_irq_handler(0);
-
-    int pending = pic_regs->pending;		// poll for under or overrun
-
-    if (pending & PIC_UNDERRUN_INT){
-      dbsm_handle_tx_underrun(&dsp_tx_sm);
-      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
-      putchar('U');
-    }
-
-    if (pending & PIC_OVERRUN_INT){
-      dbsm_handle_rx_overrun(&dsp_rx_sm);
-      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt
-
-      // FIXME Figure out how to handle this robustly.
-      // Any buffers that are emptying should be allowed to drain...
-
-      if (streaming_p){
-	// restart_streaming();
-	// FIXME report error
-      }
-      else {
-	// FIXME report error
-      }
-      putchar('O');
-    }
-  }
-}
diff --git a/firmware/microblaze/apps/set_hw_rev.c b/firmware/microblaze/apps/set_hw_rev.c
deleted file mode 100644
index d4ac8ff81..000000000
--- a/firmware/microblaze/apps/set_hw_rev.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#include <u2_init.h>
-#include <nonstdio.h>
-#include <i2c.h>
-#include <usrp2_i2c_addr.h>
-
-#define HW_REV_MAJOR 0
-#define HW_REV_MINOR 3
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\nset_hw_rev\n");
-
-  bool ok = true;
-  unsigned char maj = HW_REV_MAJOR;
-  unsigned char min = HW_REV_MINOR;
-  ok = eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &maj, 1);
-  ok &= eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &min, 1);
-
-  if (ok)
-    printf("OK: set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-  else
-    printf("FAILED to set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/test1.c b/firmware/microblaze/apps/test1.c
deleted file mode 100644
index c3cc3be56..000000000
--- a/firmware/microblaze/apps/test1.c
+++ /dev/null
@@ -1,282 +0,0 @@
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include "nonstdio.h"
-
-// Globals
-#define EMPTY 0
-#define FILLING 1
-#define FULL 2
-#define EMPTYING 3
-
-#define PORT 2    // ethernet = 2, serdes = 0
-int dsp_rx_buf, dsp_tx_buf, serdes_rx_buf, serdes_tx_buf;
-int dsp_rx_idle, dsp_tx_idle, serdes_rx_idle, serdes_tx_idle;
-
-int buffer_state[4];
-
-
-void double_buffering(int port);
-
-//
-// We register this in the secondary interrupt vector.
-// It's called on buffer manager interrupts
-//
-void
-buffer_irq_handler(unsigned irq)
-{
-  double_buffering(PORT);
-}
-
-int
-main(void)
-{
-  int i;
-
-  u2_init();
-
-  // Control LEDs
-  output_regs->leds = 0x02;
-
-  // Turn on ADCs
-  output_regs->adc_ctrl = 0x0A;
-
-  // Set up TX Chain
-  dsp_tx_regs->freq = 0;
-  dsp_tx_regs->scale_iq = (1 << 16) | 1;
-  dsp_tx_regs->interp_rate = 8;
-
-  // Set up RX Chain
-  dsp_rx_regs->freq = 0;
-  dsp_rx_regs->scale_iq = (1 << 16) | 1;
-  dsp_rx_regs->decim_rate = 8;
-
-  // Set up buffer control, using only 4 for now
-  for(i=0;i<4;i++) 
-    buffer_state[i] = EMPTY;
-
-  // Set up DSP RX
-  buffer_state[0] = FILLING;
-  serdes_tx_idle = 1;
-  bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 0, use 500 lines
-
-  //dsp_rx_regs->run_rx = 1;           // Start DSP_RX
-  putstr("Done DSP RX setup\n");
-
-  // Set up serdes RX
-  buffer_state[2] = FILLING;
-  dsp_tx_idle = 1;
-  bp_receive_to_buf(2, PORT, 1, 5, 504);
-
-  while (buffer_pool_status->status == 0)  // wait for completion of DSP RX
-    ;
-
-  putstr("Done DSP TX setup\n");
-  //dsp_tx_regs->run_tx = 1;
-
-  // register interrupt handler
-  pic_register_handler(IRQ_BUFFER, buffer_irq_handler);
-
-  while (1)
-    ;
-
-  hal_finish();
-  return 1;
-}
-
-void 
-double_buffering(int port) {
-  unsigned int localstatus = buffer_pool_status->status;
-
-  if(localstatus & BPS_DONE_0) {
-    bp_clear_buf(0);
-    if(buffer_state[0] == FILLING) {
-      buffer_state[0] = FULL;
-      if(buffer_state[1] == EMPTY) {
-	bp_receive_to_buf(1, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[1] = FILLING;
-      }
-      else
-	dsp_rx_idle = 1;
-      if(serdes_tx_idle) {
-	serdes_tx_idle = 0;
-	bp_send_from_buf(0, port, 1, 10, 509);  // SERDES_TX from buffer 0
-	buffer_state[0] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[0] = EMPTY;
-      if(dsp_rx_idle) {
-	dsp_rx_idle = 0;
-	bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 0, use 500 lines
-	buffer_state[0] = FILLING;
-      }
-      if(buffer_state[1] == FULL) {
-	bp_send_from_buf(1, port, 1, 10, 509);  // SERDES_TX from buffer 1
-	buffer_state[1] = EMPTYING;
-      }
-      else
-	serdes_tx_idle = 1;
-    }
-    putstr("Int Proc'ed 0\n");
-  }
-  if(localstatus & BPS_DONE_1) {
-    bp_clear_buf(1);
-    if(buffer_state[1] == FILLING) {
-      buffer_state[1] = FULL;
-      if(buffer_state[0] == EMPTY) {
-	bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[0] = FILLING;
-      }
-      else
-	dsp_rx_idle = 1;
-      if(serdes_tx_idle) {
-	serdes_tx_idle = 0;
-	bp_send_from_buf(1, port, 1, 10, 509);  // SERDES_TX from buffer 1
-	buffer_state[1] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[1] = EMPTY;
-      if(dsp_rx_idle) {
-	dsp_rx_idle = 0;
-	bp_receive_to_buf(1, 1, 1, 10, 509);  // DSP_RX to buffer 1, use 500 lines
-	buffer_state[1] = FILLING;
-      }
-      if(buffer_state[0] == FULL) {
-	bp_send_from_buf(0, port, 1, 10, 509);  // SERDES_TX from buffer 0
-	buffer_state[0] = EMPTYING;
-      }
-      else
-	serdes_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 1\n");
-  }
-  if(localstatus & BPS_DONE_2) {
-    bp_clear_buf(2);
-    if(buffer_state[2] == FILLING) {
-      buffer_state[2] = FULL;
-      if(buffer_state[3] == EMPTY) {
-	bp_receive_to_buf(3, port, 1, 5, 504);  // SERDES_RX to buffer 3, use 500 lines
-	buffer_state[3] = FILLING;
-      }
-      else
-	serdes_rx_idle = 1;
-      if(dsp_tx_idle) {
-	dsp_tx_idle = 0;
-	bp_send_from_buf(2, 1, 1, 5, 504);  // DSP_TX from buffer 2
-	buffer_state[2] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[2] = EMPTY;
-      if(serdes_rx_idle) {
-	serdes_rx_idle = 0;
-	bp_receive_to_buf(2, port, 1, 5, 504);  // SERDES_RX to buffer 2
-	buffer_state[2] = FILLING;
-      }
-      if(buffer_state[3] == FULL) {
-	bp_send_from_buf(3, 1, 1, 5, 504);  // DSP_TX from buffer 3
-	buffer_state[3] = EMPTYING;
-      }
-      else
-	dsp_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 2\n");
-  }
-  if(localstatus & BPS_DONE_3) {
-    bp_clear_buf(3);
-    if(buffer_state[3] == FILLING) {
-      buffer_state[3] = FULL;
-      if(buffer_state[2] == EMPTY) {
-	bp_receive_to_buf(2, port, 1, 5, 504);  // SERDES_RX to buffer 2, use 500 lines
-	buffer_state[2] = FILLING;
-      }
-      else
-	serdes_rx_idle = 1;
-      if(dsp_tx_idle) {
-	dsp_tx_idle = 0;
-	bp_send_from_buf(3, 1, 1, 5, 504);  // DSP_TX from buffer 3
-	buffer_state[3] = EMPTYING;
-      }
-    }
-    else {  // buffer was emptying
-      buffer_state[3] = EMPTY;
-      if(serdes_rx_idle) {
-	serdes_rx_idle = 0;
-	bp_receive_to_buf(3, port, 1, 5, 504);  // SERDES_RX to buffer 3
-	buffer_state[3] = FILLING;
-      }
-      if(buffer_state[2] == FULL) {
-	bp_send_from_buf(2, 1, 1, 5, 504);  // DSP_TX from buffer 2
-	buffer_state[2] = EMPTYING;
-      }
-      else
-	dsp_tx_idle = 1;
-    }
-  putstr("Int Proc'ed 3\n");
-  }
-}
-
-// Spare Code
-
-#if 0  
-  // Set up LSDAC
-  int i = 0;
-  while(1) {
-    int command = (3 << 19) | (0 << 16) |  (i & 0xffff);
-    spi_transact(SPI_TXONLY, SPI_SS_TX_DAC, command, 24, 1); // negate TX phase
-    i++;
-  }
-#endif
-
-#if 0  
-  // Write to buffer 0
-  int *buf = (int *)(BUFFER_BASE + BUFFER_0);
-  puthex_nl((int)buf);
-
-  for(i=0;i<BUFFER_SIZE;i++)
-    buf[i] = i;
-
-  putstr("Filled buffer 0\n");
-
-  // Write to buffer 1
-  buf = (int *)(BUFFER_BASE + BUFFER_1);
-  puthex_nl((int)buf);
-  for(i=0;i<BUFFER_SIZE;i++)
-    buf[i] =  i + ((i^0xFFFF) << 16);
-
-  putstr("Filled buffer 1\n");
-
-#endif
-
-#if 0
-  // rx SERDES into buffer #2  (buf,port,step,fl,ll)
-  bp_receive_to_buf(2, 0, 1, 10, 300);
-  putstr("SERDES RX buffer setup\n");
-
-  // send SERDES from buffer #0 (buf,port,step,fl,ll)
-  bp_send_from_buf(0, 0, 1, 20, 200);
-  putstr("SERDES TX buffer setup\n");
-
-#endif
-
-#if 0
-  // send to DACs from buffer #1
-  bp_send_from_buf(1 /*buf#*/, 1 /*port*/, 1 /*step*/, 20 /*fl*/, 250 /*ll*/);
-  putstr("DAC Buffer setup\n");
-#endif
-
-#if 0
-  //putstr("ENTER INT\n");
-  for(i=0;i<8;i++)
-    if(*status & (1<<i)) {
-      //putstr("Clearing buf ");
-      puthex_nl(i);
-      bp_clear_buf(i);
-    }
-  //putstr("EXIT INT\n");
-#endif
diff --git a/firmware/microblaze/apps/test_db_spi.c b/firmware/microblaze/apps/test_db_spi.c
deleted file mode 100644
index f4fa98ef1..000000000
--- a/firmware/microblaze/apps/test_db_spi.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <u2_init.h>
-#include <nonstdio.h>
-#include <hal_io.h>
-#include <spi.h>
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("\ntest_db_spi");
-
-  while(1){
-    spi_transact(SPI_TXONLY, SPI_SS_RX_DB, 0xCC33, 16, SPIF_PUSH_FALL);
-    spi_transact(SPI_TXONLY, SPI_SS_TX_DB, 0x33CC, 16, SPIF_PUSH_FALL);
-  }
-}
diff --git a/firmware/microblaze/apps/test_i2c.c b/firmware/microblaze/apps/test_i2c.c
deleted file mode 100644
index f349ead88..000000000
--- a/firmware/microblaze/apps/test_i2c.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <stdio.h>
-#include <stdint.h>
-#include <u2_init.h>		/* FIXME */
-#include <i2c.h>
-#include <usrp2_i2c_addr.h>
-#include <string.h>
-#include <hal_io.h>
-
-
-
-#define ASSERT_TRUE(x) \
-  do { \
-    if (!(x)){ \
-      printf("ASSERT_TRUE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-#define ASSERT_FALSE(x) \
-  do { \
-    if (x){ \
-      printf("ASSERT_FALSE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-
-#define BUFSIZE 128
-
-int
-main(void)
-{
-  int i;
-  bool ok;
-  int  nerrors = 0;
-  uint8_t buf[BUFSIZE];
-  int not_dev_addr = 0x35;	// no device with this address on the i2c bus.
-  int offset;
-  int len;
-  
-  u2_init();
-
-  puts("test_i2c\n");
-
-  // try writing a non-existent device
-  buf[0] = 0xA5;
-  ok = i2c_write(not_dev_addr, buf, 1);
-  ASSERT_FALSE(ok);
-
-  // try read from non-existent device
-  buf[0] = 0;
-  ok = i2c_read(not_dev_addr, buf, 1);
-  ASSERT_FALSE(ok);
-
-  // try writing eeprom
-  offset = 31;
-  len = 8;
-  memset(buf, 0, sizeof(buf));
-  for (i = 0; i < len; i++)
-    buf[i] = i;
-  ok = eeprom_write(I2C_ADDR_MBOARD, offset, buf, len);
-  ASSERT_TRUE(ok);
-
-  // now try to read it back
-  offset = 31;
-  len = 8;
-  memset(buf, 0, sizeof(buf));
-  ok = eeprom_read(I2C_ADDR_MBOARD, offset, buf, len);
-  ASSERT_TRUE(ok);
-
-  // check result
-  for (i = 0; i < len; i++){
-    if (buf[i] != i){
-      printf("buf[%d] = %d, should be %d\n", i, buf[i], i);
-      nerrors++;
-    }
-  }
-  
-  if (nerrors == 0){
-    output_regs->leds = 0x3;
-    puts("PASSED\n");
-  }
-  else {
-    output_regs->leds = 0x0;
-    puts("FAILED\n");
-  }
-
-  hal_finish();
-  return 0;
-}
-
diff --git a/firmware/microblaze/apps/test_lsadc.c b/firmware/microblaze/apps/test_lsadc.c
deleted file mode 100644
index 5fda29cd7..000000000
--- a/firmware/microblaze/apps/test_lsadc.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <lsadc.h>
-#include <lsdac.h>
-#include <u2_init.h>
-#include <nonstdio.h>
-#include <hal_io.h>
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("\ntest_lsadc");
-
-  uint32_t r;
-
-  unsigned int up_counter = 0;
-  
-  while (1){
-    unsigned int v;
-    v = up_counter;
-
-    lsdac_write_rx(0, v << 0);
-    lsdac_write_rx(2, v << 1);
-
-#if 1
-    r = lsadc_read_rx(0);
-    lsdac_write_rx(1, r & 0x0fff);
-    //puthex32_nl(r);
-#endif
-
-#if 1
-    r = lsadc_read_rx(1);
-    lsdac_write_rx(3, r & 0x0fff);
-    //puthex32_nl(r);
-#endif
-
-    up_counter++;
-  }
-}
diff --git a/firmware/microblaze/apps/test_lsdac.c b/firmware/microblaze/apps/test_lsdac.c
deleted file mode 100644
index 8c1bf333b..000000000
--- a/firmware/microblaze/apps/test_lsdac.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <lsdac.h>
-#include <u2_init.h>
-#include <nonstdio.h>
-#include <hal_io.h>
-
-int
-main(void)
-{
-  u2_init();
-
-  puts("\ntest_lsdac");
-
-  unsigned int up_counter = 0;
-  unsigned int dn_counter = 0;
-
-  while(1){
-    unsigned int v;
-    v = up_counter;
-    lsdac_write_rx(0, v << 0);
-    lsdac_write_rx(1, v << 1);
-    lsdac_write_rx(2, v << 2);
-    lsdac_write_rx(3, v << 3);
-
-    v = up_counter;
-    lsdac_write_tx(0, v << 0);
-    lsdac_write_tx(1, v << 1);
-    lsdac_write_tx(2, v << 2);
-    lsdac_write_tx(3, v << 3);
-
-    up_counter++;
-    dn_counter--;
-  }
-}
diff --git a/firmware/microblaze/apps/test_phy_comm.c b/firmware/microblaze/apps/test_phy_comm.c
deleted file mode 100644
index d312ca4cc..000000000
--- a/firmware/microblaze/apps/test_phy_comm.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-// check communication with ethernet PHY chip
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include "ethernet.h"
-#include "pic.h"
-#include "nonstdio.h"
-
-
-#define DELTA_T     12500000  		// .125s (10ns per tick)
-//#define DELTA_T      10000
-
-// debugging output on tx pins
-#define LS_MASK  0xE0000
-#define LS_1000  0x80000
-#define LS_100   0x40000
-#define LS_10    0x20000
-
-
-
-#define U2_ETHERTYPE 0xBEEF
-
-
-static volatile int led_link_up_flag = 0;
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  int v = 0;
-  switch(speed){
-  case 10:
-    v = LS_10;
-    led_link_up_flag = 0x2;
-    break;
-    
-  case 100:
-    v = LS_100;
-    led_link_up_flag = 0x2;
-    break;
-    
-  case 1000:
-    v = LS_100;
-    led_link_up_flag = 0x2;
-    break;
-
-  default:
-    v = 0;
-    led_link_up_flag = 0;
-    break;
-  }
-
-  //hal_gpio_set_tx(v, LS_MASK);	/* set debug bits on d'board */
-
-  putstr("\neth link changed: speed = ");
-  puthex_nl(speed);
-}
-
-void
-timer_handler(unsigned irq)
-{
-  static int led_counter = 0;
-
-  hal_set_timeout(DELTA_T);	// schedule next timeout
-  output_regs->leds = (led_counter++ & 0x1) | led_link_up_flag;
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  putstr("\n test_phy_comm\n");
-
-  pic_register_handler(IRQ_ONETIME, timer_handler);
-  hal_set_timeout(DELTA_T);	// schedule timeout
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-
-  output_regs->phy_ctrl = 1;	/* reset the eth PHY */
-  output_regs->phy_ctrl = 0;
-
-  ethernet_init();
-
-  while(1)
-    ;
-
-  return 0;
-}
diff --git a/firmware/microblaze/apps/test_ram.c b/firmware/microblaze/apps/test_ram.c
deleted file mode 100644
index 77ee693f6..000000000
--- a/firmware/microblaze/apps/test_ram.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <stdio.h>
-#include <stdint.h>
-#include <u2_init.h>		/* FIXME */
-#include <sd.h>
-#include <string.h>
-#include <hal_io.h>
-#include <nonstdio.h>
-#include <hal_uart.h>
-
-#define ASSERT_TRUE(x) \
-  do { \
-    if (!(x)){ \
-      printf("ASSERT_TRUE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-#define ASSERT_FALSE(x) \
-  do { \
-    if (x){ \
-      printf("ASSERT_FALSE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-
-#define BUFSIZE 128
-
-int test_ram()
-{
-  int i,j,k;
-  output_regs->ram_page = 1<<10;
-  
-  extram[0] = 0xDEADBEEF;
-  extram[1] = 0xF00D1234;
-  extram[7] = 0x76543210;
-  
-  output_regs->ram_page = 2<<10;
-  extram[7] = 0x55555555;
-  extram[1] = 0xaaaaaaaa;
-  extram[0] = 0xeeeeeeee;
-  
-  output_regs->ram_page = 1<<10;
-  
-  i = extram[0];
-  k = extram[1];
-  j = extram[7];
-  
-  if((i != 0xDEADBEEF)||(j!=0x76543210)||(k!=0xF00D1234)) {
-    puts("RAM FAIL1!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  
-  output_regs->ram_page = 2<<10;
-
-  j = extram[7];
-  k = extram[1];
-  i = extram[0];
-
-  if((i != 0xeeeeeeee)||(j!=0x55555555)||(k!=0xaaaaaaaa)) {
-    puts("RAM FAIL2!\n");
-    puthex32_nl(i);
-    puthex32_nl(j);
-    puthex32_nl(k);
-    return 0;
-  }
-  return 1;
-}
-
-int
-main(void)
-{
-
-  u2_init();
-  puts("\ntest_ram\n");
-  int success = test_ram();
-  if(success)
-    puts("RAM Passed Tests\n");
-  else
-    puts("RAM Failed\n");
-
-  hal_finish();
-  return 0;
-}
-
diff --git a/firmware/microblaze/apps/test_sd.c b/firmware/microblaze/apps/test_sd.c
deleted file mode 100644
index 494432d7f..000000000
--- a/firmware/microblaze/apps/test_sd.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <stdio.h>
-#include <stdint.h>
-#include <u2_init.h>		/* FIXME */
-#include <sd.h>
-#include <string.h>
-#include <hal_io.h>
-#include <nonstdio.h>
-
-
-#define ASSERT_TRUE(x) \
-  do { \
-    if (!(x)){ \
-      printf("ASSERT_TRUE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-#define ASSERT_FALSE(x) \
-  do { \
-    if (x){ \
-      printf("ASSERT_FALSE failed on line %d\n", __LINE__); \
-      nerrors++; \
-    } \
-  } while(0)
-
-
-#define BUFSIZE 128
-
-int
-main(void)
-{
-  int i;
-  unsigned char buf[512];
-
-  u2_init();
-
-  puts("\ntest_sd\n");
-  
-
-  i = sd_init();
-  if(i)
-    puts("Successfully Init'ed Card\n");
-  else
-    puts("FAILED INIT of Card\n");
-
-  i = sd_read_block(2048,buf);
-  if(i) {
-    puts("READ Command accepted\n");
-    for(i=0;i<512;i++)
-      if((i&15) == 15)
-	puthex8_nl(buf[i]);
-      else {
-	puthex8(buf[i]);
-	putchar(' ');
-      }
-  }
-  else
-    puts("READ Command Rejected\n");
-  
-  puts("Done");
-  hal_finish();
-  return 0;
-}
-
diff --git a/firmware/microblaze/apps/timer_test.c b/firmware/microblaze/apps/timer_test.c
deleted file mode 100644
index 44e80b5f1..000000000
--- a/firmware/microblaze/apps/timer_test.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include "nonstdio.h"
-#include "hal_io.h"
-
-#define DELTA_T  500  		// 5 us (10ns per tick)
-
-
-void 
-timer_handler(unsigned irq)
-{
-  hal_set_timeout(DELTA_T);
-
-  putstr("Tick: ");
-  puthex_nl(0);
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  // setup timer
-
-  putstr("Setting up timer\n");
-  pic_register_handler(IRQ_ONETIME, timer_handler);
-
-  hal_set_timeout(DELTA_T);
-
-  while (1)
-    ;
-
-  putstr("Done Testing\n");
-  
-  hal_finish();
-  return 1;
-}
diff --git a/firmware/microblaze/apps/tx_standalone.c b/firmware/microblaze/apps/tx_standalone.c
deleted file mode 100644
index 1645fa8ba..000000000
--- a/firmware/microblaze/apps/tx_standalone.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "u2_init.h"
-#include "memory_map.h"
-#include "spi.h"
-#include "hal_io.h"
-#include "buffer_pool.h"
-#include "pic.h"
-#include <stdbool.h>
-#include "ethernet.h"
-#include "nonstdio.h"
-#include "usrp2_eth_packet.h"
-#include "memcpy_wa.h"
-#include "dbsm.h"
-#include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-
-#define	_AL4 __attribute__((aligned (4)))
-
-#define USE_BUFFER_INTERRUPT	0	// 0 or 1
-
-
-static int timer_delta = MASTER_CLK_RATE/1000;	// tick at 1kHz
-
-/*
- * This program can respond to queries from the host
- * and stream rx samples.
- *
- * Buffer 1 is used by the cpu to send frames to the host.
- * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
- * Buffers 4 and 5 are used to double-buffer the eth to DSP Tx  eth flow
- */
-//#define CPU_RX_BUF	0	// eth -> cpu
-#define CPU_TX_BUF 	1	// cpu -> eth
-
-#define	DSP_RX_BUF_0	2	// dsp rx -> eth (double buffer)
-#define	DSP_RX_BUF_1	3	// dsp rx -> eth
-#define	DSP_TX_BUF_0	4	// eth -> dsp tx (double buffer)
-#define	DSP_TX_BUF_1	5	// eth -> dsp tx
-
-
-/*
- * ================================================================
- *      configure DSP RX double buffering state machine
- * ================================================================
- */
-
-
-// 4 lines of ethernet hdr + 1 line (word0)
-// DSP Rx writes timestamp followed by nlines_per_frame of samples
-#define DSP_RX_FIRST_LINE		  5
-#define DSP_RX_SAMPLES_PER_FRAME	128
-#define	DSP_RX_EXTRA_LINES		  1	// writes timestamp
-
-// Receive from DSP Rx
-buf_cmd_args_t dsp_rx_recv_args = {
-  PORT_DSP,
-  DSP_RX_FIRST_LINE,
-  BP_LAST_LINE
-};
-
-// send to ethernet
-buf_cmd_args_t dsp_rx_send_args = {
-  PORT_ETH,
-  0,		// starts with ethernet header in line 0
-  0,		// filled in from last_line register
-};
-
-dbsm_t dsp_rx_sm;	// the state machine
-
-/*
- * ================================================================
- *      configure DSP TX double buffering state machine
- * ================================================================
- */
-
-// 4 lines of ethernet hdr + 2 lines (word0 + timestamp)
-// DSP Tx reads word0 (flags) + timestamp followed by samples
-
-#define DSP_TX_FIRST_LINE		  4
-#define DSP_TX_SAMPLES_PER_FRAME	250	// not used except w/ debugging
-#define	DSP_TX_EXTRA_LINES		  2	// reads word0 + timestamp
-
-// Receive from ethernet
-buf_cmd_args_t dsp_tx_recv_args = {
-  PORT_ETH,
-  0,
-  BP_LAST_LINE
-};
-
-// send to DSP Tx
-buf_cmd_args_t dsp_tx_send_args = {
-  PORT_DSP,
-  DSP_TX_FIRST_LINE,	// starts just past ethernet header
-  0			// filled in from last_line register
-};
-
-dbsm_t dsp_tx_sm;	// the state machine
-
-/*
- * send constant buffer to DSP TX
- */
-static inline void 
-SEND_CONST_TO_DSP_TX(void)
-{
-  bp_send_from_buf(DSP_TX_BUF_0, PORT_DSP, 1,
-		   DSP_TX_FIRST_LINE,
-		   DSP_TX_FIRST_LINE + DSP_TX_EXTRA_LINES + DSP_TX_SAMPLES_PER_FRAME - 1);
-}
-
-// ----------------------------------------------------------------
-
-
-
-// The mac address of the host we're sending to.
-eth_mac_addr_t host_mac_addr;
-
-
-void link_changed_callback(int speed);
-static volatile bool link_is_up = false;	// eth handler sets this
-
-
-void
-timer_irq_handler(unsigned irq)
-{
-  hal_set_timeout(timer_delta);	// schedule next timeout
-}
-
-// Tx DSP underrun
-void
-underrun_irq_handler(unsigned irq)
-{
-  dsp_tx_regs->clear_state = 1;
-  bp_clear_buf(DSP_TX_BUF_0);
-  bp_clear_buf(DSP_TX_BUF_1);
-  dbsm_stop(&dsp_tx_sm);
-
-  // FIXME anything else?
-
-  putstr("\nirq: underrun\n");
-}
-
-// Rx DSP overrun
-void
-overrun_irq_handler(unsigned irq)
-{
-  dsp_rx_regs->clear_state = 1;
-  bp_clear_buf(DSP_RX_BUF_0);
-  bp_clear_buf(DSP_RX_BUF_1);
-  dbsm_stop(&dsp_rx_sm);
-
-  // FIXME anything else?
-
-  putstr("\nirq: overrun\n");
-}
-
-static void
-start_tx_transfers(void)
-{
-  bp_clear_buf(DSP_TX_BUF_0);	// FIXME, really goes in state machine
-  bp_clear_buf(DSP_TX_BUF_1);
-
-  // fill everything with a constant 32k + 0j
-
-  uint32_t const_sample = (32000 << 16) | 0;
-  int i;
-  for (i = 0; i < BP_NLINES; i++){
-    buffer_ram(DSP_TX_BUF_0)[i] = const_sample;
-    buffer_ram(DSP_TX_BUF_1)[i] = const_sample;
-  }
-
-  /*
-   * Construct  ethernet header and word0 and preload into two buffers
-   */
-  u2_eth_packet_t	pkt;
-  memset(&pkt, 0, sizeof(pkt));
-  //pkt.ehdr.dst = *host;
-  pkt.ehdr.src = *ethernet_mac_addr();
-  pkt.ehdr.ethertype = U2_ETHERTYPE;
-  u2p_set_word0(&pkt.fixed,
-		U2P_TX_IMMEDIATE | U2P_TX_START_OF_BURST, 0);
-  u2p_set_timestamp(&pkt.fixed, T_NOW);
-
-  memcpy_wa(buffer_ram(DSP_TX_BUF_0), &pkt, sizeof(pkt));
-  memcpy_wa(buffer_ram(DSP_TX_BUF_1), &pkt, sizeof(pkt));
-
-
-  int tx_scale = 256;
-
-  // setup Tx DSP regs
-  dsp_tx_regs->clear_state = 1;			// reset
-  dsp_tx_regs->freq = 408021893;		// 9.5 MHz [2**32 * fc/fsample]
-  dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
-  dsp_tx_regs->interp_rate = 32;
-
-  // kick off the state machine
-  // dbsm_start(&dsp_rx_sm);
-
-  SEND_CONST_TO_DSP_TX();	// send constant buffer to DSP TX
-}
-
-
-void
-buffer_irq_handler(unsigned irq)
-{
-  uint32_t  status = buffer_pool_status->status;
-
-  if (0){
-    putstr("irq: ");
-    puthex32(status);
-    putchar('\n');
-  }
-
-  if (status & BPS_ERROR_ALL){
-    // FIXME rare path, handle error conditions
-  }
-
-  if (status & BPS_DONE(DSP_TX_BUF_0)){
-    bp_clear_buf(DSP_TX_BUF_0);
-    SEND_CONST_TO_DSP_TX();
-    hal_toggle_leds(0x1);
-  }
-
-}
-
-int
-main(void)
-{
-  u2_init();
-
-  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
-  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
-  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
-
-  putstr("\ntx_only\n");
-  
-  // Control LEDs
-  hal_set_leds(0x0, 0x3);
-
-  if (USE_BUFFER_INTERRUPT)
-    pic_register_handler(IRQ_BUFFER,   buffer_irq_handler);
-
-  pic_register_handler(IRQ_OVERRUN,  overrun_irq_handler);
-  pic_register_handler(IRQ_UNDERRUN, underrun_irq_handler);
-
-  //pic_register_handler(IRQ_TIMER, timer_irq_handler);
-  //hal_set_timeout(timer_delta);
-
-  ethernet_register_link_changed_callback(link_changed_callback);
-
-  ethernet_init();
-
-  // initialize double buffering state machine for DSP RX -> Ethernet
-  dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
-	    &dsp_rx_recv_args, &dsp_rx_send_args,
-	    dbsm_nop_inspector);
-
-  // setup receive from ETH
-  // bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
-
-#if 0
-  if (hwconfig_simulation_p()){
-    // If we're simulating, pretend that we got a start command from the host
-    eth_mac_addr_t host = {{ 0x00, 0x0A, 0xE4, 0x3E, 0xD2, 0xD5 }};
-    start_rx_cmd(&host);
-  }
-#endif
-
-  start_tx_transfers();		// send constant buffers to DSP TX
-
-  while(1){
-    if (!USE_BUFFER_INTERRUPT)
-      buffer_irq_handler(0);
-  }
-}
-
-// ----------------------------------------------------------------
-
-// debugging output on tx pins
-#define LS_MASK  0xE0000
-#define LS_1000  0x80000
-#define LS_100   0x40000
-#define LS_10    0x20000
-
-/*
- * Called when eth phy state changes (w/ interrupts disabled)
- */
-void
-link_changed_callback(int speed)
-{
-  int v = 0;
-  switch(speed){
-  case 10:
-    v = LS_10;
-    link_is_up = true;
-    break;
-    
-  case 100:
-    v = LS_100;
-    link_is_up = true;
-    break;
-    
-  case 1000:
-    v = LS_100;
-    link_is_up = true;
-    break;
-
-  default:
-    v = 0;
-    link_is_up = false;
-    break;
-  }
-
-  //hal_gpio_set_tx(v, LS_MASK);	/* set debug bits on d'board */
-
-  // hal_set_leds(link_is_up ? 0x2 : 0x0, 0x2);
-
-  printf("\neth link changed: speed = %d\n", speed);
-}
diff --git a/firmware/microblaze/include/.gitignore b/firmware/microblaze/include/.gitignore
deleted file mode 100644
index b336cc7ce..000000000
--- a/firmware/microblaze/include/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-/Makefile
-/Makefile.in
diff --git a/firmware/microblaze/include/Makefile.am b/firmware/microblaze/include/Makefile.am
deleted file mode 100644
index 6afbbcd12..000000000
--- a/firmware/microblaze/include/Makefile.am
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2010 Ettus Research LLC
-#
-# Copyright 2008 Free Software Foundation, Inc.
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-include $(top_srcdir)/Makefile.common
-
-SUBDIRS = net
-
-noinst_HEADERS = \
-    usrp2_fpga_regs.h \
-    usrp2_i2c_addr.h \
-    usrp2_clock_bits.h \
-    usrp2_types.h \
-    vrt/bits.h \
-    vrt/types.h
diff --git a/firmware/microblaze/include/compiler.h b/firmware/microblaze/include/compiler.h
deleted file mode 100644
index 4fa9b49f8..000000000
--- a/firmware/microblaze/include/compiler.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_COMPILER_H
-#define INCLUDED_COMPILER_H
-
-// FIXME gcc specific.
-#define _AL4   __attribute__((aligned (4)))
-
-
-#endif /* INCLUDED_COMPILER_H */
diff --git a/firmware/microblaze/include/net/.gitignore b/firmware/microblaze/include/net/.gitignore
deleted file mode 100644
index 282522db0..000000000
--- a/firmware/microblaze/include/net/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-Makefile
-Makefile.in
diff --git a/firmware/microblaze/include/net/Makefile.am b/firmware/microblaze/include/net/Makefile.am
deleted file mode 100644
index 32b0bf9dc..000000000
--- a/firmware/microblaze/include/net/Makefile.am
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Copyright 2010 Ettus Research LLC
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-include $(top_srcdir)/Makefile.common
-
-noinst_HEADERS = \
-	eth_mac_addr.h \
-	padded_eth_hdr.h \
-	socket_address.h
diff --git a/firmware/microblaze/include/net/eth_mac_addr.h b/firmware/microblaze/include/net/eth_mac_addr.h
deleted file mode 100644
index b44fb68f7..000000000
--- a/firmware/microblaze/include/net/eth_mac_addr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright 2009 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_ETH_MAC_ADDR_H
-#define INCLUDED_ETH_MAC_ADDR_H
-
-#include <stdint.h>
-
-// Ethernet MAC address
-
-typedef struct {
-  uint8_t	addr[6];
-} eth_mac_addr_t;
-
-#endif /* INCLUDED_ETH_MAC_ADDR_H */
diff --git a/firmware/microblaze/include/net/padded_eth_hdr.h b/firmware/microblaze/include/net/padded_eth_hdr.h
deleted file mode 100644
index df816734f..000000000
--- a/firmware/microblaze/include/net/padded_eth_hdr.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009,2010 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_PADDED_ETH_HDR_H
-#define INCLUDED_PADDED_ETH_HDR_H
-
-#include <compiler.h>
-#include <net/eth_mac_addr.h>
-
-/*!
- * \brief Standard 14-byte ethernet header plus two leading bytes of padding.
- *
- * This is what a buffer contains in line 1 when using the "slow mode"
- */
-typedef struct {
-  uint16_t	 pad;
-  eth_mac_addr_t dst;
-  eth_mac_addr_t src;
-  uint16_t 	 ethertype;
-} _AL4 padded_eth_hdr_t;
-
-
-#endif /* INCLUDED_PADDED_ETH_HDR_H */
diff --git a/firmware/microblaze/include/net/socket_address.h b/firmware/microblaze/include/net/socket_address.h
deleted file mode 100644
index 336f30a0c..000000000
--- a/firmware/microblaze/include/net/socket_address.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2010 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_SOCKET_ADDRESS_H
-#define INCLUDED_SOCKET_ADDRESS_H
-
-#include <lwip/ip_addr.h>
-
-// port and address are in network byte order
-
-typedef struct socket_address {
-  unsigned short   port;
-  struct ip_addr   addr;
-} socket_address_t;
-
-static inline struct socket_address 
-make_socket_address(struct ip_addr addr, int port)
-{
-  struct socket_address r;
-  r.port = port;
-  r.addr = addr;
-  return r;
-}
-
-
-
-#endif /* INCLUDED_SOCKET_ADDRESS_H */
diff --git a/firmware/microblaze/include/usrp2_clock_bits.h b/firmware/microblaze/include/usrp2_clock_bits.h
deleted file mode 100644
index d2052e941..000000000
--- a/firmware/microblaze/include/usrp2_clock_bits.h
+++ /dev/null
@@ -1,55 +0,0 @@
-//
-// Copyright 2010 Ettus Research LLC
-//
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- * 
- * This file is part of GNU Radio
- * 
- * GNU Radio is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3, or (at your option)
- * any later version.
- * 
- * GNU Radio is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#ifndef INCLUDED_USRP2_CLOCK_BITS_H
-#define INCLUDED_USRP2_CLOCK_BITS_H
-
-#define	_MC_WE_LOCK			0x0001
-#define	_MC_MIMO_CLK_INPUT		0x0002		// else SMA input
-
-/*
- * Derived masks (use these):
- *
- * We get our input from 1 of three places:
- *  Our free running oscilator, our SMA connector, or from the MIMO connector
- */
-#define	MC_WE_DONT_LOCK			0x0000
-#define	MC_WE_LOCK_TO_SMA		(_MC_WE_LOCK | 0)
-#define	MC_WE_LOCK_TO_MIMO		(_MC_WE_LOCK | _MC_MIMO_CLK_INPUT)
-
-/*
- * Independent of the source of the clock, we may or may not drive our
- * clock onto the mimo connector.  Note that there are dedicated clock
- * signals in each direction, so disaster doesn't occurs if we're
- * unnecessarily providing clock.
- */
-#define	MC_PROVIDE_CLK_TO_MIMO		0x0004
-
-#define MC_REF_CLK_MASK          0x0f
-
-#define MC_PPS_SOURCE_SMA        (0x00 << 4)
-#define MC_PPS_SOURCE_MIMO       (0x01 << 4)
-
-#define MC_PPS_POLARITY_NEG      (0x00 << 5)
-#define MC_PPS_POLARITY_POS      (0x01 << 5)
-
-#endif /* INCLUDED_USRP2_CLOCK_BITS_H */
diff --git a/firmware/microblaze/include/usrp2_fpga_regs.h b/firmware/microblaze/include/usrp2_fpga_regs.h
deleted file mode 100644
index b0f83df60..000000000
--- a/firmware/microblaze/include/usrp2_fpga_regs.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_USRP2_FPGA_REGS_H
-#define INCLUDED_USSRP2_FPGA_REGS_H
-
-#include "usrp2_cdefs.h"
-
-__U2_BEGIN_DECLS
-
-// ----------------------------------------------------------------
-
-#define	DSP_CORE_TX_BASE	128
-
-// DUC center frequency tuning word (phase increment)
-#define FR_TX_FREQ_0		(0 + DSP_CORE_TX_BASE)
-
-// I & Q output scaling, 16.0 format ((I_SCALE << 16) | Q_SCALE)
-#define FR_TX_SCALE_0		(1 + DSP_CORE_TX_BASE)
-
-// Tx interpolation rate (set to 1 less than desired rate)
-#define FR_TX_INTERP_RATE_0	(2 + DSP_CORE_TX_BASE)
-
-// Write 1 (actually anything) to clear tx state
-#define FR_TX_CLEAR_STATE_0	(3 + DSP_CORE_TX_BASE)
-
-// ----------------------------------------------------------------
-
-#define	DSP_CORE_RX_BASE	160
-
-// DDC center frequency tuning word (phase increment)
-#define FR_RX_FREQ_0		(0 + DSP_CORE_RX_BASE)
-
-// I & Q input scaling, 16.0 format ((I_SCALE << 16) | Q_SCALE)
-#define FR_RX_SCALE_0		(1 + DSP_CORE_RX_BASE)
-
-// Rx decimation rate (set to 1 less than desired rate)
-#define FR_RX_DECIM_RATE_0	(2 + DSP_CORE_RX_BASE)
-
-// The next two registers concatenated are the Rx command register.
-//
-// Writing FR_RX_TIME_TO_RX_0 writes the concatenated value into the
-// cmd queue.  Thus, if you're writing both, be sure to write
-// FR_RX_QTY_0 first.
-//
-//   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-//   |                          Timestamp                            |
-//   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-
-#define FR_RX_TIME_TO_RX	(3 + DSP_CORE_RX_BASE)
-
-//                          23-bits                       9-bits
-//   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-//   |                number_of_lines              | lines_per_frame |
-//   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-
-#define FR_RX_QTY_0		(4 + DSP_CORE_RX_BASE)
-
-// write a 1 (anything actually) to clear the overrun 
-#define FR_RX_CLR_OVERRUN_0	(5 + DSP_CORE_RX_BASE)
-
-
-__U2_END_DECLS
-
-#endif /* INCLUDED_USRP2_FPGA_REGS_H */
diff --git a/firmware/microblaze/include/usrp2_i2c_addr.h b/firmware/microblaze/include/usrp2_i2c_addr.h
deleted file mode 100644
index 46f5a7556..000000000
--- a/firmware/microblaze/include/usrp2_i2c_addr.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2004,2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_USRP2_I2C_ADDR_H
-#define INCLUDED_USRP2_I2C_ADDR_H
-
-// I2C addresses
-
-#define I2C_DEV_EEPROM	0x50		// 24LC02[45]:  7-bits 1010xxx
-
-#define	I2C_ADDR_MBOARD	(I2C_DEV_EEPROM	| 0x0)
-#define	I2C_ADDR_TX_A	(I2C_DEV_EEPROM | 0x4)
-#define	I2C_ADDR_RX_A	(I2C_DEV_EEPROM | 0x5)
-
-
-// format of USRP2 motherboard rom
-//	00: 0x00	h/w rev (LSB)
-//	01: 0x00	h/w rev (MSB)
-//	02: 0x00	MAC addr 0
-//	03: 0x50	MAC addr 1
-//	04: 0xC2	MAC addr 2
-//	05: 0x85	MAC addr 3
-//	06: 0x3.	MAC addr 4
-//	07: 0x..	MAC addr 5
-
-#define MBOARD_REV_LSB	0x00
-#define	MBOARD_REV_MSB  0x01
-#define	MBOARD_MAC_ADDR 0x02
-#define MBOARD_IP_ADDR  0x0C
-
-
-// format of daughterboard EEPROM
-//	00: 0xDB	code for ``I'm a daughterboard''
-//	01:   ..	Daughterboard ID (LSB)
-//	02:   ..	Daughterboard ID (MSB)
-//	03:   ..	io bits  7-0 direction (bit set if it's an output from m'board)
-//	04:   ..	io bits 15-8 direction (bit set if it's an output from m'board)
-//	05:   ..	ADC0 DC offset correction (LSB)
-//	06:   ..	ADC0 DC offset correction (MSB)
-//	07:   ..	ADC1 DC offset correction (LSB)
-//	08:   ..	ADC1 DC offset correction (MSB)
-// 	...
-//	1f:   ..	negative of the sum of bytes [0x00, 0x1e]
-
-#define	DB_EEPROM_MAGIC		0x00
-#define	  DB_EEPROM_MAGIC_VALUE			0xDB
-#define	DB_EEPROM_ID_LSB		0x01
-#define	DB_EEPROM_ID_MSB		0x02
-#define	DB_EEPROM_OE_LSB		0x03
-#define	DB_EEPROM_OE_MSB		0x04
-#define	DB_EEPROM_OFFSET_0_LSB		0x05	// offset correction for ADC or DAC 0
-#define	DB_EEPROM_OFFSET_0_MSB		0x06
-#define	DB_EEPROM_OFFSET_1_LSB		0x07	// offset correction for ADC or DAC 1
-#define	DB_EEPROM_OFFSET_1_MSB		0x08
-#define	DB_EEPROM_CHKSUM		0x1f
-
-#define	DB_EEPROM_CLEN			0x20	// length of common portion of eeprom
-
-#define	DB_EEPROM_CUSTOM_BASE		DB_EEPROM_CLEN	// first avail offset for
-							//   daughterboard specific use
-
-#endif /* INCLUDED_USRP2_I2C_ADDR_H */
-
diff --git a/firmware/microblaze/include/usrp2_types.h b/firmware/microblaze/include/usrp2_types.h
deleted file mode 100644
index fe45936f0..000000000
--- a/firmware/microblaze/include/usrp2_types.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_USRP2_TYPES_H
-#define INCLUDED_USRP2_TYPES_H
-
-#include <stdint.h>
-
-/*!
- * \brief Fixed point representation of a frequency in Hertz (VITA-49 compatible)
- *
- * 64-bit two's complement, with the radix point 20 bits up from the bottom. 
- * Q44.20 format (20 bits to the right of the radix point)
- *
- * Values range from +/- 8.79 terahertz with a resolution of 0.95 microhertz.
- */
-typedef int64_t	u2_fxpt_freq_t;
-
-#define U2_FPF_RP	20	// location of radix point in u2_fxpt_freq_t
-
-// macro so we can init structs at compile time
-#define U2_DOUBLE_TO_FXPT_FREQ(f) (int64_t)((f) * (1LL << U2_FPF_RP))
-
-static inline u2_fxpt_freq_t
-u2_double_to_fxpt_freq(double f)
-{
-  return U2_DOUBLE_TO_FXPT_FREQ(f);
-}
-
-static inline int
-u2_fxpt_freq_round_to_int(u2_fxpt_freq_t fx)
-{
-  return (int)((fx+(1<<(U2_FPF_RP-1)))>>U2_FPF_RP);
-}
-
-static inline double
-u2_fxpt_freq_to_double(u2_fxpt_freq_t fx)
-{
-  return ((double) fx) * 1.0/(1 << U2_FPF_RP);
-}
-
-static inline uint32_t
-u2_fxpt_freq_hi(u2_fxpt_freq_t f)
-{
-  return ((f >> 32) & 0xffffffff);
-}
-
-static inline uint32_t
-u2_fxpt_freq_lo(u2_fxpt_freq_t f)
-{
-  return (f & 0xffffffff);
-}
-
-static inline u2_fxpt_freq_t
-u2_fxpt_freq_from_hilo(uint32_t hi, uint32_t lo)
-{
-  return (((u2_fxpt_freq_t) hi) << 32) | lo;
-}
-
-/*!
- * \brief Fixed point representation of a gain in dB (VITA-49 compatible)
- *
- * 16-bit two's complement, with the radix point 7 bits up from the bottom. 
- * Q9.7 format (7 bits to the right of the radix point)
- */
-typedef int16_t u2_fxpt_gain_t;
-
-#define U2_FPG_RP	7	// location of radix point in u2_fxpt_gain_t
-
-// macro so we can init structs at compile time
-#define U2_DOUBLE_TO_FXPT_GAIN(g) (int16_t)((g) * (1 << U2_FPG_RP))
-
-static inline u2_fxpt_gain_t
-u2_double_to_fxpt_gain(double g)
-{
-  return U2_DOUBLE_TO_FXPT_GAIN(g);
-}
-
-static inline float
-u2_fxpt_gain_to_double(u2_fxpt_gain_t fx)
-{
-  return ((double) fx) * 1.0/(1 << U2_FPG_RP);
-}
-
-static inline int
-u2_fxpt_gain_round_to_int(u2_fxpt_gain_t fx)
-{ 
-  return (int)((fx+(1<<(U2_FPG_RP-1)))>>U2_FPG_RP);
-}
-
-#endif /* INCLUDED_USRP2_TYPES_H */
diff --git a/firmware/microblaze/include/vrt/bits.h b/firmware/microblaze/include/vrt/bits.h
deleted file mode 100644
index 54eeec7b4..000000000
--- a/firmware/microblaze/include/vrt/bits.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_VRT_BITS_H
-#define INCLUDED_VRT_BITS_H
-
-#include <stdint.h>
-
-
-/* VRT Header bits */
-
-#define	VRTH_PT_MASK		  (0xf << 28)
-#define	VRTH_PT_IF_DATA_NO_SID	  (0x0 << 28)	// IF-Data, no stream id
-#define	VRTH_PT_IF_DATA_WITH_SID  (0x1 << 28)	// IF-Data, w/ stream id
-#define VRTH_PT_EXT_DATA_NO_SID	  (0x2 << 28)
-#define	VRTH_PT_EXT_DATA_WITH_SID (0x3 << 28)
-#define	VRTH_PT_IF_CONTEXT	  (0x4 << 28)
-#define	VRTH_PT_EXT_CONTEXT	  (0x5 << 28)
-
-#define	VRTH_HAS_CLASSID	  (1 << 27)
-#define	VRTH_HAS_TRAILER	  (1 << 26)	// Data pkts only
-#define	VRTH_START_OF_BURST	  (1 << 25)	// Data (Tx) pkts only
-#define	VRTH_END_OF_BURST	  (1 << 24)	// Data (Tx) pkts only
-#define	VRTH_TSM		  (1 << 24)	// Context pkts only
-
-#define	VRTH_TSI_MASK		  (0x3 << 22)
-#define	VRTH_TSI_NONE		  (0x0 << 22)
-#define	VRTH_TSI_UTC		  (0x1 << 22)
-#define	VRTH_TSI_GPS		  (0x2 << 22)
-#define VRTH_TSI_OTHER		  (0x3 << 22)
-
-#define	VRTH_TSF_MASK		  (0x3 << 20)
-#define	VRTH_TSF_NONE		  (0x0 << 20)
-#define	VRTH_TSF_SAMPLE_CNT	  (0x1 << 20)
-#define	VRTH_TSF_REAL_TIME_PS	  (0x2 << 20)
-#define	VRTH_TSF_FREE_RUNNING	  (0x3 << 20)
-
-#define	VRTH_PKT_CNT_SHIFT	  16
-#define	VRTH_PKT_CNT_MASK	  (0xf << 16)
-
-#define	VRTH_PKT_SIZE_MASK	  0xffff		    
-
-
-static inline int
-vrth_pkt_cnt(uint32_t h)
-{
-  return (h & VRTH_PKT_CNT_MASK) >> 16;
-}
-
-static inline int
-vrth_pkt_size(uint32_t h)
-{
-  return h & VRTH_PKT_SIZE_MASK;
-}
-
-/*
- * Trailer bits
- */
-#define	TR_E		      (1 << 8)
-
-#define TR_ENABLE(x) ((x) << 20)
-#define	TR_STATE(x)  ((x) <<  8)
-
-// Use these with TR_ENABLE and TR_STATE
-#define	TR_CAL_TIME	      (1 << 11)
-#define	TR_VALID_DATA	      (1 << 10)
-#define TR_REF_LOCK	      (1 <<  9)
-#define	TR_AGC		      (1 <<  8)
-#define TR_DETECTED_SIG	      (1 <<  7)
-#define	TR_SPECTRAL_INVERSION (1 <<  6)
-#define	TR_OVER_RANGE	      (1 <<  5)
-#define	TR_SAMPLE_LOSS	      (1 <<  4)
-#define TR_USER_3	      (1 <<  3)
-#define TR_USER_2	      (1 <<  2)
-#define TR_USER_1	      (1 <<  1)
-#define TR_USER_0	      (1 <<  0)
-
-#endif /* INCLUDED_VRT_BITS_H */
diff --git a/firmware/microblaze/include/vrt/types.h b/firmware/microblaze/include/vrt/types.h
deleted file mode 100644
index edfa4ec37..000000000
--- a/firmware/microblaze/include/vrt/types.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_VRT_TYPES_H
-#define INCLUDED_VRT_TYPES_H
-
-#include <stdint.h>
-
-/* macros for dealing with fixed point numbers */
-#define _FXPT_C(_type, _x, _rp) ((_type)((_x)*(1ll << _rp)))
-#define _FXPT_TO_INT(_x, _one) (((_x) + ((_one)/2))/(_one))
-#define _FXPT_TO_DOUBLE(_x, _one) ((double)(_x) * (1.0/(_one)))
-
-/***********************************************************************
- * The VRT Altitude Type (meters)
- **********************************************************************/
-typedef int32_t vrt_altitude_t;
-#define VRT_ALTITUDE_RP 5
-#define VRT_ALTITUDE_C(_x) _FXPT_C(vrt_altitude_t, _x, VRT_ALTITUDE_RP)
-
-static inline vrt_altitude_t
-double_to_vrt_altitude(double num){
-  return VRT_ALTITUDE_C(num);
-}
-
-static inline int32_t
-vrt_altitude_round_to_int(vrt_altitude_t fx){
-  return _FXPT_TO_INT(fx, VRT_ALTITUDE_C(1));
-}
-
-static inline double
-vrt_altitude_to_double(vrt_altitude_t fx){
-  return _FXPT_TO_DOUBLE(fx, VRT_ALTITUDE_C(1));
-}
-
-/***********************************************************************
- * The VRT Geolocation Angle Type (degrees)
- **********************************************************************/
-typedef int32_t vrt_geo_angle_t;
-#define VRT_GEO_ANGLE_RP 22
-#define VRT_GEO_ANGLE_C(_x) _FXPT_C(vrt_geo_angle_t, _x, VRT_GEO_ANGLE_RP)
-
-static inline vrt_geo_angle_t
-double_to_vrt_geo_angle(double num){
-  return VRT_GEO_ANGLE_C(num);
-}
-
-static inline int16_t
-vrt_geo_angle_round_to_int(vrt_geo_angle_t fx){
-  return _FXPT_TO_INT(fx, VRT_GEO_ANGLE_C(1));
-}
-
-static inline double
-vrt_geo_angle_to_double(vrt_geo_angle_t fx){
-  return _FXPT_TO_DOUBLE(fx, VRT_GEO_ANGLE_C(1));
-}
-
-/***********************************************************************
- * The VRT Frequency Type (Hz)
- **********************************************************************/
-typedef int64_t vrt_freq_t;
-#define VRT_FREQ_RP 20
-#define VRT_FREQ_C(_x) _FXPT_C(vrt_freq_t, _x, VRT_FREQ_RP)
-
-static inline vrt_freq_t
-double_to_vrt_freq(double num){
-  return VRT_FREQ_C(num);
-}
-
-static inline int64_t
-vrt_freq_round_to_int(vrt_freq_t fx){
-  return _FXPT_TO_INT(fx, VRT_FREQ_C(1));
-}
-
-static inline double
-vrt_freq_to_double(vrt_freq_t fx){
-  return _FXPT_TO_DOUBLE(fx, VRT_FREQ_C(1));
-}
-
-/***********************************************************************
- * The VRT Gain Type (dB)
- **********************************************************************/
-typedef int16_t vrt_gain_t;
-#define VRT_GAIN_RP 7
-#define VRT_GAIN_C(_x) _FXPT_C(vrt_gain_t, _x, VRT_GAIN_RP)
-
-static inline vrt_gain_t
-double_to_vrt_gain(double num){
-  return VRT_GAIN_C(num);
-}
-
-static inline int16_t
-vrt_gain_round_to_int(vrt_gain_t fx){
-  return _FXPT_TO_INT(fx, VRT_GAIN_C(1));
-}
-
-static inline double
-vrt_gain_to_double(vrt_gain_t fx){
-  return _FXPT_TO_DOUBLE(fx, VRT_GAIN_C(1));
-}
-
-/***********************************************************************
- * The VRT Temperature Type (Celcius)
- **********************************************************************/
-typedef int16_t vrt_temp_t;
-#define VRT_TEMP_RP 6
-#define VRT_TEMP_C(_x) _FXPT_C(vrt_temp_t, _x, VRT_TEMP_RP)
-
-static inline vrt_temp_t
-double_to_vrt_temp(double num){
-  return VRT_TEMP_C(num);
-}
-
-static inline int16_t
-vrt_temp_round_to_int(vrt_temp_t fx){
-  return _FXPT_TO_INT(fx, VRT_TEMP_C(1));
-}
-
-static inline double
-vrt_temp_to_double(vrt_temp_t fx){
-  return _FXPT_TO_DOUBLE(fx, VRT_TEMP_C(1));
-}
-
-#endif /* INCLUDED_VRT_TYPES_H */
diff --git a/firmware/microblaze/lib/.gitignore b/firmware/microblaze/lib/.gitignore
deleted file mode 100644
index 5d838bf6c..000000000
--- a/firmware/microblaze/lib/.gitignore
+++ /dev/null
@@ -1,40 +0,0 @@
-*~
-/*-stamp
-/*.a
-/*.bin
-/*.dump
-/*.log
-/*.rom
-/.deps
-/Makefile
-/Makefile.in
-/aclocal.m4
-/autom4te.cache
-/blink_leds
-/blink_leds2
-/build
-/compile
-/config.h
-/config.h.in
-/config.log
-/config.status
-/configure
-/depcomp
-/eth_test
-/gen_eth_packets
-/ibs_rx_test
-/ibs_tx_test
-/install-sh
-/libtool
-/ltmain.sh
-/missing
-/py-compile
-/rcv_eth_packets
-/run_tests.sh
-/stamp-h1
-/test1
-/test_phy_comm
-/timer_test
-/buf_ram_test
-/buf_ram_zero
-/hello
diff --git a/firmware/microblaze/lib/Makefile.am b/firmware/microblaze/lib/Makefile.am
deleted file mode 100644
index b51d74463..000000000
--- a/firmware/microblaze/lib/Makefile.am
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# Copyright 2010 Ettus Research LLC
-#
-# Copyright 2007 Free Software Foundation, Inc.
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-include $(top_srcdir)/Makefile.common
-
-noinst_LIBRARIES = \
-	libu2fw.a
-
-libu2fw_a_SOURCES = \
-	abort.c \
-	ad9510.c \
-	bsm12.c \
-	buffer_pool.c \
-	clocks.c \
-	dbsm.c \
-	eeprom.c \
-	ethernet.c \
-	eth_mac.c \
-	_exit.c \
-	exit.c \
-	hal_io.c \
-	hal_uart.c \
-	i2c.c \
-	mdelay.c \
-	memcpy_wa.c \
-	memset_wa.c \
-	nonstdio.c \
-	pic.c \
-	print_mac_addr.c \
-	print_rmon_regs.c \
-	print_buffer.c \
-	printf.c \
-	sd.c \
-	spi.c \
-	u2_init.c \
-	net_common.c \
-	arp_cache.c \
-	banal.c
-
-noinst_HEADERS = \
-	ad9510.h \
-	bsm12.h \
-	buffer_pool.h \
-	clocks.h \
-	dbsm.h \
-	eth_mac.h \
-	eth_mac_regs.h \
-	eth_phy.h \
-	ethernet.h \
-	hal_io.h \
-	hal_uart.h \
-	i2c.h \
-	mdelay.h \
-	memcpy_wa.h \
-	memory_map.h \
-	memset_wa.h \
-	nonstdio.h \
-	pic.h \
-	print_rmon_regs.h \
-	sd.h \
-	spi.h \
-	stdint.h \
-	stdio.h \
-	u2_init.h \
-	usrp2_bytesex.h \
-	wb16550.h \
-	net_common.h \
-	if_arp.h \
-	arp_cache.h \
-	banal.h \
-	ethertype.h
diff --git a/firmware/microblaze/lib/clocks.c b/firmware/microblaze/lib/clocks.c
deleted file mode 100644
index ccc4a7cc7..000000000
--- a/firmware/microblaze/lib/clocks.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include <clocks.h>
-
-#include "memory_map.h"
-#include "ad9510.h"
-#include "spi.h"
-#include "u2_init.h"
-#include "nonstdio.h"
-
-void 
-clocks_init(void)
-{
-  // Set up basic clocking functions in AD9510
-  ad9510_write_reg(0x45, 0x00); // CLK2 drives distribution
-
-  clocks_enable_fpga_clk(true, 1);
-
-  spi_wait();
-
-  // Set up PLL for 10 MHz reference
-  // Reg 4, A counter, Don't Care
-  ad9510_write_reg(0x05, 0x00);  // Reg 5, B counter MSBs, 0
-  ad9510_write_reg(0x06, 0x05);  // Reg 6, B counter LSBs, 5
-  // Reg 7, Loss of reference detect, doesn't work yet, 0
-  ad9510_write_reg(0x5A, 0x01); // Update Regs
-
-  // Primary clock configuration
-  clocks_mimo_config(MC_WE_DONT_LOCK);
-
-  // Set up other clocks
-  //clocks_enable_test_clk(false, 0);
-  //clocks_enable_tx_dboard(false, 0);
-  //clocks_enable_rx_dboard(false, 0);
-  clocks_enable_eth_phyclk(false, 0);
-
-  // Enable clock to ADCs and DACs
-  //clocks_enable_dac_clk(true, 1);
-  //clocks_enable_adc_clk(true, 1);
-}
-
-
-void
-clocks_mimo_config(int flags)
-{
-  if (flags & _MC_WE_LOCK){
-    // Reg 8, Charge pump on, dig lock det, positive PFD, 47
-    ad9510_write_reg(0x08, 0x47);
-  }
-  else {
-    // Reg 8, Charge pump off, dig lock det, positive PFD
-    ad9510_write_reg(0x08, 0x00);
-  }
-  
-  // Reg 9, Charge pump current, 0x40=3mA, 0x00=650uA
-  ad9510_write_reg(0x09, 0x00);
-  // Reg A, Prescaler of 2, everything normal 04
-  ad9510_write_reg(0x0A, 0x04);
-  // Reg B, R Div MSBs, 0
-  ad9510_write_reg(0x0B, 0x00);
-  // Reg C, R Div LSBs, 1
-  ad9510_write_reg(0x0C, 0x01);
-  // Reg D, Antibacklash, Digital lock det, 0
-
-  ad9510_write_reg(0x5A, 0x01); // Update Regs
-
-  spi_wait();
-  
-  // Allow for clock switchover
-  
-  if (flags & _MC_WE_LOCK){		// WE LOCK
-    if (flags & _MC_MIMO_CLK_INPUT) {
-      // Turn on ref output and choose the MIMO connector
-      output_regs->clk_ctrl = 0x15;  
-    }
-    else {
-      // turn on ref output and choose the SMA
-      output_regs->clk_ctrl = 0x1C; 
-    }
-  }
-  else {				// WE DONT LOCK
-    // Disable both ext clk inputs
-    output_regs->clk_ctrl = 0x10;
-  }
-
-  // Do we drive a clock onto the MIMO connector?
-  if (flags & MC_PROVIDE_CLK_TO_MIMO)
-    clocks_enable_clkexp_out(true,10);
-  else
-    clocks_enable_clkexp_out(false,0); 
-}
-
-bool 
-clocks_lock_detect()
-{
-  if(pic_regs->pending & PIC_CLKSTATUS)
-    return true;
-  return false;
-}
-
-int inline
-clocks_gen_div(int divisor)
-{
-  int L,H;
-  L = (divisor>>1)-1;
-  H = divisor-L-2;
-  return (L<<4)|H;
-}
-
-#define CLOCK_OUT_EN 0x08
-#define CLOCK_OUT_DIS_CMOS 0x01
-#define CLOCK_OUT_DIS_PECL 0x02
-#define CLOCK_DIV_DIS 0x80
-#define CLOCK_DIV_EN 0x00
-
-#define CLOCK_MODE_PECL 1
-#define CLOCK_MODE_LVDS 2
-#define CLOCK_MODE_CMOS 3
-
-void 
-clocks_enable_XXX_clk(bool enable, int divisor, int reg_en, int reg_div, int mode)
-{
-  int enable_word, div_word, div_en_word;
-
-  switch(mode) {
-  case CLOCK_MODE_PECL :
-    enable_word = enable ? 0x08 : 0x0A;
-    break;
-  case CLOCK_MODE_LVDS :
-    enable_word = enable ? 0x02 : 0x03;
-    break;
-  case CLOCK_MODE_CMOS :
-    enable_word = enable ? 0x08 : 0x09;
-    break;
-  }
-  if(enable && (divisor>1)) {
-    div_word = clocks_gen_div(divisor);
-    div_en_word = CLOCK_DIV_EN;
-  }
-  else {
-    div_word = 0;
-    div_en_word = CLOCK_DIV_DIS;
-  }
-
-  ad9510_write_reg(reg_en,enable_word); // Output en/dis
-  ad9510_write_reg(reg_div,div_word); // Set divisor
-  ad9510_write_reg(reg_div+1,div_en_word); // Enable or Bypass Divider
-  ad9510_write_reg(0x5A, 0x01);  // Update Regs
-}
-
-// Clock 0
-/*void
-clocks_enable_test_clk(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x3C,0x48,CLOCK_MODE_PECL);
-}*/
-
-// Clock 1
-void
-clocks_enable_fpga_clk(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x3D,0x4A,CLOCK_MODE_PECL);
-}
-
-// Clock 2 on Rev 3, Clock 5 on Rev 4
-void
-clocks_enable_clkexp_out(bool enable, int divisor)
-{
-  if(u2_hw_rev_major == 3)
-    clocks_enable_XXX_clk(enable,divisor,0x3E,0x4C,CLOCK_MODE_PECL);
-  else if(u2_hw_rev_major == 4) {
-    ad9510_write_reg(0x34,0x00);  // Turn on fine delay
-    ad9510_write_reg(0x35,0x00);  // Set Full Scale to nearly 10ns
-    ad9510_write_reg(0x36,0x1c);  // Set fine delay.  0x20 is midscale
-    clocks_enable_XXX_clk(enable,divisor,0x41,0x52,CLOCK_MODE_LVDS);
-    
-  }
-  else
-    putstr("ERR: Invalid Rev\n");
-}
-
-// Clock 5 on Rev 3, none (was 2) on Rev 4
-void
-clocks_enable_eth_phyclk(bool enable, int divisor)
-{
-  if(u2_hw_rev_major == 3)
-    clocks_enable_XXX_clk(enable,divisor,0x41,0x52,CLOCK_MODE_LVDS);
-  else if(u2_hw_rev_major == 4)
-    clocks_enable_XXX_clk(enable,divisor,0x3E,0x4C,CLOCK_MODE_PECL);
-  else
-    putstr("ERR: Invalid Rev\n");
-}
-
-// Clock 3
-/*void
-clocks_enable_dac_clk(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x3F,0x4E,CLOCK_MODE_PECL);
-}*/
-
-// Clock 4
-/*void
-clocks_enable_adc_clk(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x40,0x50,CLOCK_MODE_LVDS);
-}*/
-
-// Clock 6
-/*void
-clocks_enable_tx_dboard(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x42,0x54,CLOCK_MODE_CMOS);
-}*/
-
-// Clock 7
-/*void
-clocks_enable_rx_dboard(bool enable, int divisor)
-{
-  clocks_enable_XXX_clk(enable,divisor,0x43,0x56,CLOCK_MODE_CMOS);
-}*/
diff --git a/firmware/microblaze/lib/memory_map.h b/firmware/microblaze/lib/memory_map.h
deleted file mode 100644
index cdf3dd338..000000000
--- a/firmware/microblaze/lib/memory_map.h
+++ /dev/null
@@ -1,792 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2007,2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* Overall Memory Map
- *   0000-7FFF  32K   RAM space (16K on 1500, 24K on 2000, 32K on DSP)
- *   8000-BFFF  16K   Buffer Pool
- *   C000-FFFF  16K   Peripherals
- */
-
-
-#ifndef INCLUDED_MEMORY_MAP_H
-#define INCLUDED_MEMORY_MAP_H
-
-#include <stdint.h>
-
-
-#define MASTER_CLK_RATE        100000000		// 100 MHz
-
-
-////////////////////////////////////////////////////////////////
-//
-//         Memory map for embedded wishbone bus
-//
-////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////
-// Main RAM, Slave 0
-
-#define RAM_BASE 0x0000
-
-////////////////////////////////////////////////////////////////
-// Buffer Pool RAM, Slave 1
-//
-// The buffers themselves are located in Slave 1, Buffer Pool RAM.
-// The status registers are in Slave 5, Buffer Pool Status.
-// The control register is in Slave 7, Settings Bus.
-
-#define BUFFER_POOL_RAM_BASE 0x8000
-
-#define	NBUFFERS                8
-#define BP_NLINES	   0x0200	// number of 32-bit lines in a buffer
-#define BP_LAST_LINE	(BP_NLINES - 1)	// last line in a buffer
-
-#define buffer_pool_ram \
-  ((uint32_t *) BUFFER_POOL_RAM_BASE)
-
-#define buffer_ram(n) (&buffer_pool_ram[(n) * BP_NLINES])
-
-
-/////////////////////////////////////////////////////
-// SPI Core, Slave 2.  See core docs for more info
-#define SPI_BASE 0xC000   // Base address (16-bit)
-
-typedef struct {
-  volatile uint32_t	txrx0;
-  volatile uint32_t	txrx1;
-  volatile uint32_t	txrx2;
-  volatile uint32_t	txrx3;
-  volatile uint32_t	ctrl;
-  volatile uint32_t	div;
-  volatile uint32_t	ss;
-} spi_regs_t;
-
-#define spi_regs ((spi_regs_t *) SPI_BASE)
-
-
-// Masks for controlling different peripherals
-#define SPI_SS_AD9510    1
-#define SPI_SS_AD9777    2
-#define SPI_SS_RX_DAC    4
-#define SPI_SS_RX_ADC    8
-#define SPI_SS_RX_DB    16
-#define SPI_SS_TX_DAC   32
-#define SPI_SS_TX_ADC   64
-#define SPI_SS_TX_DB   128
-
-// Masks for different parts of CTRL reg
-#define SPI_CTRL_ASS      (1<<13)
-#define SPI_CTRL_IE       (1<<12)
-#define SPI_CTRL_LSB      (1<<11)
-#define SPI_CTRL_TXNEG    (1<<10)
-#define SPI_CTRL_RXNEG    (1<< 9)
-#define SPI_CTRL_GO_BSY   (1<< 8)
-#define SPI_CTRL_CHAR_LEN_MASK 0x7F
-
-////////////////////////////////////////////////
-// I2C, Slave 3
-// See Wishbone I2C-Master Core Specification.
-
-#define I2C_BASE 0xC400
-
-typedef struct {
-  volatile uint32_t  prescaler_lo;	// r/w
-  volatile uint32_t  prescaler_hi;	// r/w
-  volatile uint32_t  ctrl;		// r/w
-  volatile uint32_t  data;		// wr = transmit reg; rd = receive reg
-  volatile uint32_t  cmd_status;	// wr = command reg;  rd = status reg
-} i2c_regs_t;
-
-#define i2c_regs ((i2c_regs_t *) I2C_BASE)
-
-#define	I2C_CTRL_EN	(1 << 7)	// core enable
-#define	I2C_CTRL_IE	(1 << 6)	// interrupt enable
-
-//
-// STA, STO, RD, WR, and IACK bits are cleared automatically
-//
-#define	I2C_CMD_START	(1 << 7)	// generate (repeated) start condition
-#define I2C_CMD_STOP	(1 << 6)	// generate stop condition
-#define	I2C_CMD_RD	(1 << 5)	// read from slave
-#define I2C_CMD_WR	(1 << 4)	// write to slave
-#define	I2C_CMD_NACK	(1 << 3)	// when a rcvr, send ACK (ACK=0) or NACK (ACK=1)
-#define I2C_CMD_RSVD_2	(1 << 2)	// reserved
-#define	I2C_CMD_RSVD_1	(1 << 1)	// reserved
-#define I2C_CMD_IACK	(1 << 0)	// set to clear pending interrupt
-
-#define I2C_ST_RXACK	(1 << 7)	// Received acknowledgement from slave (1 = NAK, 0 = ACK)
-#define	I2C_ST_BUSY	(1 << 6)	// 1 after START signal detected; 0 after STOP signal detected
-#define	I2C_ST_AL	(1 << 5)	// Arbitration lost.  1 when core lost arbitration
-#define	I2C_ST_RSVD_4	(1 << 4)	// reserved
-#define	I2C_ST_RSVD_3	(1 << 3)	// reserved
-#define	I2C_ST_RSVD_2	(1 << 2)	// reserved
-#define I2C_ST_TIP	(1 << 1)	// Transfer-in-progress
-#define	I2C_ST_IP	(1 << 0)	// Interrupt pending
-
-
-////////////////////////////////////////////////
-// GPIO, Slave 4
-//
-// These go to the daughterboard i/o pins
-
-#define GPIO_BASE 0xC800
-
-typedef struct {
-  volatile uint32_t	io;	  // tx data in high 16, rx in low 16
-  volatile uint32_t     ddr;      // 32 bits, 1 means output. tx in high 16, rx in low 16
-  volatile uint32_t	tx_sel;   // 16 2-bit fields select which source goes to TX DB
-  volatile uint32_t	rx_sel;   // 16 2-bit fields select which source goes to RX DB
-} gpio_regs_t;
-
-// each 2-bit sel field is layed out this way
-#define GPIO_SEL_SW	   0 // if pin is an output, set by software in the io reg
-#define	GPIO_SEL_ATR	   1 // if pin is an output, set by ATR logic
-#define	GPIO_SEL_DEBUG_0   2 // if pin is an output, debug lines from FPGA fabric
-#define	GPIO_SEL_DEBUG_1   3 // if pin is an output, debug lines from FPGA fabric
-
-#define gpio_base ((gpio_regs_t *) GPIO_BASE)
-
-///////////////////////////////////////////////////
-// Buffer Pool Status, Slave 5
-//
-// The buffers themselves are located in Slave 1, Buffer Pool RAM.
-// The status registers are in Slave 5, Buffer Pool Status.
-// The control register is in Slave 7, Settings Bus.
-
-#define BUFFER_POOL_STATUS_BASE 0xCC00
-
-typedef struct {
-  volatile uint32_t last_line[NBUFFERS]; // last line xfer'd in buffer
-  volatile uint32_t status;	         // error and done flags
-  volatile uint32_t hw_config;	         // see below
-  volatile uint32_t dummy[3];
-  volatile uint32_t irqs;
-  volatile uint32_t pri_enc_bp_status;
-  volatile uint32_t cycle_count;
-} buffer_pool_status_t;
-
-#define buffer_pool_status ((buffer_pool_status_t *) BUFFER_POOL_STATUS_BASE)
-
-/*
- * Buffer n's xfer is done.
- * Clear this bit by issuing bp_clear_buf(n)
- */
-#define BPS_DONE(n)     (0x00000001 << (n))
-#define BPS_DONE_0	BPS_DONE(0)
-#define BPS_DONE_1	BPS_DONE(1)
-#define BPS_DONE_2	BPS_DONE(2)
-#define BPS_DONE_3	BPS_DONE(3)
-#define BPS_DONE_4	BPS_DONE(4)
-#define BPS_DONE_5	BPS_DONE(5)
-#define BPS_DONE_6	BPS_DONE(6)
-#define BPS_DONE_7	BPS_DONE(7)
-
-/*
- * Buffer n's xfer had an error.
- * Clear this bit by issuing bp_clear_buf(n)
- */
-#define BPS_ERROR(n)	(0x00000100 << (n))
-#define BPS_ERROR_0	BPS_ERROR(0)
-#define BPS_ERROR_1	BPS_ERROR(1)
-#define BPS_ERROR_2	BPS_ERROR(2)
-#define BPS_ERROR_3	BPS_ERROR(3)
-#define BPS_ERROR_4	BPS_ERROR(4)
-#define BPS_ERROR_5	BPS_ERROR(5)
-#define BPS_ERROR_6	BPS_ERROR(6)
-#define BPS_ERROR_7	BPS_ERROR(7)
-
-/*
- * Buffer n is idle.  A buffer is idle if it's not
- * DONE, ERROR, or processing a transaction.  If it's
- * IDLE, it's safe to start a new transaction.
- *
- * Clear this bit by starting a xfer with
- * bp_send_from_buf or bp_receive_to_buf.
- */
-#define BPS_IDLE(n)     (0x00010000 << (n))
-#define BPS_IDLE_0	BPS_IDLE(0)
-#define BPS_IDLE_1	BPS_IDLE(1)
-#define BPS_IDLE_2	BPS_IDLE(2)
-#define BPS_IDLE_3	BPS_IDLE(3)
-#define BPS_IDLE_4	BPS_IDLE(4)
-#define BPS_IDLE_5	BPS_IDLE(5)
-#define BPS_IDLE_6	BPS_IDLE(6)
-#define BPS_IDLE_7	BPS_IDLE(7)
-
-/*
- * Buffer n has a "slow path" packet in it.
- * This bit is orthogonal to the bits above and indicates that
- * the FPGA ethernet rx protocol engine has identified this packet
- * as one requiring firmware intervention.
- */
-#define BPS_SLOWPATH(n) (0x01000000 << (n))
-#define BPS_SLOWPATH_0	BPS_SLOWPATH(0)
-#define BPS_SLOWPATH_1	BPS_SLOWPATH(1)
-#define BPS_SLOWPATH_2	BPS_SLOWPATH(2)
-#define BPS_SLOWPATH_3	BPS_SLOWPATH(3)
-#define BPS_SLOWPATH_4	BPS_SLOWPATH(4)
-#define BPS_SLOWPATH_5	BPS_SLOWPATH(5)
-#define BPS_SLOWPATH_6	BPS_SLOWPATH(6)
-#define BPS_SLOWPATH_7	BPS_SLOWPATH(7)
-
-
-#define BPS_DONE_ALL	  0x000000ff	// mask of all dones
-#define BPS_ERROR_ALL	  0x0000ff00	// mask of all errors
-#define BPS_IDLE_ALL      0x00ff0000	// mask of all idles
-#define BPS_SLOWPATH_ALL  0xff000000	// mask of all slowpaths
-
-// The hw_config register
-
-#define	HWC_SIMULATION		0x80000000
-#define	HWC_WB_CLK_DIV_MASK	0x0000000f
-
-/*!
- * \brief return non-zero if we're running under the simulator
- */
-inline static int
-hwconfig_simulation_p(void)
-{
-  return buffer_pool_status->hw_config & HWC_SIMULATION;
-}
-
-/*!
- * \brief Return Wishbone Clock divisor.
- * The processor runs at the Wishbone Clock rate which is MASTER_CLK_RATE / divisor.
- */
-inline static int
-hwconfig_wishbone_divisor(void)
-{
-  return buffer_pool_status->hw_config & HWC_WB_CLK_DIV_MASK;
-}
-
-///////////////////////////////////////////////////
-// Ethernet Core, Slave 6
-
-#define ETH_BASE 0xD000
-
-#include "eth_mac_regs.h"
-
-#define eth_mac ((eth_mac_regs_t *) ETH_BASE)
-
-////////////////////////////////////////////////////
-// Settings Bus, Slave #7, Not Byte Addressable!
-//
-// Output-only from processor point-of-view.
-// 1KB of address space (== 256 32-bit write-only regs)
-
-
-#define MISC_OUTPUT_BASE        0xD400
-#define	TX_PROTOCOL_ENGINE_BASE 0xD480
-#define	RX_PROTOCOL_ENGINE_BASE 0xD4C0
-#define BUFFER_POOL_CTRL_BASE   0xD500
-#define LAST_SETTING_REG        0xD7FC	// last valid setting register
-
-#define SR_MISC 0
-#define SR_TX_PROT_ENG 32
-#define SR_RX_PROT_ENG 48
-#define SR_BUFFER_POOL_CTRL 64
-#define SR_UDP_SM 96
-#define SR_TX_DSP 208
-#define SR_TX_CTRL 224
-#define SR_RX_DSP 160
-#define SR_RX_CTRL 176
-#define SR_TIME64 192
-#define SR_SIMTIMER 198
-#define SR_LAST 255
-
-#define	_SR_ADDR(sr)	(MISC_OUTPUT_BASE + (sr) * sizeof(uint32_t))
-
-// --- buffer pool control regs ---
-
-typedef struct {
-  volatile uint32_t ctrl;
-} buffer_pool_ctrl_t;
-
-// buffer pool ports
-
-#define	PORT_SERDES	0	// serial/deserializer
-#define	PORT_DSP	1	// DSP tx or rx pipeline
-#define	PORT_ETH	2	// ethernet tx or rx
-#define	PORT_RAM	3	// RAM tx or rx
-
-// the buffer pool ctrl register fields
-
-#define BPC_BUFFER(n) (((n) & 0xf) << 28)
-#define   BPC_BUFFER_MASK      BPC_BUFFER(~0)
-#define   BPC_BUFFER_0	       BPC_BUFFER(0)
-#define   BPC_BUFFER_1	       BPC_BUFFER(1)
-#define   BPC_BUFFER_2	       BPC_BUFFER(2)
-#define   BPC_BUFFER_3	       BPC_BUFFER(3)
-#define   BPC_BUFFER_4	       BPC_BUFFER(4)
-#define   BPC_BUFFER_5	       BPC_BUFFER(5)
-#define   BPC_BUFFER_6	       BPC_BUFFER(6)
-#define   BPC_BUFFER_7	       BPC_BUFFER(7)
-#define	  BPC_BUFFER_NIL       BPC_BUFFER(0x8)	// disable
-
-#define BPC_PORT(n) (((n) & 0x7) << 25)
-#define   BPC_PORT_MASK        BPC_PORT(~0)
-#define   BPC_PORT_SERDES      BPC_PORT(PORT_SERDES)
-#define   BPC_PORT_DSP	       BPC_PORT(PORT_DSP)
-#define   BPC_PORT_ETH         BPC_PORT(PORT_ETH)
-#define   BPC_PORT_RAM         BPC_PORT(PORT_RAM)
-#define   BPC_PORT_NIL	       BPC_PORT(0x4)   	// disable
-
-#define	BPC_CLR	       	       (1 << 24)  // mutually excl commands
-#define	BPC_READ	       (1 << 23)
-#define BPC_WRITE              (1 << 22)
-
-#define BPC_STEP(step) (((step) & 0xf) << 18)
-#define   BPC_STEP_MASK	       BPC_STEP(~0)
-#define BPC_LAST_LINE(line) (((line) & 0x1ff) << 9)
-#define   BPC_LAST_LINE_MASK   BPC_LAST_LINE(~0)
-#define BPC_FIRST_LINE(line) (((line) & 0x1ff) << 0)
-#define   BPC_FIRST_LINE_MASK  BPC_FIRST_LINE(~0)
-
-#define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE)
-
-// --- misc outputs ---
-
-typedef struct {
-  volatile uint32_t	clk_ctrl;
-  volatile uint32_t	serdes_ctrl;
-  volatile uint32_t	adc_ctrl;
-  volatile uint32_t	leds;
-  volatile uint32_t	phy_ctrl;	// LSB is reset line to eth phy
-  volatile uint32_t	debug_mux_ctrl;
-  volatile uint32_t     ram_page;       // FIXME should go somewhere else...
-  volatile uint32_t     flush_icache;   // Flush the icache
-  volatile uint32_t     led_src;        // HW or SW control for LEDs
-} output_regs_t;
-
-#define SERDES_ENABLE 8
-#define SERDES_PRBSEN 4
-#define SERDES_LOOPEN 2
-#define SERDES_RXEN   1
-
-#define	ADC_CTRL_ON	0x0F
-#define	ADC_CTRL_OFF	0x00
-
-// crazy order that matches the labels on the case
-
-#define	LED_A		(1 << 4)
-#define	LED_B		(1 << 1)
-#define	LED_C		(1 << 3)
-#define	LED_D		(1 << 0)
-#define	LED_E		(1 << 2)
-//      LED_F		// controlled by CPLD
-#define	LED_RJ45	(1 << 5)
-
-#define output_regs ((output_regs_t *) MISC_OUTPUT_BASE)
-
-// --- udp tx regs ---
-
-typedef struct {
-  // Bits 19:16 are control info; bits 15:0 are data (see below)
-  // First two words are unused.
-  volatile uint32_t _nope[2];
-  //--- ethernet header - 14 bytes---
-  volatile struct{
-    uint32_t mac_dst_0_1; //word 2
-    uint32_t mac_dst_2_3;
-    uint32_t mac_dst_4_5;
-    uint32_t mac_src_0_1;
-    uint32_t mac_src_2_3;
-    uint32_t mac_src_4_5;
-    uint32_t ether_type; //word 8
-  } eth_hdr;
-  //--- ip header - 20 bytes ---
-  volatile struct{
-    uint32_t ver_ihl_tos; //word 9
-    uint32_t total_length;
-    uint32_t identification;
-    uint32_t flags_frag_off;
-    uint32_t ttl_proto;
-    uint32_t checksum;
-    uint32_t src_addr_high;
-    uint32_t src_addr_low;
-    uint32_t dst_addr_high;
-    uint32_t dst_addr_low; //word 18
-  } ip_hdr;
-  //--- udp header - 8 bytes ---
-  volatile struct{
-    uint32_t src_port; //word 19
-    uint32_t dst_port;
-    uint32_t length;
-    uint32_t checksum; //word 22
-  } udp_hdr;
-  volatile uint32_t _pad[32-23];
-} sr_udp_sm_t;
-
-// control bits (all expect UDP_SM_LAST_WORD are mutually exclusive)
-
-// This is the last word of the header
-#define	UDP_SM_LAST_WORD		(1 << 19)
-
-// Insert IP header checksum here.  Data is the xor of 16'hFFFF and
-// the values written into regs 9-13 and 15-18.
-#define	UDP_SM_INS_IP_HDR_CHKSUM	(1 << 18)
-
-// Insert IP Length here (data ignored)
-#define	UDP_SM_INS_IP_LEN		(1 << 17)
-
-// Insert UDP Length here (data ignore)
-#define	UDP_SM_INS_UDP_LEN		(1 << 16)
-
-#define sr_udp_sm ((sr_udp_sm_t *) _SR_ADDR(SR_UDP_SM))
-
-// --- dsp tx regs ---
-
-#define MIN_CIC_INTERP	1
-#define	MAX_CIC_INTERP  128
-
-typedef struct {
-  volatile uint32_t     num_chan;
-  volatile uint32_t     clear_state;	// clears out state machine, fifos,
-} sr_tx_ctrl_t;
-
-#define sr_tx_ctrl ((sr_tx_ctrl_t *) _SR_ADDR(SR_TX_CTRL))
-
-typedef struct {
-  volatile int32_t	freq;
-  volatile uint32_t	scale_iq;	// {scale_i,scale_q}
-  volatile uint32_t     interp_rate;
-  volatile uint32_t     _padding0;      // padding for the tx_mux
-                                        //   NOT freq, scale, interp
-  /*!
-   * \brief output mux configuration.
-   *
-   * <pre>
-   *     3                   2                   1                       
-   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-   *  +-------------------------------+-------+-------+-------+-------+
-   *  |                                               | DAC1  |  DAC0 |
-   *  +-------------------------------+-------+-------+-------+-------+
-   * 
-   *  There are N DUCs (1 now) with complex inputs and outputs.
-   *  There are two DACs.
-   * 
-   *  Each 4-bit DACx field specifies the source for the DAC
-   *  Each subfield is coded like this: 
-   * 
-   *     3 2 1 0
-   *    +-------+
-   *    |   N   |
-   *    +-------+
-   * 
-   *  N specifies which DUC output is connected to this DAC.
-   * 
-   *   N   which interp output
-   *  ---  -------------------
-   *   0   DUC 0 I
-   *   1   DUC 0 Q
-   *   2   DUC 1 I
-   *   3   DUC 1 Q
-   *   F   All Zeros
-   *   
-   * The default value is 0x10
-   * </pre>
-   */
-  volatile uint32_t	tx_mux;
-
-} dsp_tx_regs_t;
-  
-#define dsp_tx_regs ((dsp_tx_regs_t *) _SR_ADDR(SR_TX_DSP))
-
-// --- VITA RX CTRL regs ---
-typedef struct {
-  // The following 3 are logically a single command register.
-  // They are clocked into the underlying fifo when time_ticks is written.
-  volatile uint32_t	cmd;		// {now, chain, num_samples(30)
-  volatile uint32_t	time_secs;
-  volatile uint32_t	time_ticks;
-
-  volatile uint32_t	clear_overrun;	// write anything to clear overrun
-  volatile uint32_t	vrt_header;	// word 0 of packet.  FPGA fills in packet counter
-  volatile uint32_t	vrt_stream_id;	// word 1 of packet. 
-  volatile uint32_t	vrt_trailer;
-  volatile uint32_t	nsamples_per_pkt;
-  volatile uint32_t     nchannels;      // 1 in basic case, up to 4 for vector sources
-  volatile uint32_t     pad[7];         // Make each structure 16 elements long
-} sr_rx_ctrl_t;
-
-#define sr_rx_ctrl ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL))
-
-// --- dsp rx regs ---
-#define	MIN_CIC_DECIM	1
-#define	MAX_CIC_DECIM   128
-
-typedef struct {
-  volatile int32_t	freq;
-  volatile uint32_t	scale_iq;	// {scale_i,scale_q}
-  volatile uint32_t     decim_rate;
-  volatile uint32_t     dcoffset_i;     // Bit 31 high sets fixed offset mode, using lower 14 bits,
-                                        // otherwise it is automatic 
-  volatile uint32_t     dcoffset_q;     // Bit 31 high sets fixed offset mode, using lower 14 bits
-
-  /*!
-   * \brief input mux configuration.
-   *
-   * This determines which ADC (or constant zero) is connected to 
-   * each DDC input.  There are N DDCs (1 now).  Each has two inputs.
-   *
-   * <pre>
-   * Mux value:
-   *
-   *    3                   2                   1                       
-   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-   * +-------+-------+-------+-------+-------+-------+-------+-------+
-   * |                                                       |Q0 |I0 |
-   * +-------+-------+-------+-------+-------+-------+-------+-------+
-   *
-   * Each 2-bit I field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)
-   * Each 2-bit Q field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)
-   *
-   * The default value is 0x4
-   * </pre>
-   */
-  volatile uint32_t     rx_mux;        // called adc_mux in dsp_core_rx.v
-
-  /*!
-   * \brief Streaming GPIO configuration
-   *
-   * This determines whether the LSBs of I and Q samples come from the DSP
-   * pipeline or from the io_rx GPIO pins.  To stream GPIO, one must first
-   * set the GPIO data direction register to have io_rx[15] and/or io_rx[14]
-   * configured as inputs.  The GPIO pins will be sampled at the time the
-   * remainder of the DSP sample is strobed into the RX sample FIFO.  There
-   * will be a decimation-dependent fixed time offset between the GPIO
-   * sample stream and the associated RF samples.
-   *
-   *    3                   2                   1                       
-   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-   * +-------+-------+-------+-------+-------+-------+-------+-------+
-   * |                           MBZ                             |Q|I|
-   * +-------+-------+-------+-------+-------+-------+-------+-------+
-   *
-   * I         0=LSB comes from DSP pipeline (default)
-   *           1=LSB comes from io_rx[15]
-   * 
-   * Q         0=LSB comes from DSP pipeline (default)
-   *           1=LSB comes from io_rx[14]
-   */
-  volatile uint32_t gpio_stream_enable;
-
-} dsp_rx_regs_t;
-  
-#define dsp_rx_regs ((dsp_rx_regs_t *) _SR_ADDR(SR_RX_DSP))
-
-// ----------------------------------------------------------------
-// VITA49 64 bit time (write only)
-  /*!
-   * \brief Time 64 flags
-   *
-   * <pre>
-   *
-   *    3                   2                   1                       
-   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-   * +-----------------------------------------------------------+-+-+
-   * |                                                           |S|P|
-   * +-----------------------------------------------------------+-+-+
-   *
-   * P - PPS edge selection (0=negedge, 1=posedge, default=0)
-   * S - Source (0=sma, 1=mimo, 0=default)
-   *
-   * </pre>
-   */
-typedef struct {
-  volatile uint32_t	secs;	// value to set absolute secs to on next PPS
-  volatile uint32_t	ticks;	// value to set absolute ticks to on next PPS
-  volatile uint32_t flags;  // flags - see chart above
-  volatile uint32_t imm;    // set immediate (0=latch on next pps, 1=latch immediate, default=0)
-} sr_time64_t;
-
-#define sr_time64 ((sr_time64_t *) _SR_ADDR(SR_TIME64))
-
-
-/* 
- * --- ethernet tx protocol engine regs (write only) ---
- *
- * These registers control the transmit portion of the ethernet
- * protocol engine (out of USRP2).  The protocol engine handles fifo
- * status and sequence number insertion in outgoing packets, and
- * automagically generates status packets when required to inform the
- * host of changes in fifo availability.
- *
- * All outgoing packets have their fifo_status field set to the number
- * of 32-bit lines of fifo available in the ethernet Rx fifo (see
- * usrp2_eth_packet.h).  Seqno's are set if FIXME, else 0.
- *
- * FIXME clean this up once we know how it's supposed to behave.
- */
-
-typedef struct {
-  volatile uint32_t  flags;	     // not yet fully defined (channel?)
-  volatile uint32_t  mac_dst0123;    // 4 bytes of destination mac addr
-  volatile uint32_t  mac_dst45src01; // 2 bytes of dest mac addr; 2 bytes of src mac addr
-  volatile uint32_t  mac_src2345;    // 4 bytes of destination mac addr
-  volatile uint32_t  seqno;	     // Write to init seqno.  It autoincs on match
-} tx_proto_engine_regs_t;
-
-#define tx_proto_engine ((tx_proto_engine_regs_t *) TX_PROTOCOL_ENGINE_BASE)
-
-/*
- * --- ethernet rx protocol engine regs (write only) ---
- *
- * These registers control the receive portion of the ethernet
- * protocol engine (into USRP2).  The protocol engine offloads common
- * packet inspection operations so that firmware has less to do on
- * "fast path" packets.
- *
- * The registers define conditions which must be matched for a packet
- * to be considered a "fast path" packet.  If a received packet
- * matches the src and dst mac address, ethertype, flags field, and
- * expected seqno number it is considered a "fast path" packet, and
- * the expected seqno is updated.  If the packet fails to satisfy any
- * of the above conditions it's a "slow path" packet, and the
- * corresponding SLOWPATH flag will be set buffer_status register.
- */
-
-typedef struct {
-  volatile uint32_t  flags;	     // not yet fully defined (channel?)
-  volatile uint32_t  mac_dst0123;    // 4 bytes of destination mac addr
-  volatile uint32_t  mac_dst45src01; // 2 bytes of dest mac addr; 2 bytes of src mac addr
-  volatile uint32_t  mac_src2345;    // 4 bytes of destination mac addr
-  volatile uint32_t  ethertype_pad;  // ethertype in high 16-bits
-} rx_proto_engine_regs_t;
-
-#define rx_proto_engine ((rx_proto_engine_regs_t *) RX_PROTOCOL_ENGINE_BASE)
-
-
-
-///////////////////////////////////////////////////
-// Simple Programmable Interrupt Controller, Slave 8
-
-#define PIC_BASE  0xD800
-
-// Interrupt request lines
-// Bit numbers (LSB == 0) that correpond to interrupts into PIC
-
-#define	IRQ_BUFFER	0	// buffer manager
-#define	IRQ_ONETIME	1
-#define	IRQ_SPI		2
-#define	IRQ_I2C		3
-#define	IRQ_PHY		4	// ethernet PHY
-#define	IRQ_UNDERRUN	5
-#define	IRQ_OVERRUN	6
-#define	IRQ_PPS		7	// pulse per second
-#define	IRQ_UART_RX	8
-#define	IRQ_UART_TX	9
-#define	IRQ_SERDES	10
-#define	IRQ_CLKSTATUS	11
-#define IRQ_PERIODIC    12
-
-#define IRQ_TO_MASK(x) (1 << (x))
-
-#define PIC_BUFFER_INT    IRQ_TO_MASK(IRQ_BUFFER)
-#define PIC_ONETIME_INT   IRQ_TO_MASK(IRQ_ONETIME)
-#define PIC_SPI_INT       IRQ_TO_MASK(IRQ_SPI)
-#define PIC_I2C_INT       IRQ_TO_MASK(IRQ_I2C)
-#define PIC_PHY_INT       IRQ_TO_MASK(IRQ_PHY)
-#define PIC_UNDERRUN_INT  IRQ_TO_MASK(IRQ_UNDERRUN)
-#define PIC_OVERRUN_INT   IRQ_TO_MASK(IRQ_OVERRUN)
-#define PIC_PPS_INT   	  IRQ_TO_MASK(IRQ_PPS)
-#define PIC_UART_RX_INT   IRQ_TO_MASK(IRQ_UART_RX)
-#define PIC_UART_TX_INT   IRQ_TO_MASK(IRQ_UART_TX)
-#define PIC_SERDES        IRQ_TO_MASK(IRQ_SERDES)
-#define PIC_CLKSTATUS     IRQ_TO_MASK(IRQ_CLKSTATUS)
-
-typedef struct {
-  volatile uint32_t edge_enable; // mask: 1 -> edge triggered, 0 -> level
-  volatile uint32_t polarity;	 // mask: 1 -> rising edge
-  volatile uint32_t mask;	 // mask: 1 -> disabled
-  volatile uint32_t pending;	 // mask: 1 -> pending; write 1's to clear pending ints
-} pic_regs_t;
-
-#define pic_regs ((pic_regs_t *) PIC_BASE)
-
-// ----------------------------------------------------------------
-// WB_CLK_RATE is the time base for this
-typedef struct {
-  volatile uint32_t	onetime;   // Number of wb clk cycles till the onetime interrupt
-  volatile uint32_t	periodic;  // Repeat rate of periodic interrupt
-} sr_simple_timer_t;
-
-#define sr_simple_timer ((sr_simple_timer_t *) _SR_ADDR(SR_SIMTIMER))
-
-///////////////////////////////////////////////////
-// UART, Slave 10
-
-#define UART_BASE  0xE000
-
-typedef struct {
-  //  All elements are 8 bits except for clkdiv (16), but we use uint32 to make 
-  //    the hardware for decoding easier
-  volatile uint32_t clkdiv;  // Set to 50e6 divided by baud rate (no x16 factor)
-  volatile uint32_t txlevel; // Number of spaces in the FIFO for writes
-  volatile uint32_t rxlevel; // Number of available elements in the FIFO for reads
-  volatile uint32_t txchar;  // Write characters to be sent here
-  volatile uint32_t rxchar;  // Read received characters here
-} uart_regs_t;
-
-#define uart_regs ((uart_regs_t *) UART_BASE)
-
-///////////////////////////////////////////////////
-// ATR Controller, Slave 11
-
-#define ATR_BASE  0xE400
-
-typedef struct {
-  volatile uint32_t	v[16];
-} atr_regs_t;
-
-#define	ATR_IDLE	0x0	// indicies into v
-#define ATR_TX		0x1
-#define	ATR_RX		0x2
-#define	ATR_FULL	0x3
-
-#define atr_regs ((atr_regs_t *) ATR_BASE)
-
-///////////////////////////////////////////////////
-// SD Card SPI interface, Slave 13
-//   All regs are 8 bits wide, but are accessed as if they are 32 bits
-
-#define SDSPI_BASE  0xEC00
-
-typedef struct {
-  volatile uint32_t status;  // Write a 1 or 0 for controlling CS
-  volatile uint32_t clkdiv;
-  volatile uint32_t send_dat;
-  volatile uint32_t receive_dat;
-} sdspi_regs_t;
-
-#define sdspi_regs ((sdspi_regs_t *) SDSPI_BASE)
-
-///////////////////////////////////////////////////
-// External RAM interface, Slave 14
-//   Pages are 1K.  Page is 10 bits, set by a control register
-//    output_regs->ram_page
-
-#define EXTRAM_BASE 0xF000
-#define extram ((volatile uint32_t *) EXTRAM_BASE)
-
-
-///////////////////////////////////////////////////
-
-#endif
-
diff --git a/firmware/microblaze/lib/sd.c b/firmware/microblaze/lib/sd.c
deleted file mode 100644
index d000b28ae..000000000
--- a/firmware/microblaze/lib/sd.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2008 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "sd.h"
-#include "memory_map.h"
-#include "stdint.h"
-#include "stdio.h"
-
-static inline void
-sd_packarg(unsigned char *argument,unsigned int value)
-{
-  argument[3] = (unsigned char)(value >> 24);
-  argument[2] = (unsigned char)(value >> 16);
-  argument[1] = (unsigned char)(value >> 8);
-  argument[0] = (unsigned char)(value);
-}
-
-int
-sd_init(void)
-{
-  unsigned char response[5];
-  unsigned char argument[4];
-  int i,j;
-
-  for(i=0;i<4;i++)
-    argument[i] = 0;
-
-  // Set clock to less than 400 kHz to start out
-  sdspi_regs->clkdiv = 128;
-
-  // Delay at least 74 cycles
-  sd_assert_cs();
-  for(i = 0; i < 100; i++)
-    sd_send_byte(SD_IDLE);
-  sd_deassert_cs();
-  
-  // Initialization Sequence -- CMD0 CMD55 ACMD41 CMD58
-  // Put card in idle state
-  if(sd_send_command(SD_CMD0,SD_CMD0_R,response,argument)==0)
-    return 0;  // Something went wrong in command
-
-  j = 0;
-  do {
-    j++;
-    if(sd_send_command(SD_CMD55,SD_CMD55_R,response,argument)==1)
-      sd_send_command(SD_ACMD41,SD_ACMD41_R,response,argument);
-    else
-      j = SD_IDLE_WAIT_MAX;
-  }
-  while(((response[0] & SD_MSK_IDLE) == SD_MSK_IDLE) && (j < SD_IDLE_WAIT_MAX));
-
-  if(j>= SD_IDLE_WAIT_MAX)  // IDLE timeout exceeded, card asleep
-    return 0;
-  
-  // CMD58 reads the SD card capabilities
-  if(sd_send_command(SD_CMD58,SD_CMD58_R,response,argument)==0)
-    return 0;  // CMD58 FAIL
-
-  if((response[2] & SD_MSK_OCR_33) != SD_MSK_OCR_33)
-    return 0;  // Card doesn't do 3.3V
-
-  //printf("OCR = %x %x %x %x\n",response[0],response[1],response[2],response[3]);
-
-  // Set blocklen here
-  sd_packarg(argument,SD_BLOCKLEN);
-  if(sd_send_command(SD_CMD16,SD_CMD16_R,response,argument)==0)
-    return 0;    // Set Blocklen failed
-  
-  // Reset back to high speed
-  sdspi_regs->clkdiv = 4;
-  //puts("finished init\n");
-  return 1;
-}
-
-int sd_send_command(unsigned char cmd,unsigned char response_type,
-		    unsigned char *response,unsigned char *argument)
-{
-  int i;
-  char response_length;
-  unsigned char tmp;
-
-  sd_assert_cs();
-  sd_send_byte((cmd & 0x3F) | 0x40);
-  for(i=3;i>=0;i--)
-    sd_send_byte(argument[i]);
-  sd_send_byte(SD_CRC);   // Always the same
-
-  response_length = 0;
-  switch(response_type)
-    {
-    case SD_R1:
-    case SD_R1B:
-      response_length = 1;
-      break;
-    case SD_R2:
-      response_length = 2;
-      break;
-    case SD_R3:
-      response_length = 5;
-      break;
-    default:
-      break;
-    }
-
-  // Wait for a response, which will have a 0 start bit
-  i = 0;
-  do
-    {
-      tmp = sd_rcv_byte();
-      i++;
-    }
-  while(((tmp & 0x80) != 0) && i < SD_CMD_TIMEOUT);
-
-  if(i>= SD_CMD_TIMEOUT)
-    {
-      sd_deassert_cs();
-      //puts("cmd send timeout\n");
-      return 0;
-    }
-
-  for(i=response_length-1; i>=0; i--)
-    {
-      response[i] = tmp;
-      tmp = sd_rcv_byte();
-    }
-  i = 0;
-  if(response_type == SD_R1B)
-    {
-      do
-	{
-	  i++;
-	  tmp = sd_rcv_byte();
-	}
-      while(tmp != SD_IDLE);
-      sd_send_byte(SD_IDLE);
-    }
-  
-  //puts("send cmd success\n");
-  sd_deassert_cs();
-  return 1;
-}
-
-int
-sd_read_block (unsigned int blockaddr, unsigned char *buf)
-{
-  unsigned char response[5];
-  unsigned char argument[4];
-  unsigned int i = 0;
-  unsigned char tmp;
-
-  blockaddr <<= SD_BLOCKLEN_NBITS;
-  sd_packarg(argument,blockaddr);
-  if(sd_send_command(SD_CMD17,SD_CMD17_R,response,argument)==0)
-    return 0;    //Failed READ;
-  if(response[0] != 0)
-    return 0;    //Misaligned READ
-
-  sd_assert_cs();
-  i = 0;
-  do
-    {
-      tmp = sd_rcv_byte();
-      i++;
-    }
-  while((tmp == 0xFF) && (i < SD_RD_TIMEOUT));
-  if((i>= SD_RD_TIMEOUT) ||((tmp & SD_MSK_TOK_DATAERROR) == 0))
-    {
-      sd_send_byte(SD_IDLE);  // Send a dummy before quitting
-      return 0;   // Data ERROR
-    }
-  for(i=0;i<SD_BLOCKLEN;i++)
-    buf[i] = sd_rcv_byte();
-  return 1;
-
-}
-
-int
-sd_write_block(unsigned int blockaddr, const unsigned char *buf)
-{
-  // FIXME not implemented yet
-  return 0;
-}
diff --git a/firmware/microblaze/lib/sd.h b/firmware/microblaze/lib/sd.h
deleted file mode 100644
index e2d0ae38e..000000000
--- a/firmware/microblaze/lib/sd.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2008 Ettus Research LLC
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_SD_H
-#define INCLUDED_SD_H
-
-#include "memory_map.h"
-
-#define SD_READY 1
-#define SD_IDLE_WAIT_MAX 100
-#define SD_CMD_TIMEOUT 100
-#define SD_RD_TIMEOUT 1000
-
-#define SD_CMD0 0
-#define SD_CMD1 1
-#define SD_CMD9 9
-#define SD_CMD10 10
-#define SD_CMD12 12
-#define SD_CMD13 13
-#define SD_CMD16 16
-#define SD_CMD17 17 
-#define SD_CMD18 18
-#define SD_CMD24 24
-#define SD_CMD25 25
-#define SD_CMD27 27
-#define SD_CMD28 28
-#define SD_CMD29 29
-#define SD_CMD30 30
-#define SD_CMD32 32
-#define SD_CMD33 33
-#define SD_CMD38 38
-#define SD_CMD55 55
-#define SD_CMD58 58
-#define SD_CMD59 59
-#define SD_ACMD41 41
-#define SD_IDLE 0xFF
-#define SD_CRC 0x95
-
-#define SD_R1 1
-#define SD_R1B 2
-#define SD_R2 3
-#define SD_R3 4
-
-#define SD_CMD0_R SD_R1
-#define SD_CMD16_R SD_R1
-#define SD_CMD17_R SD_R1
-#define SD_CMD55_R SD_R1
-#define SD_ACMD41_R SD_R1
-#define SD_CMD58_R SD_R3
-
-#define SD_BLOCKLEN 512
-#define SD_BLOCKLEN_NBITS 9
-
-#define SD_MSK_IDLE 0x01
-#define SD_MSK_OCR_33 0xC0
-#define SD_MSK_TOK_DATAERROR 0xE0
-
-
-int sd_init(void);
-
-static inline void
-sd_assert_cs(void)
-{
-  // Wait for idle before doing anything
-  while(sdspi_regs->status != SD_READY)
-    ;
-  sdspi_regs->status = 1;
-}
-
-static inline void
-sd_deassert_cs(void)
-{
-  // Wait for idle before doing anything
-  while(sdspi_regs->status != SD_READY)
-    ;
-  sdspi_regs->status = 0;
-}
-
-static inline char
-sd_rcv_byte(void)
-{
-  // Wait for idle before doing anything
-  while(sdspi_regs->status != SD_READY)
-    ;
-  sdspi_regs->send_dat = SD_IDLE;
-  while(sdspi_regs->status != SD_READY)
-    ;
-  return sdspi_regs-> receive_dat;
-}
-
-static inline void
-sd_send_byte(char dat)
-{
-  // Wait for idle before doing anything
-  while(sdspi_regs->status != SD_READY)
-    ;      // Wait for status = 1 (ready)
-  sdspi_regs->send_dat = dat;
-}
-
-
-int sd_send_command(unsigned char cmd,unsigned char response_type,
-		    unsigned char *response,unsigned char *argument);
-
-int sd_read_block (unsigned int blockaddr, unsigned char *buf);
-int sd_write_block(unsigned int blockaddr, const unsigned char *buf);
-
-#endif /* INCLUDED_SD_H */
diff --git a/host/lib/usrp/usrp2/usrp2_regs.cpp b/host/lib/usrp/usrp2/usrp2_regs.cpp
new file mode 100644
index 000000000..071ba0cd2
--- /dev/null
+++ b/host/lib/usrp/usrp2/usrp2_regs.cpp
@@ -0,0 +1,94 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "usrp2_regs.hpp"
+
+int sr_addr(int misc_output_base, int sr) {
+	return misc_output_base + 4 * sr;
+}
+
+usrp2_regs_t usrp2_get_regs(int hw_rev) {
+
+  //how about you just make this dependent on hw_rev instead of doing the init before main, and give up the const globals, since the application won't ever need both.
+  const int misc_output_base = (hw_rev>=USRP2P_FIRST_HW_REV) ? USRP2P_MISC_OUTPUT_BASE : USRP2_MISC_OUTPUT_BASE,
+            gpio_base        = (hw_rev>=USRP2P_FIRST_HW_REV) ? USRP2P_GPIO_BASE        : USRP2_GPIO_BASE,
+            atr_base         = (hw_rev>=USRP2P_FIRST_HW_REV) ? USRP2P_ATR_BASE         : USRP2_ATR_BASE,
+            bp_base          = (hw_rev>=USRP2P_FIRST_HW_REV) ? USRP2P_BP_STATUS_BASE   : USRP2_BP_STATUS_BASE;
+
+  usrp2_regs_t x;
+  x.sr_misc = 0;
+  x.sr_tx_prot_eng = 32;
+	x.sr_rx_prot_eng = 48;
+  x.sr_buffer_pool_ctrl = 64;
+  x.sr_udp_sm = 96;
+  x.sr_tx_dsp = 208;
+  x.sr_tx_ctrl = 224;
+  x.sr_rx_dsp = 160;
+  x.sr_rx_ctrl = 176;
+  x.sr_time64 = 192;
+  x.sr_simtimer = 198;
+  x.sr_last = 255;
+  x.misc_ctrl_clock = sr_addr(misc_output_base, 0);
+  x.misc_ctrl_serdes = sr_addr(misc_output_base, 1);
+  x.misc_ctrl_adc = sr_addr(misc_output_base, 2);
+  x.misc_ctrl_leds = sr_addr(misc_output_base, 3);
+  x.misc_ctrl_phy = sr_addr(misc_output_base, 4);
+  x.misc_ctrl_dbg_mux = sr_addr(misc_output_base, 5);
+  x.misc_ctrl_ram_page = sr_addr(misc_output_base, 6);
+  x.misc_ctrl_flush_icache = sr_addr(misc_output_base, 7);
+  x.misc_ctrl_led_src = sr_addr(misc_output_base, 8);
+  x.time64_secs = sr_addr(misc_output_base, x.sr_time64 + 0);
+  x.time64_ticks = sr_addr(misc_output_base, x.sr_time64 + 1);
+  x.time64_flags = sr_addr(misc_output_base, x.sr_time64 + 2);
+  x.time64_imm = sr_addr(misc_output_base, x.sr_time64 + 3);
+  x.time64_tps = sr_addr(misc_output_base, x.sr_time64 + 4);
+  x.time64_secs_rb = bp_base + 4*10;
+  x.time64_ticks_rb = bp_base + 4*11;
+  x.dsp_tx_freq = sr_addr(misc_output_base, x.sr_tx_dsp + 0);
+  x.dsp_tx_scale_iq = sr_addr(misc_output_base, x.sr_tx_dsp + 1);
+  x.dsp_tx_interp_rate = sr_addr(misc_output_base, x.sr_tx_dsp + 2);
+  x.dsp_tx_mux = sr_addr(misc_output_base, x.sr_tx_dsp + 4);
+  x.dsp_rx_freq = sr_addr(misc_output_base, x.sr_rx_dsp + 0);
+  x.dsp_rx_scale_iq = sr_addr(misc_output_base, x.sr_rx_dsp + 1);
+  x.dsp_rx_decim_rate = sr_addr(misc_output_base, x.sr_rx_dsp + 2);
+  x.dsp_rx_dcoffset_i = sr_addr(misc_output_base, x.sr_rx_dsp + 3);
+  x.dsp_rx_dcoffset_q = sr_addr(misc_output_base, x.sr_rx_dsp + 4);
+  x.dsp_rx_mux = sr_addr(misc_output_base, x.sr_rx_dsp + 5);
+  x.gpio_io = gpio_base + 0;
+  x.gpio_ddr = gpio_base + 4;
+  x.gpio_tx_sel = gpio_base + 8;
+  x.gpio_rx_sel = gpio_base + 12;
+  x.atr_idle_txside = atr_base + 0;
+  x.atr_idle_rxside = atr_base + 2;
+  x.atr_intx_txside = atr_base + 4;
+  x.atr_intx_rxside = atr_base + 6;
+  x.atr_inrx_txside = atr_base + 8;
+  x.atr_inrx_rxside = atr_base + 10;
+  x.atr_full_txside = atr_base + 12;
+  x.atr_full_rxside = atr_base + 14;
+  x.rx_ctrl_stream_cmd = sr_addr(misc_output_base, x.sr_rx_ctrl + 0);
+  x.rx_ctrl_time_secs = sr_addr(misc_output_base, x.sr_rx_ctrl + 1);
+  x.rx_ctrl_time_ticks = sr_addr(misc_output_base, x.sr_rx_ctrl + 2);
+  x.rx_ctrl_clear_overrun = sr_addr(misc_output_base, x.sr_rx_ctrl + 3);
+  x.rx_ctrl_vrt_header = sr_addr(misc_output_base, x.sr_rx_ctrl + 4);
+  x.rx_ctrl_vrt_stream_id = sr_addr(misc_output_base, x.sr_rx_ctrl + 5);
+  x.rx_ctrl_vrt_trailer = sr_addr(misc_output_base, x.sr_rx_ctrl + 6);
+  x.rx_ctrl_nsamps_per_pkt = sr_addr(misc_output_base, x.sr_rx_ctrl + 7);
+  x.rx_ctrl_nchannels = sr_addr(misc_output_base, x.sr_rx_ctrl + 8);
+
+  return x;
+}
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 1a5864c85..0ebce6a85 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -18,6 +18,88 @@
 #ifndef INCLUDED_USRP2_REGS_HPP
 #define INCLUDED_USRP2_REGS_HPP
 
+//these are used to set the 
+
+#define USRP2_MISC_OUTPUT_BASE  0xD400
+#define USRP2_GPIO_BASE         0xC800
+#define USRP2_ATR_BASE          0xE400
+#define USRP2_BP_STATUS_BASE    0xCC00
+
+#define USRP2P_MISC_OUTPUT_BASE 0x2000
+#define USRP2P_GPIO_BASE        0x3200
+#define USRP2P_ATR_BASE         0x3800
+#define USRP2P_BP_STATUS_BASE   0x3300
+
+#define USRP2P_FIRST_HW_REV     0x0A00
+
+typedef struct {
+	int sr_misc;
+	int sr_tx_prot_eng;
+	int sr_rx_prot_eng;
+	int sr_buffer_pool_ctrl;
+	int sr_udp_sm;
+	int sr_tx_dsp;
+	int sr_tx_ctrl;
+	int sr_rx_dsp;
+	int sr_rx_ctrl;
+	int sr_time64;
+	int sr_simtimer;
+	int sr_last;
+	int misc_ctrl_clock;
+	int misc_ctrl_serdes;
+	int misc_ctrl_adc;
+	int misc_ctrl_leds;
+	int misc_ctrl_phy;
+	int misc_ctrl_dbg_mux;
+	int misc_ctrl_ram_page;
+	int misc_ctrl_flush_icache;
+	int misc_ctrl_led_src;
+	int time64_secs; // value to set absolute secs to on next PPS
+	int time64_ticks; // value to set absolute ticks to on next PPS
+	int time64_flags; // flags -- see chart below
+	int time64_imm; // set immediate (0=latch on next pps, 1=latch immediate, default=0)
+	int time64_tps; // ticks per second rollover count
+	int time64_secs_rb;
+	int time64_ticks_rb;
+	int dsp_tx_freq;
+	int dsp_tx_scale_iq;
+	int dsp_tx_interp_rate;
+  int dsp_tx_mux;
+	int dsp_rx_freq;
+	int dsp_rx_scale_iq;
+	int dsp_rx_decim_rate;
+	int dsp_rx_dcoffset_i;
+	int dsp_rx_dcoffset_q;
+	int dsp_rx_mux;
+	int gpio_base;
+	int gpio_io;
+	int gpio_ddr;
+	int gpio_tx_sel;
+	int gpio_rx_sel;
+	int atr_base;
+	int atr_idle_txside;
+	int atr_idle_rxside;
+	int atr_intx_txside;
+	int atr_intx_rxside;
+	int atr_inrx_txside;
+	int atr_inrx_rxside;
+	int atr_full_txside;
+	int atr_full_rxside;
+	int rx_ctrl_stream_cmd;
+	int rx_ctrl_time_secs;
+	int rx_ctrl_time_ticks;
+	int rx_ctrl_clear_overrun;
+	int rx_ctrl_vrt_header;
+	int rx_ctrl_vrt_stream_id;
+  int rx_ctrl_vrt_trailer;
+	int rx_ctrl_nsamps_per_pkt;
+	int rx_ctrl_nchannels;
+} usrp2_regs_t;
+
+extern const usrp2_regs_t usrp2_regs; //the register definitions, set in usrp2_regs.cpp and usrp2p_regs.cpp
+
+usrp2_regs_t usrp2_get_regs(int hw_rev);
+
 ////////////////////////////////////////////////////
 // Settings Bus, Slave #7, Not Byte Addressable!
 //
@@ -25,27 +107,12 @@
 // 1KB of address space (== 256 32-bit write-only regs)
 
 
-#define MISC_OUTPUT_BASE        0xD400
+//#define MISC_OUTPUT_BASE        0xD400
 //#define TX_PROTOCOL_ENGINE_BASE 0xD480
 //#define RX_PROTOCOL_ENGINE_BASE 0xD4C0
 //#define BUFFER_POOL_CTRL_BASE   0xD500
 //#define LAST_SETTING_REG        0xD7FC  // last valid setting register
 
-#define SR_MISC 0
-#define SR_TX_PROT_ENG 32
-#define SR_RX_PROT_ENG 48
-#define SR_BUFFER_POOL_CTRL 64
-#define SR_UDP_SM 96
-#define SR_TX_DSP 208
-#define SR_TX_CTRL 224
-#define SR_RX_DSP 160
-#define SR_RX_CTRL 176
-#define SR_TIME64 192
-#define SR_SIMTIMER 198
-#define SR_LAST 255
-
-#define _SR_ADDR(sr)    ((MISC_OUTPUT_BASE) + (4*(sr)))
-
 /////////////////////////////////////////////////
 // SPI Slave Constants
 ////////////////////////////////////////////////
@@ -58,20 +125,11 @@
 #define SPI_SS_TX_DAC   32
 #define SPI_SS_TX_ADC   64
 #define SPI_SS_TX_DB   128
+#define SPI_SS_ADS62P44 256 //for usrp2p
 
 /////////////////////////////////////////////////
 // Misc Control
 ////////////////////////////////////////////////
-#define U2_REG_MISC_CTRL_CLOCK           _SR_ADDR(0)
-#define U2_REG_MISC_CTRL_SERDES          _SR_ADDR(1)
-#define U2_REG_MISC_CTRL_ADC             _SR_ADDR(2)
-#define U2_REG_MISC_CTRL_LEDS            _SR_ADDR(3)
-#define U2_REG_MISC_CTRL_PHY             _SR_ADDR(4) // LSB is reset line to eth phy
-#define U2_REG_MISC_CTRL_DBG_MUX         _SR_ADDR(5)
-#define U2_REG_MISC_CTRL_RAM_PAGE        _SR_ADDR(6) // FIXME should go somewhere else...
-#define U2_REG_MISC_CTRL_FLUSH_ICACHE    _SR_ADDR(7) // Flush the icache
-#define U2_REG_MISC_CTRL_LED_SRC         _SR_ADDR(8) // HW or SW control for LEDs
-
 #define U2_FLAG_MISC_CTRL_SERDES_ENABLE 8
 #define U2_FLAG_MISC_CTRL_SERDES_PRBSEN 4
 #define U2_FLAG_MISC_CTRL_SERDES_LOOPEN 2
@@ -99,14 +157,6 @@
    *
    * </pre>
    */
-#define U2_REG_TIME64_SECS  _SR_ADDR(SR_TIME64 + 0)  // value to set absolute secs to on next PPS
-#define U2_REG_TIME64_TICKS _SR_ADDR(SR_TIME64 + 1)  // value to set absolute ticks to on next PPS
-#define U2_REG_TIME64_FLAGS _SR_ADDR(SR_TIME64 + 2)  // flags - see chart above
-#define U2_REG_TIME64_IMM   _SR_ADDR(SR_TIME64 + 3)  // set immediate (0=latch on next pps, 1=latch immediate, default=0)
-#define U2_REG_TIME64_TPS   _SR_ADDR(SR_TIME64 + 4)  // the ticks per second rollover count
-
-#define U2_REG_TIME64_SECS_RB  (0xCC00 + 4*10)
-#define U2_REG_TIME64_TICKS_RB (0xCC00 + 4*11)
 
 //pps flags (see above)
 #define U2_FLAG_TIME64_PPS_NEGEDGE (0 << 0)
@@ -120,9 +170,6 @@
 /////////////////////////////////////////////////
 // DSP TX Regs
 ////////////////////////////////////////////////
-#define U2_REG_DSP_TX_FREQ         _SR_ADDR(SR_TX_DSP + 0)
-#define U2_REG_DSP_TX_SCALE_IQ     _SR_ADDR(SR_TX_DSP + 1) // {scale_i,scale_q}
-#define U2_REG_DSP_TX_INTERP_RATE  _SR_ADDR(SR_TX_DSP + 2)
 
   /*!
    * \brief output mux configuration.
@@ -158,17 +205,11 @@
    * The default value is 0x10
    * </pre>
    */
-#define U2_REG_DSP_TX_MUX  _SR_ADDR(SR_TX_DSP + 4)
 
 /////////////////////////////////////////////////
 // DSP RX Regs
 ////////////////////////////////////////////////
-#define U2_REG_DSP_RX_FREQ         _SR_ADDR(SR_RX_DSP + 0)
-#define U2_REG_DSP_RX_SCALE_IQ     _SR_ADDR(SR_RX_DSP + 1) // {scale_i,scale_q}
-#define U2_REG_DSP_RX_DECIM_RATE   _SR_ADDR(SR_RX_DSP + 2)
-#define U2_REG_DSP_RX_DCOFFSET_I   _SR_ADDR(SR_RX_DSP + 3) // Bit 31 high sets fixed offset mode, using lower 14 bits,
-                                                       // otherwise it is automatic 
-#define U2_REG_DSP_RX_DCOFFSET_Q   _SR_ADDR(SR_RX_DSP + 4) // Bit 31 high sets fixed offset mode, using lower 14 bits
+
   /*!
    * \brief input mux configuration.
    *
@@ -190,20 +231,10 @@
    * The default value is 0x4
    * </pre>
    */
-#define U2_REG_DSP_RX_MUX  _SR_ADDR(SR_RX_DSP + 5)         // called adc_mux in dsp_core_rx.v
 
 ////////////////////////////////////////////////
 // GPIO, Slave 4
 ////////////////////////////////////////////////
-//
-// These go to the daughterboard i/o pins
-//
-#define U2_REG_GPIO_BASE 0xC800
-
-#define U2_REG_GPIO_IO         U2_REG_GPIO_BASE + 0  // 32 bits, gpio io pins (tx high 16 bits, rx low 16 bits)
-#define U2_REG_GPIO_DDR        U2_REG_GPIO_BASE + 4  // 32 bits, gpio ddr, 1 means output (tx high 16 bits, rx low 16 bits)
-#define U2_REG_GPIO_TX_SEL     U2_REG_GPIO_BASE + 8  // 16 2-bit fields select which source goes to TX DB
-#define U2_REG_GPIO_RX_SEL     U2_REG_GPIO_BASE + 12 // 16 2-bit fields select which source goes to RX DB
 
 // each 2-bit sel field is layed out this way
 #define U2_FLAG_GPIO_SEL_GPIO      0 // if pin is an output, set by GPIO register
@@ -214,31 +245,11 @@
 ///////////////////////////////////////////////////
 // ATR Controller, Slave 11
 ////////////////////////////////////////////////
-#define U2_REG_ATR_BASE  0xE400
 
-#define U2_REG_ATR_IDLE_TXSIDE  U2_REG_ATR_BASE + 0
-#define U2_REG_ATR_IDLE_RXSIDE  U2_REG_ATR_BASE + 2
-#define U2_REG_ATR_INTX_TXSIDE  U2_REG_ATR_BASE + 4
-#define U2_REG_ATR_INTX_RXSIDE  U2_REG_ATR_BASE + 6
-#define U2_REG_ATR_INRX_TXSIDE  U2_REG_ATR_BASE + 8
-#define U2_REG_ATR_INRX_RXSIDE  U2_REG_ATR_BASE + 10
-#define U2_REG_ATR_FULL_TXSIDE  U2_REG_ATR_BASE + 12
-#define U2_REG_ATR_FULL_RXSIDE  U2_REG_ATR_BASE + 14
 
 ///////////////////////////////////////////////////
 // VITA RX CTRL regs
 ///////////////////////////////////////////////////
-// The following 3 are logically a single command register.
-// They are clocked into the underlying fifo when time_ticks is written.
-#define U2_REG_RX_CTRL_STREAM_CMD        _SR_ADDR(SR_RX_CTRL + 0) // {now, chain, num_samples(30)
-#define U2_REG_RX_CTRL_TIME_SECS         _SR_ADDR(SR_RX_CTRL + 1)
-#define U2_REG_RX_CTRL_TIME_TICKS        _SR_ADDR(SR_RX_CTRL + 2)
-
-#define U2_REG_RX_CTRL_CLEAR_OVERRUN     _SR_ADDR(SR_RX_CTRL + 3) // write anything to clear overrun
-#define U2_REG_RX_CTRL_VRT_HEADER        _SR_ADDR(SR_RX_CTRL + 4) // word 0 of packet.  FPGA fills in packet counter
-#define U2_REG_RX_CTRL_VRT_STREAM_ID     _SR_ADDR(SR_RX_CTRL + 5) // word 1 of packet.
-#define U2_REG_RX_CTRL_VRT_TRAILER       _SR_ADDR(SR_RX_CTRL + 6)
-#define U2_REG_RX_CTRL_NSAMPS_PER_PKT    _SR_ADDR(SR_RX_CTRL + 7)
-#define U2_REG_RX_CTRL_NCHANNELS         _SR_ADDR(SR_RX_CTRL + 8) // 1 in basic case, up to 4 for vector sources
+
 
 #endif /* INCLUDED_USRP2_REGS_HPP */