diff options
author | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
commit | 05d77f772317de5d925301aa11bb9a880656dd05 (patch) | |
tree | 0910bfb9265fab1644a3d3a1706719f1b038d193 | |
parent | 16818dc98e97b69a028c47e66ebfb16e32565533 (diff) | |
download | uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.gz uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.bz2 uhd-05d77f772317de5d925301aa11bb9a880656dd05.zip |
moved usrp1 and usrp2 fpga dirs into fpga subdirectory
-rw-r--r-- | fpga/usrp1/Makefile.am (renamed from usrp1/Makefile.am) | 0 | ||||
-rw-r--r-- | fpga/usrp1/Makefile.extra (renamed from usrp1/Makefile.extra) | 0 | ||||
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-rwxr-xr-x | fpga/usrp1/inband_lib/chan_fifo_reader.v (renamed from usrp1/inband_lib/chan_fifo_reader.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/inband_lib/channel_demux.v (renamed from usrp1/inband_lib/channel_demux.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/channel_ram.v (renamed from usrp1/inband_lib/channel_ram.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/cmd_reader.v (renamed from usrp1/inband_lib/cmd_reader.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/packet_builder.v (renamed from usrp1/inband_lib/packet_builder.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/register_io.v (renamed from usrp1/inband_lib/register_io.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/rx_buffer_inband.v (renamed from usrp1/inband_lib/rx_buffer_inband.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/tx_buffer_inband.v (renamed from usrp1/inband_lib/tx_buffer_inband.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/inband_lib/tx_packer.v (renamed from usrp1/inband_lib/tx_packer.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/inband_lib/usb_packet_fifo.v (renamed from usrp1/inband_lib/usb_packet_fifo.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/.gitignore (renamed from usrp1/megacells/.gitignore) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32.bsf (renamed from usrp1/megacells/accum32.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32.cmp (renamed from usrp1/megacells/accum32.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32.inc (renamed from usrp1/megacells/accum32.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32.v (renamed from usrp1/megacells/accum32.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32_bb.v (renamed from usrp1/megacells/accum32_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/accum32_inst.v (renamed from usrp1/megacells/accum32_inst.v) | 0 | ||||
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-rwxr-xr-x | fpga/usrp1/megacells/add32_inst.v (renamed from usrp1/megacells/add32_inst.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/addsub16.bsf (renamed from usrp1/megacells/addsub16.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/addsub16.cmp (renamed from usrp1/megacells/addsub16.cmp) | 0 | ||||
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-rwxr-xr-x | fpga/usrp1/megacells/addsub16_bb.v (renamed from usrp1/megacells/addsub16_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/addsub16_inst.v (renamed from usrp1/megacells/addsub16_inst.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri.bsf (renamed from usrp1/megacells/bustri.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri.cmp (renamed from usrp1/megacells/bustri.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri.inc (renamed from usrp1/megacells/bustri.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri.v (renamed from usrp1/megacells/bustri.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri_bb.v (renamed from usrp1/megacells/bustri_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/bustri_inst.v (renamed from usrp1/megacells/bustri_inst.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/clk_doubler.v (renamed from usrp1/megacells/clk_doubler.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/clk_doubler_bb.v (renamed from usrp1/megacells/clk_doubler_bb.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/dspclkpll.v (renamed from usrp1/megacells/dspclkpll.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/dspclkpll_bb.v (renamed from usrp1/megacells/dspclkpll_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16.bsf (renamed from usrp1/megacells/fifo_1kx16.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16.cmp (renamed from usrp1/megacells/fifo_1kx16.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16.inc (renamed from usrp1/megacells/fifo_1kx16.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16.v (renamed from usrp1/megacells/fifo_1kx16.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16_bb.v (renamed from usrp1/megacells/fifo_1kx16_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16_inst.v (renamed from usrp1/megacells/fifo_1kx16_inst.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/fifo_2k.v (renamed from usrp1/megacells/fifo_2k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/fifo_2k_bb.v (renamed from usrp1/megacells/fifo_2k_bb.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/fifo_4k.v (renamed from usrp1/megacells/fifo_4k.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4k_18.v (renamed from usrp1/megacells/fifo_4k_18.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/fifo_4k_bb.v (renamed from usrp1/megacells/fifo_4k_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc.bsf (renamed from usrp1/megacells/fifo_4kx16_dc.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc.cmp (renamed from usrp1/megacells/fifo_4kx16_dc.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc.inc (renamed from usrp1/megacells/fifo_4kx16_dc.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc.v (renamed from usrp1/megacells/fifo_4kx16_dc.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc_bb.v (renamed from usrp1/megacells/fifo_4kx16_dc_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/fifo_4kx16_dc_inst.v (renamed from usrp1/megacells/fifo_4kx16_dc_inst.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub.bsf (renamed from usrp1/megacells/mylpm_addsub.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub.cmp (renamed from usrp1/megacells/mylpm_addsub.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub.inc (renamed from usrp1/megacells/mylpm_addsub.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub.v (renamed from usrp1/megacells/mylpm_addsub.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub_bb.v (renamed from usrp1/megacells/mylpm_addsub_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/mylpm_addsub_inst.v (renamed from usrp1/megacells/mylpm_addsub_inst.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/pll.v (renamed from usrp1/megacells/pll.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/pll_bb.v (renamed from usrp1/megacells/pll_bb.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/megacells/pll_inst.v (renamed from usrp1/megacells/pll_inst.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32.bsf (renamed from usrp1/megacells/sub32.bsf) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32.cmp (renamed from usrp1/megacells/sub32.cmp) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32.inc (renamed from usrp1/megacells/sub32.inc) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32.v (renamed from usrp1/megacells/sub32.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32_bb.v (renamed from usrp1/megacells/sub32_bb.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/megacells/sub32_inst.v (renamed from usrp1/megacells/sub32_inst.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/bustri.v (renamed from usrp1/models/bustri.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo.v (renamed from usrp1/models/fifo.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_1c_1k.v (renamed from usrp1/models/fifo_1c_1k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_1c_2k.v (renamed from usrp1/models/fifo_1c_2k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_1c_4k.v (renamed from usrp1/models/fifo_1c_4k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_1k.v (renamed from usrp1/models/fifo_1k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_2k.v (renamed from usrp1/models/fifo_2k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_4k.v (renamed from usrp1/models/fifo_4k.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/fifo_4k_18.v (renamed from usrp1/models/fifo_4k_18.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/pll.v (renamed from usrp1/models/pll.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/models/ssram.v (renamed from usrp1/models/ssram.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/rbf/.gitignore (renamed from usrp1/rbf/.gitignore) | 0 | ||||
-rw-r--r-- | fpga/usrp1/rbf/Makefile.am (renamed from usrp1/rbf/Makefile.am) | 0 | ||||
-rw-r--r-- | fpga/usrp1/rbf/rev2/.gitignore (renamed from usrp1/rbf/rev2/.gitignore) | 0 | ||||
-rw-r--r-- | fpga/usrp1/rbf/rev2/Makefile.am (renamed from usrp1/rbf/rev2/Makefile.am) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/inband_1rxhb_1tx.rbf (renamed from usrp1/rbf/rev2/inband_1rxhb_1tx.rbf) | bin | 161180 -> 161180 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/inband_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev2/inband_2rxhb_2tx.rbf) | bin | 191849 -> 191849 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/multi_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev2/multi_2rxhb_2tx.rbf) | bin | 180809 -> 180809 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/multi_4rx_0tx.rbf (renamed from usrp1/rbf/rev2/multi_4rx_0tx.rbf) | bin | 180537 -> 180537 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/std_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev2/std_2rxhb_2tx.rbf) | bin | 181588 -> 181588 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev2/std_4rx_0tx.rbf (renamed from usrp1/rbf/rev2/std_4rx_0tx.rbf) | bin | 183046 -> 183046 bytes | |||
-rw-r--r-- | fpga/usrp1/rbf/rev4/.gitignore (renamed from usrp1/rbf/rev4/.gitignore) | 0 | ||||
-rw-r--r-- | fpga/usrp1/rbf/rev4/Makefile.am (renamed from usrp1/rbf/rev4/Makefile.am) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/inband_1rxhb_1tx.rbf (renamed from usrp1/rbf/rev4/inband_1rxhb_1tx.rbf) | bin | 161180 -> 161180 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/inband_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev4/inband_2rxhb_2tx.rbf) | bin | 191849 -> 191849 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/multi_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev4/multi_2rxhb_2tx.rbf) | bin | 180809 -> 180809 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/multi_4rx_0tx.rbf (renamed from usrp1/rbf/rev4/multi_4rx_0tx.rbf) | bin | 180537 -> 180537 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/std_2rxhb_2tx.rbf (renamed from usrp1/rbf/rev4/std_2rxhb_2tx.rbf) | bin | 181588 -> 181588 bytes | |||
-rwxr-xr-x | fpga/usrp1/rbf/rev4/std_4rx_0tx.rbf (renamed from usrp1/rbf/rev4/std_4rx_0tx.rbf) | bin | 183046 -> 183046 bytes | |||
-rw-r--r-- | fpga/usrp1/sdr_lib/.gitignore (renamed from usrp1/sdr_lib/.gitignore) | 0 | ||||
-rw-r--r-- | fpga/usrp1/sdr_lib/adc_interface.v (renamed from usrp1/sdr_lib/adc_interface.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/sdr_lib/atr_delay.v (renamed from usrp1/sdr_lib/atr_delay.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/sdr_lib/bidir_reg.v (renamed from usrp1/sdr_lib/bidir_reg.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/sdr_lib/cic_dec_shifter.v (renamed from usrp1/sdr_lib/cic_dec_shifter.v) | 0 | ||||
-rwxr-xr-x | fpga/usrp1/sdr_lib/cic_decim.v (renamed from usrp1/sdr_lib/cic_decim.v) | 0 | ||||
-rw-r--r-- | fpga/usrp1/sdr_lib/cic_int_shifter.v (renamed from usrp1/sdr_lib/cic_int_shifter.v) | 0 | ||||
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b/fpga/usrp2/control_lib/newfifo/fifo36_to_fifo18.v index b636ab9ca..b636ab9ca 100644 --- a/usrp2/control_lib/newfifo/fifo36_to_fifo18.v +++ b/fpga/usrp2/control_lib/newfifo/fifo36_to_fifo18.v diff --git a/usrp2/control_lib/newfifo/fifo36_to_fifo19.v b/fpga/usrp2/control_lib/newfifo/fifo36_to_fifo19.v index de249aaeb..de249aaeb 100644 --- a/usrp2/control_lib/newfifo/fifo36_to_fifo19.v +++ b/fpga/usrp2/control_lib/newfifo/fifo36_to_fifo19.v diff --git a/usrp2/control_lib/newfifo/fifo36_to_ll8.v b/fpga/usrp2/control_lib/newfifo/fifo36_to_ll8.v index 0dee1dfc6..0dee1dfc6 100644 --- a/usrp2/control_lib/newfifo/fifo36_to_ll8.v +++ b/fpga/usrp2/control_lib/newfifo/fifo36_to_ll8.v diff --git a/usrp2/control_lib/newfifo/fifo_2clock.v b/fpga/usrp2/control_lib/newfifo/fifo_2clock.v index 34c85ccb4..34c85ccb4 100644 --- a/usrp2/control_lib/newfifo/fifo_2clock.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_2clock.v diff --git a/usrp2/control_lib/newfifo/fifo_2clock_cascade.v b/fpga/usrp2/control_lib/newfifo/fifo_2clock_cascade.v index 5ce726977..5ce726977 100644 --- a/usrp2/control_lib/newfifo/fifo_2clock_cascade.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_2clock_cascade.v diff --git a/usrp2/control_lib/newfifo/fifo_cascade.v b/fpga/usrp2/control_lib/newfifo/fifo_cascade.v index fdd8449bc..fdd8449bc 100644 --- a/usrp2/control_lib/newfifo/fifo_cascade.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_cascade.v diff --git a/usrp2/control_lib/newfifo/fifo_long.v b/fpga/usrp2/control_lib/newfifo/fifo_long.v index 0426779f6..0426779f6 100644 --- a/usrp2/control_lib/newfifo/fifo_long.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_long.v diff --git a/usrp2/control_lib/newfifo/fifo_new_tb.vcd b/fpga/usrp2/control_lib/newfifo/fifo_new_tb.vcd index 796889e7d..796889e7d 100644 --- a/usrp2/control_lib/newfifo/fifo_new_tb.vcd +++ b/fpga/usrp2/control_lib/newfifo/fifo_new_tb.vcd diff --git a/usrp2/control_lib/newfifo/fifo_short.v b/fpga/usrp2/control_lib/newfifo/fifo_short.v index 53a7603c7..53a7603c7 100644 --- a/usrp2/control_lib/newfifo/fifo_short.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_short.v diff --git a/usrp2/control_lib/newfifo/fifo_spec.txt b/fpga/usrp2/control_lib/newfifo/fifo_spec.txt index 133b9fa8e..133b9fa8e 100644 --- a/usrp2/control_lib/newfifo/fifo_spec.txt +++ b/fpga/usrp2/control_lib/newfifo/fifo_spec.txt diff --git a/usrp2/control_lib/newfifo/fifo_tb.v b/fpga/usrp2/control_lib/newfifo/fifo_tb.v index f561df7fa..f561df7fa 100644 --- a/usrp2/control_lib/newfifo/fifo_tb.v +++ b/fpga/usrp2/control_lib/newfifo/fifo_tb.v diff --git a/usrp2/control_lib/newfifo/ll8_shortfifo.v b/fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v index 39ada9a4f..39ada9a4f 100644 --- a/usrp2/control_lib/newfifo/ll8_shortfifo.v +++ b/fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v diff --git a/usrp2/control_lib/newfifo/ll8_to_fifo19.v b/fpga/usrp2/control_lib/newfifo/ll8_to_fifo19.v index af3b91afb..af3b91afb 100644 --- a/usrp2/control_lib/newfifo/ll8_to_fifo19.v +++ b/fpga/usrp2/control_lib/newfifo/ll8_to_fifo19.v diff --git a/usrp2/control_lib/newfifo/ll8_to_fifo36.v b/fpga/usrp2/control_lib/newfifo/ll8_to_fifo36.v index 108daa903..108daa903 100644 --- a/usrp2/control_lib/newfifo/ll8_to_fifo36.v +++ b/fpga/usrp2/control_lib/newfifo/ll8_to_fifo36.v diff --git a/usrp2/control_lib/nsgpio.v b/fpga/usrp2/control_lib/nsgpio.v index 937ea7020..937ea7020 100644 --- a/usrp2/control_lib/nsgpio.v +++ b/fpga/usrp2/control_lib/nsgpio.v diff --git a/usrp2/control_lib/oneshot_2clk.v b/fpga/usrp2/control_lib/oneshot_2clk.v index 72f16a4b3..72f16a4b3 100644 --- a/usrp2/control_lib/oneshot_2clk.v +++ b/fpga/usrp2/control_lib/oneshot_2clk.v diff --git a/usrp2/control_lib/pic.v b/fpga/usrp2/control_lib/pic.v index 9b9944d4a..9b9944d4a 100644 --- a/usrp2/control_lib/pic.v +++ b/fpga/usrp2/control_lib/pic.v diff --git a/usrp2/control_lib/priority_enc.v b/fpga/usrp2/control_lib/priority_enc.v index 916192445..916192445 100644 --- a/usrp2/control_lib/priority_enc.v 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a/usrp2/control_lib/reset_sync.v +++ b/fpga/usrp2/control_lib/reset_sync.v diff --git a/usrp2/control_lib/sd_spi.v b/fpga/usrp2/control_lib/sd_spi.v index 3f4d7f46a..3f4d7f46a 100644 --- a/usrp2/control_lib/sd_spi.v +++ b/fpga/usrp2/control_lib/sd_spi.v diff --git a/usrp2/control_lib/sd_spi_tb.v b/fpga/usrp2/control_lib/sd_spi_tb.v index e30a5bdf6..e30a5bdf6 100644 --- a/usrp2/control_lib/sd_spi_tb.v +++ b/fpga/usrp2/control_lib/sd_spi_tb.v diff --git a/usrp2/control_lib/sd_spi_wb.v b/fpga/usrp2/control_lib/sd_spi_wb.v index 7a6258b56..7a6258b56 100644 --- a/usrp2/control_lib/sd_spi_wb.v +++ b/fpga/usrp2/control_lib/sd_spi_wb.v diff --git a/usrp2/control_lib/setting_reg.v b/fpga/usrp2/control_lib/setting_reg.v index c8aff230f..c8aff230f 100644 --- a/usrp2/control_lib/setting_reg.v +++ b/fpga/usrp2/control_lib/setting_reg.v diff --git a/usrp2/control_lib/settings_bus.v b/fpga/usrp2/control_lib/settings_bus.v index d01a30ab4..d01a30ab4 100644 --- a/usrp2/control_lib/settings_bus.v +++ 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