Pass previously unused GPIOs to debug pins to help debug interrupts

3 files changed, 21 insertions, 16 deletions

diff --git a/usrp2/top/u1e/u1e.ucf b/usrp2/top/u1e/u1e.ucf
index 1c8dfc197..9c42b00ac 100644
--- a/usrp2/top/u1e/u1e.ucf
+++ b/usrp2/top/u1e/u1e.ucf
@@ -47,22 +47,22 @@ NET "EM_NOE"  LOC = "A14"  ;
 #NET "EM_NWP"  LOC = "F13"  ;
 
 ## Overo GPIO
-#NET "overo_gpio0"  LOC = "F9"  ;
-#NET "overo_gpio14"  LOC = "C4"  ;
-#NET "overo_gpio21"  LOC = "D5"  ;
-#NET "overo_gpio22"  LOC = "A3"  ;
-#NET "overo_gpio23"  LOC = "B3"  ;
-#NET "overo_gpio64"  LOC = "A4"  ;
-#NET "overo_gpio65"  LOC = "F8"  ;
-#NET "overo_gpio127"  LOC = "C8"  ;
-#NET "overo_gpio128"  LOC = "G8"  ;
+NET "overo_gpio0"  LOC = "F9"  ;  # MISC GPIO for debug
+NET "overo_gpio14"  LOC = "C4"  ;  # MISC GPIO for debug
+NET "overo_gpio21"  LOC = "D5"  ;  # MISC GPIO for debug
+NET "overo_gpio22"  LOC = "A3"  ;  # MISC GPIO for debug
+NET "overo_gpio23"  LOC = "B3"  ;  # MISC GPIO for debug
+NET "overo_gpio64"  LOC = "A4"  ;  # MISC GPIO for debug
+NET "overo_gpio65"  LOC = "F8"  ;  # MISC GPIO for debug
+NET "overo_gpio127"  LOC = "C8"  ;  # MISC GPIO for debug
+NET "overo_gpio128"  LOC = "G8"  ;  # MISC GPIO for debug
 NET "overo_gpio144"  LOC = "A5"  ;  # tx_have_space
 NET "overo_gpio145"  LOC = "C7"  ;  # tx_underrun
 NET "overo_gpio146"  LOC = "A6"  ;  # rx_have_data
 NET "overo_gpio147"  LOC = "B6"  ;  # rx_overrun
-#NET "overo_gpio163"  LOC = "D7"  ;
-#NET "overo_gpio170"  LOC = "E8"  ;
-#NET "overo_gpio176"  LOC = "B4"  ;
+NET "overo_gpio163"  LOC = "D7"  ;  # MISC GPIO for debug
+NET "overo_gpio170"  LOC = "E8"  ;  # MISC GPIO for debug
+NET "overo_gpio176"  LOC = "B4"  ;  # MISC GPIO for debug
 
 ## Overo UART
 #NET "overo_txd1"  LOC = "C6"  ;
diff --git a/usrp2/top/u1e/u1e.v b/usrp2/top/u1e/u1e.v
index b8f716d26..2ed6b71c8 100644
--- a/usrp2/top/u1e/u1e.v
+++ b/usrp2/top/u1e/u1e.v
@@ -20,6 +20,10 @@ module u1e
    input cgen_st_status, input cgen_st_ld, input cgen_st_refmon, output cgen_sync_b, output cgen_ref_sel,
    
    output overo_gpio144, output overo_gpio145, output overo_gpio146, output overo_gpio147,  // Fifo controls
+   input overo_gpio0, input overo_gpio14, input overo_gpio21, input overo_gpio22,  // Misc GPIO
+   input overo_gpio23, input overo_gpio64, input overo_gpio65, input overo_gpio127, // Misc GPIO
+   input overo_gpio128, input overo_gpio163, input overo_gpio170, input overo_gpio176, // Misc GPIO
+   
    inout [15:0] io_tx, inout [15:0] io_rx,
    input PPS_IN
    );
@@ -52,6 +56,9 @@ module u1e
 		     .tx_have_space(overo_gpio144), .tx_underrun(overo_gpio145),
 		     .rx_have_data(overo_gpio146), .rx_overrun(overo_gpio147),
 		     .io_tx(io_tx), .io_rx(io_rx),
+		     .misc_gpio( {{overo_gpio128,overo_gpio163,overo_gpio170,overo_gpio176},
+				  {overo_gpio0,overo_gpio14,overo_gpio21,overo_gpio22},
+				  {overo_gpio23,overo_gpio64,overo_gpio65,overo_gpio127}}),
 		     .pps_in(PPS_IN) );
    
 endmodule // u1e
diff --git a/usrp2/top/u1e/u1e_core.v b/usrp2/top/u1e/u1e_core.v
index 9e65faeed..e67b1b158 100644
--- a/usrp2/top/u1e/u1e_core.v
+++ b/usrp2/top/u1e/u1e_core.v
@@ -13,9 +13,7 @@ module u1e_core
 
    input cgen_st_status, input cgen_st_ld, input cgen_st_refmon, output cgen_sync_b, output cgen_ref_sel,   
    output tx_have_space, output tx_underrun, output rx_have_data, output rx_overrun,
-   inout [15:0] io_tx, inout [15:0] io_rx,
-
-   input pps_in
+   inout [15:0] io_tx, inout [15:0] io_rx, input [11:0] misc_gpio, input pps_in
    );
    
    wire 	wb_clk = clk_fpga;
@@ -273,6 +271,6 @@ module u1e_core
 		    { EM_D } };
 
    assign debug_gpio_0 = { debug_gpmc };
-   assign debug_gpio_1 = { debug_txd, debug_rxd };
+   assign debug_gpio_1 = { misc_gpio };
    
 endmodule // u1e_core