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| author | Matt Ettus <matt@ettus.com> | 2010-04-13 17:33:16 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-04-13 17:33:16 -0700 |
| commit | 19d476df81cdf7a51b871154510be8f7c575ffde (patch) | |
| tree | 25937abc5e956c8900cfed080390e9eb8bb77e9e | |
| parent | f95bf4d8d94511d26a5bb1f52823f8ffd5f637fe (diff) | |
| download | uhd-19d476df81cdf7a51b871154510be8f7c575ffde.tar.gz uhd-19d476df81cdf7a51b871154510be8f7c575ffde.tar.bz2 uhd-19d476df81cdf7a51b871154510be8f7c575ffde.zip | |
minor changes to get it to synthesize
| -rw-r--r-- | usrp2/gpmc/gpmc_to_fifo.v | 2 | ||||
| -rw-r--r-- | usrp2/top/u1e/Makefile | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/usrp2/gpmc/gpmc_to_fifo.v b/usrp2/gpmc/gpmc_to_fifo.v index 5d499494f..267804469 100644 --- a/usrp2/gpmc/gpmc_to_fifo.v +++ b/usrp2/gpmc/gpmc_to_fifo.v @@ -8,6 +8,7 @@ module gpmc_to_fifo input [15:0] frame_len, input [15:0] fifo_space, output fifo_ready); + reg [10:0] counter; // Synchronize the async control signals reg [1:0] cs_del, we_del; always @(posedge fifo_clk) @@ -43,7 +44,6 @@ module gpmc_to_fifo else src_rdy_o <= 0; // Assume it was taken - reg [10:0] counter; always @(posedge fifo_clk) if(fifo_rst) counter <= 0; diff --git a/usrp2/top/u1e/Makefile b/usrp2/top/u1e/Makefile index a0f921485..1cb56d7a9 100644 --- a/usrp2/top/u1e/Makefile +++ b/usrp2/top/u1e/Makefile @@ -109,6 +109,7 @@ control_lib/newfifo/fifo_short.v \ control_lib/newfifo/fifo_long.v \ control_lib/newfifo/fifo_cascade.v \ control_lib/newfifo/fifo36_to_ll8.v \ +control_lib/newfifo/fifo19_to_fifo36.v \ control_lib/longfifo.v \ control_lib/shortfifo.v \ control_lib/medfifo.v \ @@ -177,6 +178,8 @@ timing/timer.v \ gpmc/gpmc.v \ gpmc/edge_sync.v \ gpmc/dbsm.v \ +gpmc/gpmc_to_fifo.v \ +gpmc/gpmc_wb.v \ top/u1e/u1e_core.v \ top/u1e/u1e.ucf \ top/u1e/u1e.v |