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| author | Josh Blum <josh@joshknows.com> | 2010-01-18 20:02:04 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-01-18 20:02:04 -0800 |
| commit | cb3b628f8d096ab2a843a804189037c495532ac9 (patch) | |
| tree | 9df6b17d8d6cb172f519586f478a4bf6d383179f | |
| parent | 58e218765a67aadb12224bd512f1592ce0736ed6 (diff) | |
| download | uhd-cb3b628f8d096ab2a843a804189037c495532ac9.tar.gz uhd-cb3b628f8d096ab2a843a804189037c495532ac9.tar.bz2 uhd-cb3b628f8d096ab2a843a804189037c495532ac9.zip | |
Added set time and set time at next pps. Removed the old sync pps commands, they dont make sense to use anymore.
Replaced the mimo config with clock config.
The clock config handles the pps and the reference.
Modified the memory map and internal calls to reflect the fpga changes.
| -rw-r--r-- | top/u2_core/u2_core.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/top/u2_core/u2_core.v b/top/u2_core/u2_core.v index e384e2b93..591c10232 100644 --- a/top/u2_core/u2_core.v +++ b/top/u2_core/u2_core.v @@ -630,7 +630,7 @@ module u2_core // /////////////////////////////////////////////////////////////////////////////////// // SERDES -/* + serdes #(.TXFIFOSIZE(9),.RXFIFOSIZE(9)) serdes (.clk(dsp_clk),.rst(dsp_rst), .ser_tx_clk(ser_tx_clk),.ser_t(ser_t),.ser_tklsb(ser_tklsb),.ser_tkmsb(ser_tkmsb), @@ -640,7 +640,7 @@ module u2_core .tx_occupied(ser_tx_occ),.tx_full(ser_tx_full),.tx_empty(ser_tx_empty), .rx_occupied(ser_rx_occ),.rx_full(ser_rx_full),.rx_empty(ser_rx_empty), .serdes_link_up(serdes_link_up),.debug0(debug_serdes0), .debug1(debug_serdes1) ); -*/ + // /////////////////////////////////////////////////////////////////////////////////// // External RAM Interface |