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authorMartin Braun <martin.braun@ettus.com>2018-07-19 07:55:02 -0700
committerMartin Braun <martin.braun@ettus.com>2018-07-19 10:31:40 -0700
commitfc95b292803ebf1a47aafec655dfeb4cb0563abf (patch)
tree4d8707f58b2962639f1ce8b252ef833db5e2dd23
parente56d9188f77e5463c87c0fa923b3d09294930bfc (diff)
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mpm: n3xx: bist: Provide switch for not reloading default FPGA image
-rwxr-xr-xmpm/python/n3xx_bist8
1 files changed, 7 insertions, 1 deletions
diff --git a/mpm/python/n3xx_bist b/mpm/python/n3xx_bist
index 872eb490e..1a00a0005 100755
--- a/mpm/python/n3xx_bist
+++ b/mpm/python/n3xx_bist
@@ -281,6 +281,12 @@ class N3XXBIST(object):
"status when using this mode.",
)
parser.add_argument(
+ '--skip-fpga-reload', action='store_true',
+ help="Skip reloading the default FPGA image post-test. Note: by"
+ "specifying this argument, the FPGA image loaded could be "
+ "anything post-test.",
+ )
+ parser.add_argument(
'tests',
help="List the tests that should be run",
nargs='+', # There has to be at least one
@@ -369,7 +375,7 @@ class N3XXBIST(object):
if self.args.lv_compat:
result = filter_results_for_lv(result)
post_results(result)
- if self.reload_fpga_image:
+ if self.reload_fpga_image and not self.args.skip_fpga_reload:
load_fpga_image(self.DEFAULT_FPGA_TYPE)
return tests_successful