fpga: Change RFNoC YAML version numbers to strings

Change version from a numeric to a string, in order to
differentiate between versions like "1.1" and "1.10".

34 files changed, 68 insertions, 68 deletions

diff --git a/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
index aa464454e..f23dfa152 100644
--- a/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'e310'
 default_target: 'E310_SG3'
diff --git a/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml b/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
index 57234c19b..44fe551ba 100644
--- a/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'e320'
 default_target: 'E320_1G'
diff --git a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
index 446c0ae6b..0e9d97f55 100644
--- a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n300'
 default_target: 'N300_AA'
diff --git a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
index 3b28fcd14..1574204f2 100644
--- a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n300'
 default_target: 'N300_HG'
diff --git a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
index cb4331b15..ea228372e 100644
--- a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bitwidth of the CHDR bus for this block
 device: 'n310'
 default_target: 'N310_AA'
diff --git a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
index abef58afc..4826d28b6 100644
--- a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n310'
 default_target: 'N310_HG'
diff --git a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
index bc9fb18a1..adf27b34e 100644
--- a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bitwidth of the CHDR bus for this block
 device: 'n320'
 default_target: 'N320_AA'
diff --git a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
index ecddcc3d0..ce0e9389a 100644
--- a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n320'
 default_target: 'N320_HG'
diff --git a/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml b/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
index d9570b8ef..b7e0affe3 100644
--- a/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'x300'
 default_target: 'X300_HG'
diff --git a/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml b/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
index 84b5f0234..bfa050803 100644
--- a/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'x310'
 default_target: 'X310_HG'
diff --git a/host/examples/rfnoc-example/blocks/gain.yml b/host/examples/rfnoc-example/blocks/gain.yml
index 58172ae36..fa3127496 100644
--- a/host/examples/rfnoc-example/blocks/gain.yml
+++ b/host/examples/rfnoc-example/blocks/gain.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: gain
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xB16
 
diff --git a/host/include/uhd/rfnoc/blocks/addsub.yml b/host/include/uhd/rfnoc/blocks/addsub.yml
index 455d065a3..e26888a20 100644
--- a/host/include/uhd/rfnoc/blocks/addsub.yml
+++ b/host/include/uhd/rfnoc/blocks/addsub.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: addsub
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xADD00000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_addsub/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/axi_ram_fifo.yml b/host/include/uhd/rfnoc/blocks/axi_ram_fifo.yml
index 52e03852a..481b37e8b 100644
--- a/host/include/uhd/rfnoc/blocks/axi_ram_fifo.yml
+++ b/host/include/uhd/rfnoc/blocks/axi_ram_fifo.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: axi_ram_fifo
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xF1F00000
 
diff --git a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml
index d44f9538d..64623cdd0 100644
--- a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml
+++ b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_2x64.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: axi_ram_fifo
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xF1F00000
 
diff --git a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml
index 961b2ed2d..98bd0128c 100644
--- a/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml
+++ b/host/include/uhd/rfnoc/blocks/axi_ram_fifo_4x64.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: axi_ram_fifo
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xF1F00000
 
diff --git a/host/include/uhd/rfnoc/blocks/ddc.yml b/host/include/uhd/rfnoc/blocks/ddc.yml
index b8f4fc458..7b7b8da27 100644
--- a/host/include/uhd/rfnoc/blocks/ddc.yml
+++ b/host/include/uhd/rfnoc/blocks/ddc.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: ddc
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xDDC00000
 
diff --git a/host/include/uhd/rfnoc/blocks/duc.yml b/host/include/uhd/rfnoc/blocks/duc.yml
index ce4cba8cb..843356257 100644
--- a/host/include/uhd/rfnoc/blocks/duc.yml
+++ b/host/include/uhd/rfnoc/blocks/duc.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: duc
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xD0C00000
 
diff --git a/host/include/uhd/rfnoc/blocks/fft_1x64.yml b/host/include/uhd/rfnoc/blocks/fft_1x64.yml
index e8b05daa3..ea0fe1761 100644
--- a/host/include/uhd/rfnoc/blocks/fft_1x64.yml
+++ b/host/include/uhd/rfnoc/blocks/fft_1x64.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: fft
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xFF700000
 # Provide a custom path to Makefile.srcs for this block relative to the
diff --git a/host/include/uhd/rfnoc/blocks/fir_filter.yml b/host/include/uhd/rfnoc/blocks/fir_filter.yml
index 0af4b144b..bfcc43fa3 100644
--- a/host/include/uhd/rfnoc/blocks/fir_filter.yml
+++ b/host/include/uhd/rfnoc/blocks/fir_filter.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: fir_filter
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xF1120000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_fir_filter/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/fosphor.yml b/host/include/uhd/rfnoc/blocks/fosphor.yml
index caa05a796..2d7e7b1e4 100644
--- a/host/include/uhd/rfnoc/blocks/fosphor.yml
+++ b/host/include/uhd/rfnoc/blocks/fosphor.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: fosphor
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x666F0000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_fosphor/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/keep_one_in_n.yml b/host/include/uhd/rfnoc/blocks/keep_one_in_n.yml
index 1cef0d233..ea2f536b4 100644
--- a/host/include/uhd/rfnoc/blocks/keep_one_in_n.yml
+++ b/host/include/uhd/rfnoc/blocks/keep_one_in_n.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: keep_one_in_n
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x02460000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_keep_one_in_n/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/logpwr.yml b/host/include/uhd/rfnoc/blocks/logpwr.yml
index c1350c627..e03314a40 100644
--- a/host/include/uhd/rfnoc/blocks/logpwr.yml
+++ b/host/include/uhd/rfnoc/blocks/logpwr.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: logpwr
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x4C500000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_logpwr/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/moving_avg.yml b/host/include/uhd/rfnoc/blocks/moving_avg.yml
index 53d0c7ba7..feff4eb77 100644
--- a/host/include/uhd/rfnoc/blocks/moving_avg.yml
+++ b/host/include/uhd/rfnoc/blocks/moving_avg.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: moving_avg
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xAAD20000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_moving_avg/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/null_src_sink.yml b/host/include/uhd/rfnoc/blocks/null_src_sink.yml
index c5d1e3292..ec286838d 100644
--- a/host/include/uhd/rfnoc/blocks/null_src_sink.yml
+++ b/host/include/uhd/rfnoc/blocks/null_src_sink.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: null_src_sink
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x1
 # Provide a custom path to Makefile.srcs for this block relative to the
diff --git a/host/include/uhd/rfnoc/blocks/radio.yml b/host/include/uhd/rfnoc/blocks/radio.yml
index 20ea97291..81b96bf07 100644
--- a/host/include/uhd/rfnoc/blocks/radio.yml
+++ b/host/include/uhd/rfnoc/blocks/radio.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: radio
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x12AD1000
 
diff --git a/host/include/uhd/rfnoc/blocks/radio_1x64.yml b/host/include/uhd/rfnoc/blocks/radio_1x64.yml
index bf8385584..d6dad8049 100644
--- a/host/include/uhd/rfnoc/blocks/radio_1x64.yml
+++ b/host/include/uhd/rfnoc/blocks/radio_1x64.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: radio
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x12AD1000
 
diff --git a/host/include/uhd/rfnoc/blocks/radio_2x64.yml b/host/include/uhd/rfnoc/blocks/radio_2x64.yml
index cedb8fdb5..12d092170 100644
--- a/host/include/uhd/rfnoc/blocks/radio_2x64.yml
+++ b/host/include/uhd/rfnoc/blocks/radio_2x64.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: radio
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x12AD1000
 
diff --git a/host/include/uhd/rfnoc/blocks/replay.yml b/host/include/uhd/rfnoc/blocks/replay.yml
index 65177e8fb..51dc23adb 100644
--- a/host/include/uhd/rfnoc/blocks/replay.yml
+++ b/host/include/uhd/rfnoc/blocks/replay.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: replay
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x4E91A000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_replay/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/siggen.yml b/host/include/uhd/rfnoc/blocks/siggen.yml
index 78a778479..3589d865f 100644
--- a/host/include/uhd/rfnoc/blocks/siggen.yml
+++ b/host/include/uhd/rfnoc/blocks/siggen.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: siggen
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x51663110
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_siggen/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/split_stream.yml b/host/include/uhd/rfnoc/blocks/split_stream.yml
index d81fde580..d207a3a4e 100644
--- a/host/include/uhd/rfnoc/blocks/split_stream.yml
+++ b/host/include/uhd/rfnoc/blocks/split_stream.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: split_stream
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x57570000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_split_stream/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/switchboard.yml b/host/include/uhd/rfnoc/blocks/switchboard.yml
index ad357326d..7a9970ce4 100644
--- a/host/include/uhd/rfnoc/blocks/switchboard.yml
+++ b/host/include/uhd/rfnoc/blocks/switchboard.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: switchboard
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xBE110000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_switchboard/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/vector_iir.yml b/host/include/uhd/rfnoc/blocks/vector_iir.yml
index 019daf6c1..e0a1d980e 100644
--- a/host/include/uhd/rfnoc/blocks/vector_iir.yml
+++ b/host/include/uhd/rfnoc/blocks/vector_iir.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: vector_iir
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0x11120000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_vector_iir/Makefile.srcs"
diff --git a/host/include/uhd/rfnoc/blocks/window.yml b/host/include/uhd/rfnoc/blocks/window.yml
index f696c4da3..2f8a8e8e7 100644
--- a/host/include/uhd/rfnoc/blocks/window.yml
+++ b/host/include/uhd/rfnoc/blocks/window.yml
@@ -1,7 +1,7 @@
 schema: rfnoc_modtool_args
 module_name: window
-version: 1.0
-rfnoc_version: 1.0
+version: "1.0"
+rfnoc_version: "1.0"
 chdr_width: 64
 noc_id: 0xD0530000
 makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_window/Makefile.srcs"
diff --git a/host/python/uhd/imgbuilder/image_builder.py b/host/python/uhd/imgbuilder/image_builder.py
index 84fc79798..626d1bbf7 100755
--- a/host/python/uhd/imgbuilder/image_builder.py
+++ b/host/python/uhd/imgbuilder/image_builder.py
@@ -508,8 +508,8 @@ def convert_to_image_config(grc, grc_config_path):
         "schema": "rfnoc_imagebuilder",
         "copyright": "Ettus Research, A National Instruments Brand",
         "license": "SPDX-License-Identifier: LGPL-3.0-or-later",
-        "version": 1.0,
-        "rfnoc_version": 1.0}
+        "version": "1.0",
+        "rfnoc_version": "1.0"}
     # for param in [item for item in grc["blocks"] if item["id"] == "parameter"]:
     #     result[param["name"]] = {
     #         "str": lambda value: str,