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authorMartin Braun <martin.braun@ettus.com>2015-03-27 13:35:27 -0700
committerMartin Braun <martin.braun@ettus.com>2015-03-27 13:35:27 -0700
commit88ffeb35dadb3d10593be39c9eae2f90c4d7c008 (patch)
tree4dc3fb96097260c3eb46e45ebba39c17efb3af7a
parent5b285598d367b936caf91b615e30e90af8af2a5d (diff)
parent1200721b696751edaceb70a332861f84fb8c16d5 (diff)
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Merge branch 'maint'
-rw-r--r--host/CMakeLists.txt2
-rw-r--r--host/examples/rx_samples_to_file.cpp2
-rw-r--r--host/examples/test_clock_synch.cpp8
-rw-r--r--host/examples/tx_samples_from_file.cpp4
-rw-r--r--host/include/uhd/transport/nirio/nirio_fifo.ipp5
-rw-r--r--host/include/uhd/transport/nirio/nirio_resource_manager.h6
-rw-r--r--host/include/uhd/usrp_clock/multi_usrp_clock.hpp2
-rw-r--r--host/lib/transport/libusb1_zero_copy.cpp2
-rw-r--r--host/lib/transport/nirio/nirio_driver_iface_unsupported.cpp34
-rw-r--r--host/lib/transport/nirio_zero_copy.cpp16
-rw-r--r--host/lib/usrp/b100/clock_ctrl.cpp4
-rw-r--r--host/lib/usrp/b200/b200_iface.cpp2
-rw-r--r--host/lib/usrp/b200/b200_impl.cpp4
-rw-r--r--host/lib/usrp/common/adf435x_common.cpp4
-rw-r--r--host/lib/usrp/common/fifo_ctrl_excelsior.cpp8
-rw-r--r--host/lib/usrp/common/fx2_ctrl.cpp2
-rw-r--r--host/lib/usrp/cores/i2c_core_100_wb32.cpp4
-rw-r--r--host/lib/usrp/cores/radio_ctrl_core_3000.cpp2
-rw-r--r--host/lib/usrp/dboard/db_tvrx2.cpp14
-rw-r--r--host/lib/usrp/dboard/db_ubx.cpp2
-rw-r--r--host/lib/usrp/e300/e300_common.cpp2
-rw-r--r--host/lib/usrp/e300/e300_impl.cpp8
-rw-r--r--host/lib/usrp/e300/e300_sensor_manager.cpp6
-rw-r--r--host/lib/usrp/usrp1/usrp1_iface.cpp8
-rw-r--r--host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp8
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.cpp12
-rw-r--r--host/lib/usrp/x300/x300_impl.cpp4
-rw-r--r--host/lib/usrp_clock/multi_usrp_clock.cpp4
-rw-r--r--host/lib/usrp_clock/octoclock/octoclock_eeprom.cpp4
-rw-r--r--host/lib/usrp_clock/octoclock/octoclock_uart.cpp1
-rw-r--r--host/tests/sph_recv_test.cpp6
-rw-r--r--host/tests/sph_send_test.cpp4
-rw-r--r--host/utils/nirio_programmer.cpp6
-rw-r--r--host/utils/octoclock_firmware_burner.cpp2
-rw-r--r--host/utils/uhd_usrp_probe.cpp6
-rw-r--r--host/utils/usrp_n2xx_simple_net_burner.cpp4
-rw-r--r--host/utils/usrp_x3xx_fpga_burner.cpp2
37 files changed, 110 insertions, 104 deletions
diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt
index 0c168e09b..2666aa1d3 100644
--- a/host/CMakeLists.txt
+++ b/host/CMakeLists.txt
@@ -120,7 +120,7 @@ INCLUDE(CheckCXXCompilerFlag)
MACRO(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG flag have)
CHECK_CXX_COMPILER_FLAG(${flag} ${have})
IF(${have})
- ADD_DEFINITIONS(${flag})
+ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${flag}")
ENDIF(${have})
ENDMACRO(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG)
diff --git a/host/examples/rx_samples_to_file.cpp b/host/examples/rx_samples_to_file.cpp
index f71c4ed47..934dce586 100644
--- a/host/examples/rx_samples_to_file.cpp
+++ b/host/examples/rx_samples_to_file.cpp
@@ -64,7 +64,7 @@ template<typename samp_type> void recv_to_file(
uhd::stream_cmd_t::STREAM_MODE_START_CONTINUOUS:
uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE
);
- stream_cmd.num_samps = num_requested_samples;
+ stream_cmd.num_samps = size_t(num_requested_samples);
stream_cmd.stream_now = true;
stream_cmd.time_spec = uhd::time_spec_t();
rx_stream->issue_stream_cmd(stream_cmd);
diff --git a/host/examples/test_clock_synch.cpp b/host/examples/test_clock_synch.cpp
index 50a1444f8..9d1883665 100644
--- a/host/examples/test_clock_synch.cpp
+++ b/host/examples/test_clock_synch.cpp
@@ -37,7 +37,7 @@ using namespace uhd::usrp;
void wait_for_pps(multi_usrp::sptr usrp, size_t chan, double timeout){
time_t last_pps_time = usrp->get_time_last_pps(chan).get_full_secs();
time_t system_time = uhd::time_spec_t::get_system_time().get_full_secs();
- time_t exit_time = system_time + timeout;
+ time_t exit_time = system_time + time_t(timeout);
bool detected_pps = false;
//Otherwise, this would hang if the USRP doesn't detect any PPS
@@ -54,7 +54,7 @@ void wait_for_pps(multi_usrp::sptr usrp, size_t chan, double timeout){
}
-void get_usrp_time(multi_usrp::sptr usrp, size_t chan, std::vector<boost::uint32_t> *times){
+void get_usrp_time(multi_usrp::sptr usrp, size_t chan, std::vector<time_t> *times){
wait_for_pps(usrp, chan, 2);
(*times)[chan] = usrp->get_time_now(chan).get_full_secs();
}
@@ -130,7 +130,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
//Wait for next PPS to start polling
wait_for_pps(usrp, 0, 2);
- srand(time(NULL));
+ srand((unsigned int)time(NULL));
std::cout << boost::format("\nRunning %d comparisons at random intervals.") % num_tests << std::endl << std::endl;
boost::uint32_t num_matches = 0;
@@ -140,7 +140,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
boost::this_thread::sleep(boost::posix_time::milliseconds(wait_time));
//Get all times before output
- std::vector<boost::uint32_t> usrp_times(usrp->get_num_mboards());
+ std::vector<time_t> usrp_times(usrp->get_num_mboards());
boost::thread_group thread_group;
clock_time = clock->get_time();
for(size_t j = 0; j < usrp->get_num_mboards(); j++){
diff --git a/host/examples/tx_samples_from_file.cpp b/host/examples/tx_samples_from_file.cpp
index e9d0e8721..cc7e963d5 100644
--- a/host/examples/tx_samples_from_file.cpp
+++ b/host/examples/tx_samples_from_file.cpp
@@ -55,7 +55,7 @@ template<typename samp_type> void send_from_file(
while(not md.end_of_burst and not stop_signal_called){
infile.read((char*)&buff.front(), buff.size()*sizeof(samp_type));
- size_t num_tx_samps = infile.gcount()/sizeof(samp_type);
+ size_t num_tx_samps = size_t(infile.gcount()/sizeof(samp_type));
md.end_of_burst = infile.eof();
@@ -104,7 +104,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
return ~0;
}
- bool repeat = vm.count("repeat");
+ bool repeat = vm.count("repeat") > 0;
//create a usrp device
std::cout << std::endl;
diff --git a/host/include/uhd/transport/nirio/nirio_fifo.ipp b/host/include/uhd/transport/nirio/nirio_fifo.ipp
index 49ce43888..72a337ac2 100644
--- a/host/include/uhd/transport/nirio/nirio_fifo.ipp
+++ b/host/include/uhd/transport/nirio/nirio_fifo.ipp
@@ -1,5 +1,5 @@
//
-// Copyright 2013-2014 Ettus Research LLC
+// Copyright 2013-2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -42,7 +42,8 @@ nirio_fifo<data_t>::nirio_fifo(
{
nirio_status status = 0;
nirio_status_chain(_riok_proxy_ptr->set_attribute(RIO_ADDRESS_SPACE, BUS_INTERFACE), status);
- uint32_t base_addr, addr_space_word;
+ uint32_t base_addr = 0;
+ uint32_t addr_space_word = 0;
nirio_status_chain(_riok_proxy_ptr->peek(0x1C, base_addr), status);
nirio_status_chain(_riok_proxy_ptr->peek(0xC, addr_space_word), status);
_dma_base_addr = base_addr + (_fifo_channel * (1<<((addr_space_word>>16)&0xF)));
diff --git a/host/include/uhd/transport/nirio/nirio_resource_manager.h b/host/include/uhd/transport/nirio/nirio_resource_manager.h
index c71f1c8aa..301b588c7 100644
--- a/host/include/uhd/transport/nirio/nirio_resource_manager.h
+++ b/host/include/uhd/transport/nirio/nirio_resource_manager.h
@@ -1,5 +1,5 @@
//
-// Copyright 2013 Ettus Research LLC
+// Copyright 2013,2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -78,7 +78,7 @@ public:
}
if (fifo->get_channel() != fifo_info_ptr->channel) return NiRio_Status_InvalidParameter;
- if (fifo->get_scalar_type() != fifo_info_ptr->scalar_type) return NiRio_Status_InvalidParameter;
+ if (nirio_scalar_type_t(fifo->get_scalar_type()) != fifo_info_ptr->scalar_type) return NiRio_Status_InvalidParameter;
return NiRio_Status_Success;
}
@@ -94,7 +94,7 @@ public:
}
if (fifo->get_channel() != fifo_info_ptr->channel) return NiRio_Status_InvalidParameter;
- if (fifo->get_scalar_type() != fifo_info_ptr->scalar_type) return NiRio_Status_InvalidParameter;
+ if (nirio_scalar_type_t(fifo->get_scalar_type()) != fifo_info_ptr->scalar_type) return NiRio_Status_InvalidParameter;
return NiRio_Status_Success;
}
diff --git a/host/include/uhd/usrp_clock/multi_usrp_clock.hpp b/host/include/uhd/usrp_clock/multi_usrp_clock.hpp
index 0b50b32ae..48d433d71 100644
--- a/host/include/uhd/usrp_clock/multi_usrp_clock.hpp
+++ b/host/include/uhd/usrp_clock/multi_usrp_clock.hpp
@@ -57,6 +57,8 @@ class UHD_API multi_usrp_clock : boost::noncopyable {
public:
typedef boost::shared_ptr<multi_usrp_clock> sptr;
+ virtual ~multi_usrp_clock(void) = 0;
+
/*!
* Make a new Multi-USRP-Clock from the given device address.
* \param dev_addr the device address
diff --git a/host/lib/transport/libusb1_zero_copy.cpp b/host/lib/transport/libusb1_zero_copy.cpp
index 4ea2032e3..1ac02d16f 100644
--- a/host/lib/transport/libusb1_zero_copy.cpp
+++ b/host/lib/transport/libusb1_zero_copy.cpp
@@ -192,7 +192,7 @@ public:
result.usb_transfer_complete.timed_wait(lock, timeout_time, lut_result_completed(result));
}
}
- return result.completed;
+ return (result.completed > 0);
}
private:
diff --git a/host/lib/transport/nirio/nirio_driver_iface_unsupported.cpp b/host/lib/transport/nirio/nirio_driver_iface_unsupported.cpp
index d265efa63..ba0febe20 100644
--- a/host/lib/transport/nirio/nirio_driver_iface_unsupported.cpp
+++ b/host/lib/transport/nirio/nirio_driver_iface_unsupported.cpp
@@ -1,5 +1,5 @@
//
-// Copyright 2013 Ettus Research LLC
+// Copyright 2013,2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -19,43 +19,43 @@
namespace nirio_driver_iface {
nirio_status rio_open(
- const std::string& /* device_path */,
- rio_dev_handle_t& /* device_handle */)
+ UHD_UNUSED(const std::string& device_path),
+ UHD_UNUSED(rio_dev_handle_t& device_handle))
{
return NiRio_Status_FeatureNotSupported;
}
-void rio_close(rio_dev_handle_t& /* device_handle */)
+void rio_close(UHD_UNUSED(rio_dev_handle_t& device_handle))
{
}
-bool rio_isopen(rio_dev_handle_t /* device_handle */)
+bool rio_isopen(UHD_UNUSED(rio_dev_handle_t device_handle))
{
return false;
}
nirio_status rio_ioctl(
- rio_dev_handle_t /* device_handle */,
- uint32_t /* ioctl_code */,
- const void* /* write_buf */,
- size_t /* write_buf_len */,
- void* /* read_buf */,
- size_t /* read_buf_len */)
+ UHD_UNUSED(rio_dev_handle_t device_handle),
+ UHD_UNUSED(uint32_t ioctl_code),
+ UHD_UNUSED(const void *write_buf),
+ UHD_UNUSED(size_t write_buf_len),
+ UHD_UNUSED(void *read_buf),
+ UHD_UNUSED(size_t read_buf_len))
{
return NiRio_Status_FeatureNotSupported;
}
nirio_status rio_mmap(
- rio_dev_handle_t /* device_handle */,
- uint16_t /* memory_type */,
- size_t /* size */,
- bool /* writable */,
- rio_mmap_t& /* map */)
+ UHD_UNUSED(rio_dev_handle_t device_handle),
+ UHD_UNUSED(uint16_t memory_type),
+ UHD_UNUSED(size_t size),
+ UHD_UNUSED(bool writable),
+ UHD_UNUSED(rio_mmap_t &map))
{
return NiRio_Status_FeatureNotSupported;
}
-nirio_status rio_munmap(rio_mmap_t& /* map */)
+nirio_status rio_munmap(UHD_UNUSED(rio_mmap_t &map))
{
return NiRio_Status_FeatureNotSupported;
}
diff --git a/host/lib/transport/nirio_zero_copy.cpp b/host/lib/transport/nirio_zero_copy.cpp
index 9d64d0792..1eb431a19 100644
--- a/host/lib/transport/nirio_zero_copy.cpp
+++ b/host/lib/transport/nirio_zero_copy.cpp
@@ -1,5 +1,5 @@
//
-// Copyright 2013-2014 Ettus Research LLC
+// Copyright 2013-2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -51,7 +51,8 @@ public:
UHD_INLINE sptr get_new(const double timeout, size_t &index)
{
nirio_status status = 0;
- size_t elems_acquired, elems_remaining;
+ size_t elems_acquired = 0;
+ size_t elems_remaining = 0;
nirio_status_chain(_fifo.acquire(
_typed_buffer, _frame_size / sizeof(fifo_data_t),
static_cast<uint32_t>(timeout*1000),
@@ -91,7 +92,8 @@ public:
UHD_INLINE sptr get_new(const double timeout, size_t &index)
{
nirio_status status = 0;
- size_t elems_acquired, elems_remaining;
+ size_t elems_acquired = 0;
+ size_t elems_remaining = 0;
nirio_status_chain(_fifo.acquire(
_typed_buffer, _frame_size / sizeof(fifo_data_t),
static_cast<uint32_t>(timeout*1000),
@@ -299,10 +301,10 @@ private:
nirio_status_chain(_proxy()->peek(
PCIE_TX_DMA_REG(DMA_CTRL_STATUS_REG, _fifo_instance), reg_data), status);
- tx_busy = (reg_data & DMA_STATUS_BUSY);
+ tx_busy = (reg_data & DMA_STATUS_BUSY) > 0;
nirio_status_chain(_proxy()->peek(
PCIE_RX_DMA_REG(DMA_CTRL_STATUS_REG, _fifo_instance), reg_data), status);
- rx_busy = (reg_data & DMA_STATUS_BUSY);
+ rx_busy = (reg_data & DMA_STATUS_BUSY) > 0;
if (nirio_status_not_fatal(status) && (tx_busy || rx_busy)) {
start_time = boost::posix_time::microsec_clock::local_time();
@@ -311,10 +313,10 @@ private:
elapsed = boost::posix_time::microsec_clock::local_time() - start_time;
nirio_status_chain(_proxy()->peek(
PCIE_TX_DMA_REG(DMA_CTRL_STATUS_REG, _fifo_instance), reg_data), status);
- tx_busy = (reg_data & DMA_STATUS_BUSY);
+ tx_busy = (reg_data & DMA_STATUS_BUSY) > 0;
nirio_status_chain(_proxy()->peek(
PCIE_RX_DMA_REG(DMA_CTRL_STATUS_REG, _fifo_instance), reg_data), status);
- rx_busy = (reg_data & DMA_STATUS_BUSY);
+ rx_busy = (reg_data & DMA_STATUS_BUSY) > 0;
} while (
nirio_status_not_fatal(status) &&
(tx_busy || rx_busy) &&
diff --git a/host/lib/usrp/b100/clock_ctrl.cpp b/host/lib/usrp/b100/clock_ctrl.cpp
index febc8ba4b..53a35df2b 100644
--- a/host/lib/usrp/b100/clock_ctrl.cpp
+++ b/host/lib/usrp/b100/clock_ctrl.cpp
@@ -114,8 +114,8 @@ static clock_settings_type get_clock_settings(double rate){
const size_t gcd = size_t(boost::math::gcd(ref_rate, out_rate));
for (size_t i = 1; i <= 100; i++){
- const size_t X = i*ref_rate/gcd;
- const size_t Y = i*out_rate/gcd;
+ const size_t X = size_t(i*ref_rate/gcd);
+ const size_t Y = size_t(i*out_rate/gcd);
//determine A and B (P is fixed)
cs.b_counter = Y/cs.prescaler;
diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp
index 0f799e571..270d3bb4b 100644
--- a/host/lib/usrp/b200/b200_iface.cpp
+++ b/host/lib/usrp/b200/b200_iface.cpp
@@ -549,7 +549,7 @@ public:
size_t file_size = 0;
{
std::ifstream file(filename, std::ios::in | std::ios::binary | std::ios::ate);
- file_size = file.tellg();
+ file_size = size_t(file.tellg());
}
std::ifstream file;
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 81bbb6691..e1b106208 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -786,7 +786,7 @@ void b200_impl::register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -1131,6 +1131,6 @@ sensor_value_t b200_impl::get_ref_locked(void)
sensor_value_t b200_impl::get_fe_pll_locked(const bool is_tx)
{
const boost::uint32_t st = _local_ctrl->peek32(RB32_CORE_PLL);
- const bool locked = is_tx ? bool(st & 0x1) : bool(st & 0x2);
+ const bool locked = is_tx ? ((st & 0x1) > 0) : ((st & 0x2) > 0);
return sensor_value_t("LO", locked, "locked", "unlocked");
}
diff --git a/host/lib/usrp/common/adf435x_common.cpp b/host/lib/usrp/common/adf435x_common.cpp
index 9b362a4d9..474a1c932 100644
--- a/host/lib/usrp/common/adf435x_common.cpp
+++ b/host/lib/usrp/common/adf435x_common.cpp
@@ -129,11 +129,11 @@ adf435x_tuning_settings tune_adf435x_synth(
settings.frac_12_bit = FRAC;
settings.int_16_bit = N;
settings.mod_12_bit = MOD;
- settings.clock_divider_12_bit = std::max<boost::uint16_t>(1, std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD));
+ settings.clock_divider_12_bit = std::max<boost::uint16_t>(1, boost::uint16_t(std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD)));
settings.r_counter_10_bit = R;
settings.r_divide_by_2_en = T;
settings.r_doubler_en = D;
- settings.band_select_clock_div = BS;
+ settings.band_select_clock_div = boost::uint8_t(BS);
settings.rf_divider = RFdiv;
std::string tuning_str = (constraints.force_frac0) ? "Integer-N" : "Fractional";
diff --git a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
index c0e2c5ea0..2ea5b66da 100644
--- a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
+++ b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
@@ -119,7 +119,7 @@ public:
/*******************************************************************
* Peek and poke 32 bit implementation
******************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt(addr, data, POKE32_CMD);
@@ -127,7 +127,7 @@ public:
this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt(addr, 0, PEEK32_CMD);
@@ -138,11 +138,11 @@ public:
/*******************************************************************
* Peek and poke 16 bit not implemented
******************************************************************/
- void poke16(wb_addr_type, boost::uint16_t){
+ void poke16(const wb_addr_type, const boost::uint16_t){
throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
}
- boost::uint16_t peek16(wb_addr_type){
+ boost::uint16_t peek16(const wb_addr_type){
throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
}
diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp
index 6552f1b2d..7ae97e4d0 100644
--- a/host/lib/usrp/common/fx2_ctrl.cpp
+++ b/host/lib/usrp/common/fx2_ctrl.cpp
@@ -421,7 +421,7 @@ public:
boost::uint16_t offset,
size_t num_bytes
){
- this->write_i2c(addr, byte_vector_t(1, offset));
+ this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset)));
return this->read_i2c(addr, num_bytes);
}
diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
index a85cdea42..530267f6c 100644
--- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp
+++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
@@ -70,7 +70,7 @@ public:
void set_clock_rate(const double rate)
{
static const boost::uint32_t i2c_datarate = 400000;
- boost::uint16_t prescaler = rate / (i2c_datarate*5) - 1;
+ boost::uint16_t prescaler = boost::uint16_t(rate / (i2c_datarate*5) - 1);
_iface->poke32(REG_I2C_PRESCALER_LO, prescaler & 0xFF);
_iface->poke32(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF);
}
@@ -127,7 +127,7 @@ public:
//the default implementation calls read i2c once per byte
byte_vector_t read_eeprom(boost::uint16_t addr, boost::uint16_t offset, size_t num_bytes)
{
- this->write_i2c(addr, byte_vector_t(1, offset));
+ this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset)));
return this->read_i2c(addr, num_bytes);
}
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
index 6357102fb..1c9b5c4fa 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
@@ -190,7 +190,7 @@ private:
try
{
UHD_ASSERT_THROW(bool(buff));
- UHD_ASSERT_THROW(bool(buff->size()));
+ UHD_ASSERT_THROW(buff->size() > 0);
}
catch(const std::exception &ex)
{
diff --git a/host/lib/usrp/dboard/db_tvrx2.cpp b/host/lib/usrp/dboard/db_tvrx2.cpp
index c74c64471..9300483d1 100644
--- a/host/lib/usrp/dboard/db_tvrx2.cpp
+++ b/host/lib/usrp/dboard/db_tvrx2.cpp
@@ -1103,7 +1103,7 @@ tvrx2::~tvrx2(void){
* TDA18272 Register IO Functions
**********************************************************************/
void tvrx2::set_scaled_rf_freq(double rf_freq){
- _tda18272hnm_regs.set_rf_freq(_freq_scalar*rf_freq/1e3);
+ _tda18272hnm_regs.set_rf_freq(boost::uint32_t(_freq_scalar*rf_freq/1e3));
}
double tvrx2::get_scaled_rf_freq(void){
@@ -1320,9 +1320,9 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
read_reg(0x26, 0x2B);
subband_freqs = get_tda18272_rfcal_result_freq_range(1);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
subband_freqs = get_tda18272_rfcal_result_freq_range(4);
- uRFCal1 = subband_freqs.start();
+ uRFCal1 = boost::uint32_t(subband_freqs.start());
if(uRF < uRFCal0)
subband = 0;
@@ -1335,9 +1335,9 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
else
{
subband_freqs = get_tda18272_rfcal_result_freq_range(7);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
subband_freqs = get_tda18272_rfcal_result_freq_range(10);
- uRFCal1 = subband_freqs.start();
+ uRFCal1 = boost::uint32_t(subband_freqs.start());
if(uRF < uRFCal0)
subband = 4;
@@ -1351,7 +1351,7 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
cal_result = _rfcal_coeffs[subband].cal_number;
subband_freqs = get_tda18272_rfcal_result_freq_range(cal_result);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
RF_A1 = _rfcal_coeffs[subband].RF_A1;
RF_B1 = _rfcal_coeffs[subband].RF_B1;
@@ -1721,7 +1721,7 @@ void tvrx2::wait_irq(void){
send_reg(0xA, 0xA);
read_reg(0xA, 0xB);
- irq = (this->get_iface()->read_gpio(dboard_iface::UNIT_RX) & tvrx2_sd_name_to_irq_io[get_subdev_name()]);
+ irq = (this->get_iface()->read_gpio(dboard_iface::UNIT_RX) & tvrx2_sd_name_to_irq_io[get_subdev_name()]) > 0;
UHD_LOGV(often) << boost::format(
"\nTVRX2 (%s): Cleared IRQ, subdev = %d, mask = 0x%x, Status: 0x%x\n") % (get_subdev_name()) % get_subdev_name() % (int(tvrx2_sd_name_to_irq_io[get_subdev_name()])) % irq << std::endl;
diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp
index 5184d2ecb..06bfad7d3 100644
--- a/host/lib/usrp/dboard/db_ubx.cpp
+++ b/host/lib/usrp/dboard/db_ubx.cpp
@@ -191,7 +191,7 @@ protected:
}
//keep pfd freq low enough to achieve 50kHz BS clock
- BS = std::ceil(pfd_freq / 50e3);
+ BS = int(std::ceil(pfd_freq / 50e3));
if(BS <= 1023) break;
}
UHD_ASSERT_THROW(R <= 1023);
diff --git a/host/lib/usrp/e300/e300_common.cpp b/host/lib/usrp/e300/e300_common.cpp
index 97e906be7..db5b37055 100644
--- a/host/lib/usrp/e300/e300_common.cpp
+++ b/host/lib/usrp/e300/e300_common.cpp
@@ -45,7 +45,7 @@ void load_fpga_image(const std::string &path)
char buff[16384]; // devcfg driver can't handle huge writes
do {
fpga_file.read(buff, sizeof(buff));
- std::fwrite(buff, 1, fpga_file.gcount(), wfile);
+ std::fwrite(buff, 1, size_t(fpga_file.gcount()), wfile);
} while (fpga_file);
fpga_file.close();
diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp
index 40904bda7..3d92bc5c8 100644
--- a/host/lib/usrp/e300/e300_impl.cpp
+++ b/host/lib/usrp/e300/e300_impl.cpp
@@ -361,7 +361,7 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr)
e300_fifo_config_t fifo_cfg;
try {
fifo_cfg = e300_read_sysfs();
- } catch (uhd::lookup_error &e) {
+ } catch (...) {
throw uhd::runtime_error("Failed to get driver parameters from sysfs.");
}
_fifo_iface = e300_fifo_interface::make(fifo_cfg);
@@ -610,7 +610,7 @@ uhd::sensor_value_t e300_impl::_get_fe_pll_lock(const bool is_tx)
{
const boost::uint32_t st =
_global_regs->peek32(global_regs::RB32_CORE_PLL);
- const bool locked = is_tx ? st & 0x1 : st & 0x2;
+ const bool locked = is_tx ? ((st & 0x1) > 0) : ((st & 0x2) > 0);
return sensor_value_t("LO", locked, "locked", "unlocked");
}
@@ -665,7 +665,7 @@ void e300_impl::_register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -705,7 +705,7 @@ void e300_impl::_codec_loopback_self_test(wb_iface::sptr iface)
bool test_fail = false;
UHD_ASSERT_THROW(bool(iface));
UHD_MSG(status) << "Performing CODEC loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
diff --git a/host/lib/usrp/e300/e300_sensor_manager.cpp b/host/lib/usrp/e300/e300_sensor_manager.cpp
index 95f31742b..527cfb91a 100644
--- a/host/lib/usrp/e300/e300_sensor_manager.cpp
+++ b/host/lib/usrp/e300/e300_sensor_manager.cpp
@@ -159,7 +159,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == GPS_FOUND);
// TODO: Use proper serialization here ...
- return static_cast<bool>(uhd::ntohx(transaction.value));
+ return (uhd::ntohx(transaction.value) > 0);
}
uhd::sensor_value_t get_gps_lock(void)
@@ -193,7 +193,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == GPS_LOCK);
// TODO: Use proper serialization here ...
- return sensor_value_t("GPS lock status", static_cast<bool>(uhd::ntohx(transaction.value)), "locked", "unlocked");
+ return sensor_value_t("GPS lock status", (uhd::ntohx(transaction.value) > 0), "locked", "unlocked");
}
uhd::sensor_value_t get_ref_lock(void)
@@ -227,7 +227,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == REF_LOCK);
// TODO: Use proper serialization here ...
- return sensor_value_t("Ref", static_cast<bool>(uhd::ntohx(transaction.value)), "locked", "unlocked");
+ return sensor_value_t("Ref", (uhd::ntohx(transaction.value) > 0), "locked", "unlocked");
}
private:
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index 6eff9d3ad..48fdfcf12 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -45,7 +45,7 @@ public:
/*******************************************************************
* Peek and Poke
******************************************************************/
- void poke32(boost::uint32_t addr, boost::uint32_t value)
+ void poke32(const boost::uint32_t addr, const boost::uint32_t value)
{
boost::uint32_t swapped = uhd::htonx(value);
@@ -68,7 +68,7 @@ public:
if (ret < 0) throw uhd::io_error("USRP1: failed control write");
}
- boost::uint32_t peek32(boost::uint32_t addr)
+ boost::uint32_t peek32(const boost::uint32_t addr)
{
UHD_LOGV(always)
<< "peek32("
@@ -92,11 +92,11 @@ public:
return uhd::ntohx(value_out);
}
- void poke16(boost::uint32_t, boost::uint16_t) {
+ void poke16(const boost::uint32_t, const boost::uint16_t) {
throw uhd::not_implemented_error("Unhandled command poke16()");
}
- boost::uint16_t peek16(boost::uint32_t) {
+ boost::uint16_t peek16(const boost::uint32_t) {
throw uhd::not_implemented_error("Unhandled command peek16()");
return 0;
}
diff --git a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
index efb88eb82..9e8687b94 100644
--- a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
@@ -67,7 +67,7 @@ public:
/*******************************************************************
* Peek and poke 32 bit implementation
******************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt((addr - SETTING_REGS_BASE)/4, data, POKE32_CMD);
@@ -75,7 +75,7 @@ public:
this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt((addr - READBACK_BASE)/4, 0, PEEK32_CMD);
@@ -86,11 +86,11 @@ public:
/*******************************************************************
* Peek and poke 16 bit not implemented
******************************************************************/
- void poke16(wb_addr_type, boost::uint16_t){
+ void poke16(const wb_addr_type, const boost::uint16_t){
throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
}
- boost::uint16_t peek16(wb_addr_type){
+ boost::uint16_t peek16(const wb_addr_type){
throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
}
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index 2f2c345be..3ffbf9aac 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -139,19 +139,19 @@ public:
/***********************************************************************
* Peek and Poke
**********************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
this->get_reg<boost::uint32_t, USRP2_REG_ACTION_FPGA_POKE32>(addr, data);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
return this->get_reg<boost::uint32_t, USRP2_REG_ACTION_FPGA_PEEK32>(addr);
}
- void poke16(wb_addr_type addr, boost::uint16_t data){
+ void poke16(const wb_addr_type addr, const boost::uint16_t data){
this->get_reg<boost::uint16_t, USRP2_REG_ACTION_FPGA_POKE16>(addr, data);
}
- boost::uint16_t peek16(wb_addr_type addr){
+ boost::uint16_t peek16(const wb_addr_type addr){
return this->get_reg<boost::uint16_t, USRP2_REG_ACTION_FPGA_PEEK16>(addr);
}
@@ -219,7 +219,7 @@ public:
//setup the out data
usrp2_ctrl_data_t out_data = usrp2_ctrl_data_t();
out_data.id = htonl(USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO);
- out_data.data.i2c_args.addr = addr;
+ out_data.data.i2c_args.addr = uint8_t(addr);
out_data.data.i2c_args.bytes = buf.size();
//limitation of i2c transaction size
@@ -237,7 +237,7 @@ public:
//setup the out data
usrp2_ctrl_data_t out_data = usrp2_ctrl_data_t();
out_data.id = htonl(USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO);
- out_data.data.i2c_args.addr = addr;
+ out_data.data.i2c_args.addr = uint8_t(addr);
out_data.data.i2c_args.bytes = num_bytes;
//limitation of i2c transaction size
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp
index d9b27b6b4..641adc048 100644
--- a/host/lib/usrp/x300/x300_impl.cpp
+++ b/host/lib/usrp/x300/x300_impl.cpp
@@ -1306,7 +1306,7 @@ void x300_impl::register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -1561,7 +1561,7 @@ void x300_impl::claimer_loop(wb_iface::sptr iface)
{
{ //Critical section
boost::mutex::scoped_lock(claimer_mutex);
- iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_TIME), time(NULL));
+ iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_TIME), uint32_t(time(NULL)));
iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_SRC), get_process_hash());
}
boost::this_thread::sleep(boost::posix_time::milliseconds(1000)); //1 second
diff --git a/host/lib/usrp_clock/multi_usrp_clock.cpp b/host/lib/usrp_clock/multi_usrp_clock.cpp
index 77489e13b..4d3e526d6 100644
--- a/host/lib/usrp_clock/multi_usrp_clock.cpp
+++ b/host/lib/usrp_clock/multi_usrp_clock.cpp
@@ -84,6 +84,10 @@ private:
property_tree::sptr _tree;
};
+multi_usrp_clock::~multi_usrp_clock(void){
+ /* NOP */
+}
+
/***********************************************************************
* Multi USRP Clock factory function
**********************************************************************/
diff --git a/host/lib/usrp_clock/octoclock/octoclock_eeprom.cpp b/host/lib/usrp_clock/octoclock/octoclock_eeprom.cpp
index 6d54cac70..93c317191 100644
--- a/host/lib/usrp_clock/octoclock/octoclock_eeprom.cpp
+++ b/host/lib/usrp_clock/octoclock/octoclock_eeprom.cpp
@@ -60,7 +60,7 @@ static const std::string bytes_to_string(const byte_vector_t &bytes){
* Implementation
**********************************************************************/
void octoclock_eeprom_t::_load(){
- boost::uint32_t octoclock_data[udp_simple::mtu];
+ boost::uint8_t octoclock_data[udp_simple::mtu];
const octoclock_packet_t *pkt_in = reinterpret_cast<const octoclock_packet_t*>(octoclock_data);
const octoclock_fw_eeprom_t *eeprom_in = reinterpret_cast<const octoclock_fw_eeprom_t*>(pkt_in->data);
@@ -109,7 +109,7 @@ void octoclock_eeprom_t::_load(){
}
void octoclock_eeprom_t::_store() const {
- boost::uint32_t octoclock_data[udp_simple::mtu];
+ boost::uint8_t octoclock_data[udp_simple::mtu];
const octoclock_packet_t *pkt_in = reinterpret_cast<const octoclock_packet_t *>(octoclock_data);
octoclock_packet_t pkt_out;
diff --git a/host/lib/usrp_clock/octoclock/octoclock_uart.cpp b/host/lib/usrp_clock/octoclock/octoclock_uart.cpp
index eb3f40d9c..e879c4b70 100644
--- a/host/lib/usrp_clock/octoclock/octoclock_uart.cpp
+++ b/host/lib/usrp_clock/octoclock/octoclock_uart.cpp
@@ -111,6 +111,7 @@ namespace uhd{
void octoclock_uart_iface::_update_cache(){
octoclock_packet_t pkt_out;
pkt_out.len = 0;
+ pkt_out.sequence = 0;
size_t len = 0;
boost::uint8_t octoclock_data[udp_simple::mtu];
diff --git a/host/tests/sph_recv_test.cpp b/host/tests/sph_recv_test.cpp
index e8c51b847..5ade52a9c 100644
--- a/host/tests/sph_recv_test.cpp
+++ b/host/tests/sph_recv_test.cpp
@@ -1,5 +1,5 @@
//
-// Copyright 2011-2012 Ettus Research LLC
+// Copyright 2011-2012,2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -675,7 +675,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_fragment){
BOOST_CHECK_EQUAL(metadata.error_code, uhd::rx_metadata_t::ERROR_CODE_NONE);
BOOST_CHECK(metadata.has_time_spec);
BOOST_CHECK_TS_CLOSE(metadata.time_spec, uhd::time_spec_t::from_ticks(num_accum_samps, SAMP_RATE));
- BOOST_CHECK_EQUAL(num_samps_ret, (size_t)10);
+ BOOST_CHECK_EQUAL(num_samps_ret, 10UL);
num_accum_samps += num_samps_ret;
if (not metadata.more_fragments) continue;
@@ -685,7 +685,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_fragment){
);
BOOST_CHECK_EQUAL(metadata.error_code, uhd::rx_metadata_t::ERROR_CODE_NONE);
BOOST_CHECK(not metadata.more_fragments);
- BOOST_CHECK_EQUAL(metadata.fragment_offset, (size_t)10);
+ BOOST_CHECK_EQUAL(metadata.fragment_offset, 10UL);
BOOST_CHECK(metadata.has_time_spec);
BOOST_CHECK_TS_CLOSE(metadata.time_spec, uhd::time_spec_t::from_ticks(num_accum_samps, SAMP_RATE));
BOOST_CHECK_EQUAL(num_samps_ret, i%10);
diff --git a/host/tests/sph_send_test.cpp b/host/tests/sph_send_test.cpp
index 58d47c76d..9cd195c7e 100644
--- a/host/tests/sph_send_test.cpp
+++ b/host/tests/sph_send_test.cpp
@@ -1,5 +1,5 @@
//
-// Copyright 2011-2012 Ettus Research LLC
+// Copyright 2011-2012,2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -182,7 +182,7 @@ BOOST_AUTO_TEST_CASE(test_sph_send_one_channel_full_buffer_mode){
for (size_t i = 0; i < NUM_PKTS_TO_TEST; i++){
std::cout << "data check " << i << std::endl;
dummy_send_xport.pop_front_packet(ifpi);
- BOOST_CHECK_EQUAL(ifpi.num_payload_words32, (size_t)20);
+ BOOST_CHECK_EQUAL(ifpi.num_payload_words32, 20UL);
BOOST_CHECK(ifpi.has_tsf);
BOOST_CHECK_EQUAL(ifpi.tsf, num_accum_samps*TICK_RATE/SAMP_RATE);
BOOST_CHECK_EQUAL(ifpi.sob, i == 0);
diff --git a/host/utils/nirio_programmer.cpp b/host/utils/nirio_programmer.cpp
index 43ec1ff43..c8c5e72d3 100644
--- a/host/utils/nirio_programmer.cpp
+++ b/host/utils/nirio_programmer.cpp
@@ -173,7 +173,7 @@ int main(int argc, char *argv[])
ss >> peek_addr;
niriok_scoped_addr_space(dev_proxy, peek_tokens[0]=="c"?BUS_INTERFACE:FPGA, status);
- uint32_t reg_val;
+ uint32_t reg_val = 0;
if (peek_tokens[0]=="z") {
nirio_status_chain(dev_proxy->poke((uint32_t)0x60000 + peek_addr, (uint32_t)0), status);
do {
@@ -190,7 +190,7 @@ int main(int argc, char *argv[])
//Display attributes
if (vm.count("stats")){
printf("[Interface %u]\n", interface_num);
- uint32_t attr_val;
+ uint32_t attr_val = 0;
nirio_status_chain(dev_proxy->get_attribute(RIO_IS_FPGA_PROGRAMMED, attr_val), status);
printf("* Is FPGA Programmed? = %s\n", (attr_val==1)?"YES":"NO");
@@ -208,7 +208,7 @@ int main(int argc, char *argv[])
}
printf("* FPGA Bitstream Checksum = %s\n", checksum.c_str());
- uint32_t reg_val;
+ uint32_t reg_val = 0;
nirio_status_chain(dev_proxy->set_attribute(RIO_ADDRESS_SPACE, BUS_INTERFACE), status);
nirio_status_chain(dev_proxy->peek(0, reg_val), status);
printf("* Chinch Signature = %x\n", reg_val);
diff --git a/host/utils/octoclock_firmware_burner.cpp b/host/utils/octoclock_firmware_burner.cpp
index 0a48caabd..d624095e6 100644
--- a/host/utils/octoclock_firmware_burner.cpp
+++ b/host/utils/octoclock_firmware_burner.cpp
@@ -123,7 +123,7 @@ device_addrs_t bootloader_find(const std::string &ip_addr){
void read_firmware(){
std::ifstream firmware_file(firmware_path.c_str(), std::ios::binary);
firmware_file.seekg(0, std::ios::end);
- firmware_size = firmware_file.tellg();
+ firmware_size = size_t(firmware_file.tellg());
if(firmware_size > MAX_FIRMWARE_SIZE){
firmware_file.close();
throw uhd::runtime_error(str(boost::format("Firmware file too large: %d > %d")
diff --git a/host/utils/uhd_usrp_probe.cpp b/host/utils/uhd_usrp_probe.cpp
index ea346b4c9..a03646cc0 100644
--- a/host/utils/uhd_usrp_probe.cpp
+++ b/host/utils/uhd_usrp_probe.cpp
@@ -1,5 +1,5 @@
//
-// Copyright 2010-2011 Ettus Research LLC
+// Copyright 2010-2011,2015 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -35,10 +35,6 @@
namespace po = boost::program_options;
using namespace uhd;
-static std::string indent(size_t level){
- return (level)? (indent(level-1) + " ") : "";
-}
-
static std::string make_border(const std::string &text){
std::stringstream ss;
ss << boost::format(" _____________________________________________________") << std::endl;
diff --git a/host/utils/usrp_n2xx_simple_net_burner.cpp b/host/utils/usrp_n2xx_simple_net_burner.cpp
index b06e67bb2..642e9a407 100644
--- a/host/utils/usrp_n2xx_simple_net_burner.cpp
+++ b/host/utils/usrp_n2xx_simple_net_burner.cpp
@@ -262,7 +262,7 @@ int read_fpga_image(std::string& fpga_path){
//Check size of given image
std::ifstream fpga_file(fpga_path.c_str(), std::ios::binary);
fpga_file.seekg(0, std::ios::end);
- int fpga_image_size = fpga_file.tellg();
+ size_t fpga_image_size = size_t(fpga_file.tellg());
if(fpga_image_size > FPGA_IMAGE_SIZE_BYTES){
throw std::runtime_error(str(boost::format("FPGA image is too large. %d > %d")
% fpga_image_size % FPGA_IMAGE_SIZE_BYTES));
@@ -297,7 +297,7 @@ int read_fw_image(std::string& fw_path){
//Check size of given image
std::ifstream fw_file(fw_path.c_str(), std::ios::binary);
fw_file.seekg(0, std::ios::end);
- int fw_image_size = fw_file.tellg();
+ size_t fw_image_size = size_t(fw_file.tellg());
if(fw_image_size > FW_IMAGE_SIZE_BYTES){
throw std::runtime_error(str(boost::format("Firmware image is too large. %d > %d")
% fw_image_size % FW_IMAGE_SIZE_BYTES));
diff --git a/host/utils/usrp_x3xx_fpga_burner.cpp b/host/utils/usrp_x3xx_fpga_burner.cpp
index abd5815e8..e32e4d636 100644
--- a/host/utils/usrp_x3xx_fpga_burner.cpp
+++ b/host/utils/usrp_x3xx_fpga_burner.cpp
@@ -487,7 +487,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){
if(vm.count("addr")){
udp_simple::sptr udp_transport = udp_simple::make_connected(ip_addr, BOOST_STRINGIZE(X300_FPGA_PROG_UDP_PORT));
- ethernet_burn(udp_transport, fpga_path, vm.count("verify"));
+ ethernet_burn(udp_transport, fpga_path, (vm.count("verify") > 0));
if(vm.count("configure")){
if(configure_fpga(udp_transport, ip_addr)) std::cout << "Successfully configured FPGA!" << std::endl;