fpga: x400: Add Replay to 100 and 200 MHz images

This adds the RFNoC replay block to the defautl 100 and 200 MHz images
for X410.

2 files changed, 107 insertions, 36 deletions

diff --git a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml
index 740944ee6..2788e5734 100644
--- a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml
@@ -17,18 +17,34 @@ stream_endpoints:
     ctrl: True                      # Endpoint passes control traffic
     data: True                      # Endpoint passes data traffic
     buff_size_bytes: 262144         # Ingress buffer size for data
-  ep1:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
-  ep2:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
-  ep3:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
+  ep1:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep2:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep3:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep4:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep5:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep6:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep7:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
 
 # A list of all NoC blocks in design
 # ----------------------------------
@@ -59,6 +75,12 @@ noc_blocks:
     parameters:
       NUM_PORTS: 2
       NIPC: RADIO_NIPC
+  replay0:
+    block_desc: 'replay.yml'
+    parameters:
+      NUM_PORTS: 4
+      MEM_DATA_W: 64
+      MEM_ADDR_W: 32
 
 # A list of all static connections in design
 # ------------------------------------------
@@ -93,6 +115,17 @@ connections:
   # radio1(1) to ep3 - RFB:1 RX
   - { srcblk: radio1,   srcport: out_1,       dstblk: ddc1,     dstport: in_1            }
   - { srcblk: ddc1,     srcport: out_1,       dstblk: ep3,      dstport: in0             }
+  #
+  # Replay
+  - { srcblk: ep4,      srcport: out0,        dstblk: replay0,  dstport: in_0            }
+  - { srcblk: replay0,  srcport: out_0,       dstblk: ep4,      dstport: in0             }
+  - { srcblk: ep5,      srcport: out0,        dstblk: replay0,  dstport: in_1            }
+  - { srcblk: replay0,  srcport: out_1,       dstblk: ep5,      dstport: in0             }
+  - { srcblk: ep6,      srcport: out0,        dstblk: replay0,  dstport: in_2            }
+  - { srcblk: replay0,  srcport: out_2,       dstblk: ep6,      dstport: in0             }
+  - { srcblk: ep7,      srcport: out0,        dstblk: replay0,  dstport: in_3            }
+  - { srcblk: replay0,  srcport: out_3,       dstblk: ep7,      dstport: in0             }
+  #
   # BSP Connections
   - { srcblk: radio0,   srcport: ctrlport,    dstblk: _device_, dstport: ctrlport_radio0 }
   - { srcblk: radio1,   srcport: ctrlport,    dstblk: _device_, dstport: ctrlport_radio1 }
@@ -100,6 +133,7 @@ connections:
   - { srcblk: _device_, srcport: radio1,      dstblk: radio1,   dstport: radio           }
   - { srcblk: _device_, srcport: time,        dstblk: radio0,   dstport: time            }
   - { srcblk: _device_, srcport: time,        dstblk: radio1,   dstport: time            }
+  - { srcblk: replay0,  srcport: axi_ram,     dstblk: _device_, dstport: dram            }
 
 # A list of all clock domain connections in design
 # ------------------------------------------
@@ -109,9 +143,11 @@ connections:
 #         - dstblk  = Destination block to connect
 #         - dstport = Clock domain on the destination block to connect
 clk_domains:
-    - { srcblk: _device_, srcport: radio, dstblk: radio0, dstport: radio }
-    - { srcblk: _device_, srcport: radio, dstblk: duc0,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio, dstblk: ddc0,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio, dstblk: radio1, dstport: radio }
-    - { srcblk: _device_, srcport: radio, dstblk: duc1,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio, dstblk: ddc1,   dstport: ce    }
+    - { srcblk: _device_, srcport: radio, dstblk: radio0,  dstport: radio }
+    - { srcblk: _device_, srcport: radio, dstblk: duc0,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio, dstblk: ddc0,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio, dstblk: radio1,  dstport: radio }
+    - { srcblk: _device_, srcport: radio, dstblk: duc1,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio, dstblk: ddc1,    dstport: ce    }
+    - { srcblk: _device_, srcport: dram,  dstblk: replay0, dstport: mem   }
+
diff --git a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml
index abbbfa6b0..c10e5119f 100644
--- a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml
@@ -17,18 +17,34 @@ stream_endpoints:
     ctrl: True                      # Endpoint passes control traffic
     data: True                      # Endpoint passes data traffic
     buff_size_bytes: 262144         # Ingress buffer size for data
-  ep1:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
-  ep2:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
-  ep3:                       # Stream endpoint name
-    ctrl: False                     # Endpoint passes control traffic
-    data: True                      # Endpoint passes data traffic
-    buff_size_bytes: 262144         # Ingress buffer size for data
+  ep1:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep2:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep3:
+    ctrl: False
+    data: True
+    buff_size_bytes: 262144
+  ep4:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep5:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep6:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
+  ep7:
+    ctrl: False
+    data: True
+    buff_size_bytes: 4096
 
 # A list of all NoC blocks in design
 # ----------------------------------
@@ -59,6 +75,12 @@ noc_blocks:
     parameters:
       NUM_PORTS: 2
       NIPC: RADIO_NIPC
+  replay0:
+    block_desc: 'replay.yml'
+    parameters:
+      NUM_PORTS: 4
+      MEM_DATA_W: 64
+      MEM_ADDR_W: 32
 
 # A list of all static connections in design
 # ------------------------------------------
@@ -93,6 +115,17 @@ connections:
   # radio1(1) to ep3 - RFB:1 RX
   - { srcblk: radio1,   srcport: out_1,       dstblk: ddc1,     dstport: in_1            }
   - { srcblk: ddc1,     srcport: out_1,       dstblk: ep3,      dstport: in0             }
+  #
+  # Replay
+  - { srcblk: ep4,      srcport: out0,        dstblk: replay0,  dstport: in_0            }
+  - { srcblk: replay0,  srcport: out_0,       dstblk: ep4,      dstport: in0             }
+  - { srcblk: ep5,      srcport: out0,        dstblk: replay0,  dstport: in_1            }
+  - { srcblk: replay0,  srcport: out_1,       dstblk: ep5,      dstport: in0             }
+  - { srcblk: ep6,      srcport: out0,        dstblk: replay0,  dstport: in_2            }
+  - { srcblk: replay0,  srcport: out_2,       dstblk: ep6,      dstport: in0             }
+  - { srcblk: ep7,      srcport: out0,        dstblk: replay0,  dstport: in_3            }
+  - { srcblk: replay0,  srcport: out_3,       dstblk: ep7,      dstport: in0             }
+  #
   # BSP Connections
   - { srcblk: radio0,   srcport: ctrlport,    dstblk: _device_, dstport: ctrlport_radio0 }
   - { srcblk: radio1,   srcport: ctrlport,    dstblk: _device_, dstport: ctrlport_radio1 }
@@ -100,6 +133,7 @@ connections:
   - { srcblk: _device_, srcport: radio1,      dstblk: radio1,   dstport: radio           }
   - { srcblk: _device_, srcport: time,        dstblk: radio0,   dstport: time            }
   - { srcblk: _device_, srcport: time,        dstblk: radio1,   dstport: time            }
+  - { srcblk: replay0,  srcport: axi_ram,     dstblk: _device_, dstport: dram            }
 
 # A list of all clock domain connections in design
 # ------------------------------------------
@@ -109,9 +143,10 @@ connections:
 #         - dstblk  = Destination block to connect
 #         - dstport = Clock domain on the destination block to connect
 clk_domains:
-    - { srcblk: _device_, srcport: radio,    dstblk: radio0, dstport: radio }
-    - { srcblk: _device_, srcport: radio_2x, dstblk: duc0,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio_2x, dstblk: ddc0,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio,    dstblk: radio1, dstport: radio }
-    - { srcblk: _device_, srcport: radio_2x, dstblk: duc1,   dstport: ce    }
-    - { srcblk: _device_, srcport: radio_2x, dstblk: ddc1,   dstport: ce    }
+    - { srcblk: _device_, srcport: radio,    dstblk: radio0,  dstport: radio }
+    - { srcblk: _device_, srcport: radio_2x, dstblk: duc0,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio_2x, dstblk: ddc0,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio,    dstblk: radio1,  dstport: radio }
+    - { srcblk: _device_, srcport: radio_2x, dstblk: duc1,    dstport: ce    }
+    - { srcblk: _device_, srcport: radio_2x, dstblk: ddc1,    dstport: ce    }
+    - { srcblk: _device_, srcport: dram,     dstblk: replay0, dstport: mem   }