Add program to setup debug pins.

Add script to reload fpga and module.

3 files changed, 83 insertions, 1 deletions

diff --git a/host/apps/omap_debug/Makefile b/host/apps/omap_debug/Makefile
index 31229d45c..61f659b3e 100644
--- a/host/apps/omap_debug/Makefile
+++ b/host/apps/omap_debug/Makefile
@@ -1,6 +1,6 @@
 CFLAGS=-Wall -I../../lib/usrp/usrp_e/
 
-all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader usrp-e-gpio
+all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader usrp-e-gpio usrp-e-debug-pins
 
 usrp-e-spi : usrp-e-spi.c
 
@@ -23,6 +23,7 @@ fpga-downloader : fpga-downloader.cc
 
 usrp-e-gpio : usrp-e-gpio.c
 
+usrp-e-debug-pins : usrp-e-debug-pins.c
 clean :
 	rm -f usrp-e-spi
 	rm -f usrp-e-i2c
@@ -34,3 +35,4 @@ clean :
 	rm -f usrp-e-button
 	rm -f fpga-downloader
 	rm -f usrp-e-gpio
+	rm -f usrp-e-debug-pins
diff --git a/host/apps/omap_debug/reload-fpga.sh b/host/apps/omap_debug/reload-fpga.sh
new file mode 100755
index 000000000..2754718a4
--- /dev/null
+++ b/host/apps/omap_debug/reload-fpga.sh
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+rmmod usrp_e
+fpga-downloader /home/root/u1e.bin
+modprobe usrp_e
+usrp-e-debug-pins 1
+
diff --git a/host/apps/omap_debug/usrp-e-debug-pins.c b/host/apps/omap_debug/usrp-e-debug-pins.c
new file mode 100644
index 000000000..d4e3f5223
--- /dev/null
+++ b/host/apps/omap_debug/usrp-e-debug-pins.c
@@ -0,0 +1,73 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <fcntl.h>
+#include <string.h>
+#include <sys/ioctl.h>
+
+#include "usrp_e.h"
+#include "usrp_e_regs.hpp"
+
+// Usage: usrp_e_gpio <string>
+
+static int fp;
+
+static int read_reg(__u16 reg)
+{
+	int ret;
+	struct usrp_e_ctl16 d;
+
+	d.offset = reg;
+	d.count = 1;
+	ret = ioctl(fp, USRP_E_READ_CTL16, &d);
+	return d.buf[0];
+}
+
+static void write_reg(__u16 reg, __u16 val)
+{
+	int ret;
+	struct usrp_e_ctl16 d;
+
+	d.offset = reg;
+	d.count = 1;
+	d.buf[0] = val;
+	ret = ioctl(fp, USRP_E_WRITE_CTL16, &d);
+}
+
+int main(int argc, char *argv[])
+{
+	int test;
+
+	test = 0;
+	if (argc < 2) {
+		printf("%s 0|1|off\n", argv[0]);
+	}
+
+        fp = open("/dev/usrp_e0", O_RDWR);
+        printf("fp = %d\n", fp);
+
+	if (strcmp(argv[1], "0") == 0) {
+		printf("Selected 0 based on %s\n", argv[1]);
+		write_reg(UE_REG_GPIO_TX_DDR, 0xFFFF);
+		write_reg(UE_REG_GPIO_RX_DDR, 0xFFFF);
+		write_reg(UE_REG_GPIO_TX_SEL, 0x0);
+		write_reg(UE_REG_GPIO_RX_SEL, 0x0);
+		write_reg(UE_REG_GPIO_TX_DBG, 0xFFFF);
+		write_reg(UE_REG_GPIO_RX_DBG, 0xFFFF);
+	} else if (strcmp(argv[1], "1") == 0) {
+		printf("Selected 1 based on %s\n", argv[1]);
+		write_reg(UE_REG_GPIO_TX_DDR, 0xFFFF);
+		write_reg(UE_REG_GPIO_RX_DDR, 0xFFFF);
+		write_reg(UE_REG_GPIO_TX_SEL, 0xFFFF);
+		write_reg(UE_REG_GPIO_RX_SEL, 0xFFFF);
+		write_reg(UE_REG_GPIO_TX_DBG, 0xFFFF);
+		write_reg(UE_REG_GPIO_RX_DBG, 0xFFFF);
+	} else {
+		printf("Selected off based on %s\n", argv[1]);
+		write_reg(UE_REG_GPIO_TX_DDR, 0x0);
+		write_reg(UE_REG_GPIO_RX_DDR, 0x0);
+	}
+
+	return 0;
+}