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| author | Michael West <michael.west@ettus.com> | 2019-10-07 16:41:15 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2019-10-11 12:26:12 -0700 |
| commit | 4042a319fd29bd5be7b28ce7d3383a2eccaeb7b8 (patch) | |
| tree | dd7920882198ca6f6522c16d6bb36b183b89ef8b | |
| parent | 96dd54c77a50e7b1f3f618ca48f6c41bf95dcf3e (diff) | |
| download | uhd-4042a319fd29bd5be7b28ce7d3383a2eccaeb7b8.tar.gz uhd-4042a319fd29bd5be7b28ce7d3383a2eccaeb7b8.tar.bz2 uhd-4042a319fd29bd5be7b28ce7d3383a2eccaeb7b8.zip | |
N3xx: Remove close-in noise on TX
Some close-in noise was observed on TX when using external references.
This change reduces the noise by changing U19 to select the GPSDO when
references are set to external. Also included is a change to properly
read and apply settings from the configuration file. This allows the
user to further quiet the transmission by adding 'enable_gps=False' to
the configuration file in order to power off the GPSDO.
Signed-off-by: Michael West <michael.west@ettus.com>
| -rw-r--r-- | host/docs/usrp_n3xx.dox | 3 | ||||
| -rw-r--r-- | mpm/python/usrp_mpm/periph_manager/n3xx.py | 5 |
2 files changed, 6 insertions, 2 deletions
diff --git a/host/docs/usrp_n3xx.dox b/host/docs/usrp_n3xx.dox index 052f20ee9..18a8a023b 100644 --- a/host/docs/usrp_n3xx.dox +++ b/host/docs/usrp_n3xx.dox @@ -664,6 +664,9 @@ and time. auto usrp = uhd::usrp::multi_usrp::make( "type=n3xx,clock_source=external,time_source=external"); ``` +To reduce phase noise, it may be necessary to power down the GPSDO when using +an external reference. To do this, just add `enable_gps=False` to the +configuration file in `/etc/uhd/mpm.conf` (see also \ref page_configfiles). Note: When disabling the GPS with `enable_gps=0` in the configuration file, or diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx.py b/mpm/python/usrp_mpm/periph_manager/n3xx.py index cdc58b8cc..2695dbfba 100644 --- a/mpm/python/usrp_mpm/periph_manager/n3xx.py +++ b/mpm/python/usrp_mpm/periph_manager/n3xx.py @@ -225,6 +225,7 @@ class n3xx(ZynqComponents, PeriphManagerBase): # Init peripherals # these peripherals are specific to mboard and # need to configured before applying fpga overlay + args = self._update_default_args(args) self._gpios = TCA6424(int(self.mboard_info['rev'])) self.log.trace("Enabling power of MGT156MHZ clk") self._gpios.set("PWREN-CLK-MGT156MHz") @@ -669,9 +670,9 @@ class n3xx(ZynqComponents, PeriphManagerBase): self._gpios.set("CLK-MAINSEL-GPS") else: # external self._gpios.reset("CLK-MAINSEL-EX_B") - self._gpios.reset("CLK-MAINSEL-GPS") + self._gpios.set("CLK-MAINSEL-GPS") # SKY13350 needs to be in known state - self._gpios.set("CLK-MAINSEL-25MHz") + self._gpios.reset("CLK-MAINSEL-25MHz") self._clock_source = clock_source self.log.debug("Reference clock source is: {}" \ .format(self._clock_source)) |