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authorBrent Stapleton <brent.stapleton@ettus.com>2018-12-13 16:47:39 -0800
committerBrent Stapleton <brent.stapleton@ettus.com>2018-12-17 16:57:10 -0800
commitee369f5f559270725cc85b1fe704d935cd701a6c (patch)
treea4f972d6c848adaa7d7d9166c4b83ce779beaa5d
parent9bb3616af74a055eb38bd424cffdf3a3ca3b1a77 (diff)
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Device3: Set default block control response SIDs
In the block controllers, set the default response SIDs for input and output ports. If we don't do this, the blocks may send their responses to other blocks' responses ports. For example, without this change, the DDC may send an error packet to port 0x0000, which is assigned to the DmaFIFO. With this change, the DDC would send that packet to 0xFFFF, which isn't assigned to any other block.
-rw-r--r--host/lib/rfnoc/block_ctrl_base.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/host/lib/rfnoc/block_ctrl_base.cpp b/host/lib/rfnoc/block_ctrl_base.cpp
index fada105de..ba4db7a61 100644
--- a/host/lib/rfnoc/block_ctrl_base.cpp
+++ b/host/lib/rfnoc/block_ctrl_base.cpp
@@ -103,6 +103,10 @@ block_ctrl_base::block_ctrl_base(
size_t buf_size_bytes = size_t(sr_read64(reg, ctrl_port));
if (buf_size_bytes > 0) n_valid_input_buffers++;
_tree->create<size_t>(_root_path / "input_buffer_size" / ctrl_port).set(buf_size_bytes);
+ // Set default destination SIDs
+ // Otherwise, the default is someone else's SID, which we don't want
+ sr_write(SR_RESP_IN_DST_SID, 0xFFFF, ctrl_port);
+ sr_write(SR_RESP_OUT_DST_SID, 0xFFFF, ctrl_port);
}
/*** Register names *****************************************************/