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author | Michael West <michael.west@ettus.com> | 2019-03-04 17:56:26 -0800 |
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committer | Michael West <michael.west@ettus.com> | 2019-03-05 10:34:34 -0800 |
commit | c8e01d4bd5bef30ef6e6080c60bc8b4706eb1200 (patch) | |
tree | 574f16de4244bff8bfae8de0b991ea1d4d785b21 | |
parent | 7ccc535e10c0e22c59e50a4198e916e920042657 (diff) | |
download | uhd-c8e01d4bd5bef30ef6e6080c60bc8b4706eb1200.tar.gz uhd-c8e01d4bd5bef30ef6e6080c60bc8b4706eb1200.tar.bz2 uhd-c8e01d4bd5bef30ef6e6080c60bc8b4706eb1200.zip |
RFNoC: Remove incorrect flush
Removing the flush in configure_flow_control_out(). The flush is done
incorrectly because it just disables flow control and allows packets
to dump onto the crossbar, which could lock it up. It is also
incorrect to flush when connecting blocks. A connect should just
configure the SID and flow control and let any existing data flow to
the newly connected block. Flushing of a block should only be done
during creation or destruction of the block.
Signed-off-by: Michael West <michael.west@ettus.com>
-rw-r--r-- | host/lib/rfnoc/source_block_ctrl_base.cpp | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/host/lib/rfnoc/source_block_ctrl_base.cpp b/host/lib/rfnoc/source_block_ctrl_base.cpp index 656ab26af..efdf94e9f 100644 --- a/host/lib/rfnoc/source_block_ctrl_base.cpp +++ b/host/lib/rfnoc/source_block_ctrl_base.cpp @@ -102,25 +102,6 @@ void source_block_ctrl_base::configure_flow_control_out(const bool enable_fc_out % buf_size_bytes % unique_id())); } - // Disable flow control entirely and let all upstream data flush out - // We need to do this every time the window is changed because - // a) We don't know what state the flow-control module was left in - // in the previous run (it should still be enabled) - // b) Changing the window size where data is buffered upstream may - // result in stale packets entering the stream. - sr_write(SR_FLOW_CTRL_EN, 0, block_port); - - // Wait for data to flush out. - // In the FPGA we are guaranteed that all buffered packets are more-or-less - // consecutive. 1ms@200MHz = 200,000 cycles of "flush time". 200k cycles = 200k * 8 - // bytes (64 bits) = 1.6MB of data that can be flushed. Typically in the FPGA we have - // buffering in the order of kilobytes so waiting for 1MB to flush is more than enough - // time. - // TODO: Enhancement. We should get feedback from the FPGA about when the - // source_flow_control - // module is done flushing. - std::this_thread::sleep_for(std::chrono::milliseconds(1)); - // Enable source flow control module and conditionally enable byte based and/or packet // count based flow control const bool enable_byte_fc = (buf_size_bytes != 0); |