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authorMark Meserve <mark.meserve@ni.com>2019-05-28 14:24:28 -0500
committermichael-west <michael.west@ettus.com>2019-06-03 18:18:04 -0700
commit5ad3cae70131380a1b18d7ced3e525a76bfa4d41 (patch)
treede263f875cfacd5eb42b51c4feeb56c5fe1beda4
parenta5105c40778b1392b69aafcf889a57c563aa2335 (diff)
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twinrx: increase rev c lo1 charge pump default value
- This change improves spur performance for the Rev C TwinRX daughterboard
-rwxr-xr-xhost/lib/ic_reg_maps/gen_adf5356_regs.py2
-rw-r--r--host/lib/usrp/dboard/db_twinrx.cpp2
2 files changed, 2 insertions, 2 deletions
diff --git a/host/lib/ic_reg_maps/gen_adf5356_regs.py b/host/lib/ic_reg_maps/gen_adf5356_regs.py
index 65517c48e..7c9fce068 100755
--- a/host/lib/ic_reg_maps/gen_adf5356_regs.py
+++ b/host/lib/ic_reg_maps/gen_adf5356_regs.py
@@ -44,7 +44,7 @@ power_down 4[6] 0 disabled, enabled
pd_polarity 4[7] 1 negative, positive
mux_logic 4[8] 1 1_8V, 3_3V
ref_mode 4[9] 0 single, diff
-charge_pump_current 4[10:13] 0 0_30ma, 0_60ma, 0_90ma, 1_20ma, 1_50ma, 1_80ma, 2_10ma, 2_40ma, 2_70ma, 3_00ma, 3_30ma, 3_60ma, 3_90ma, 4_20ma, 4_50ma, 4_80ma
+charge_pump_current 4[10:13] 2 0_30ma, 0_60ma, 0_90ma, 1_20ma, 1_50ma, 1_80ma, 2_10ma, 2_40ma, 2_70ma, 3_00ma, 3_30ma, 3_60ma, 3_90ma, 4_20ma, 4_50ma, 4_80ma
double_buff_div 4[14] 0 disabled, enabled
r_counter_10_bit 4[15:24] 0
reference_divide_by_2 4[25] 0 disabled, enabled
diff --git a/host/lib/usrp/dboard/db_twinrx.cpp b/host/lib/usrp/dboard/db_twinrx.cpp
index bc655ef27..de1cd3f33 100644
--- a/host/lib/usrp/dboard/db_twinrx.cpp
+++ b/host/lib/usrp/dboard/db_twinrx.cpp
@@ -116,7 +116,7 @@ public:
"los/LO1/charge_pump/value",
prepend_ch("los/LO1/charge_pump/desired", _ch_name),
prepend_ch("los/LO1/charge_pump/coerced", _ch_name),
- (get_rx_id() == twinrx::TWINRX_REV_C_ID) ? 0.3e-6 : 0.9375e-6,
+ (get_rx_id() == twinrx::TWINRX_REV_C_ID) ? 0.9e-6 : 0.9375e-6,
AUTO_RESOLVE_ON_READ_WRITE);
// LO2 Charge Pump