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| author | Matt Ettus <matt@ettus.com> | 2011-06-15 16:35:13 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-06-15 16:35:13 -0700 |
| commit | 578df09d342f3b6b35cff09a13241f978971ccac (patch) | |
| tree | 5afccb38fea9e825dcc93d09c1793e1d5ef15311 | |
| parent | 9b3bd071082507fbaeddf3cb890a00a8ea31f3da (diff) | |
| download | uhd-578df09d342f3b6b35cff09a13241f978971ccac.tar.gz uhd-578df09d342f3b6b35cff09a13241f978971ccac.tar.bz2 uhd-578df09d342f3b6b35cff09a13241f978971ccac.zip | |
u1e/u1p: new register map for new dsp
| -rw-r--r-- | usrp2/top/B100/u1plus_core.v | 29 | ||||
| -rw-r--r-- | usrp2/top/E1x0/u1e_core.v | 29 |
2 files changed, 32 insertions, 26 deletions
diff --git a/usrp2/top/B100/u1plus_core.v b/usrp2/top/B100/u1plus_core.v index c703309a0..cc27a3c12 100644 --- a/usrp2/top/B100/u1plus_core.v +++ b/usrp2/top/B100/u1plus_core.v @@ -41,19 +41,22 @@ module u1plus_core localparam RXFIFOSIZE = 11; // 64 total regs in address space - localparam SR_RX_CTRL0 = 0; // 9 regs (+0 to +8) - localparam SR_RX_DSP0 = 16; // 7 regs (+0 to +6) - localparam SR_TX_CTRL = 24; // 6 regs (+0 to +5) - localparam SR_TX_DSP = 32; // 5 regs (+0 to +4) - localparam SR_TIME64 = 40; // 6 regs (+0 to +5) - localparam SR_CLEAR_RX_FIFO = 48; // 1 reg - localparam SR_CLEAR_TX_FIFO = 49; // 1 reg - localparam SR_GLOBAL_RESET = 50; // 1 reg - localparam SR_REG_TEST32 = 52; // 1 reg - localparam SR_RX_FRONT = 0; - localparam SR_RX_CTRL1 = 0; - localparam SR_RX_DSP1 = 0; - localparam SR_TX_FRONT = 0; + localparam SR_RX_CTRL0 = 0; // 9 regs (+0 to +8) + localparam SR_RX_DSP0 = 10; // 4 regs (+0 to +3) + localparam SR_RX_CTRL1 = 16; // 9 regs (+0 to +8) + localparam SR_RX_DSP1 = 26; // 4 regs (+0 to +3) + localparam SR_TX_CTRL = 32; // 4 regs (+0 to +3) + localparam SR_TX_DSP = 38; // 3 regs (+0 to +2) + + localparam SR_TIME64 = 42; // 6 regs (+0 to +5) + localparam SR_RX_FRONT = 48; // 5 regs (+0 to +4) + localparam SR_TX_FRONT = 54; // 5 regs (+0 to +4) + + localparam SR_REG_TEST32 = 60; // 1 reg + localparam SR_CLEAR_RX_FIFO = 61; // 1 reg + localparam SR_CLEAR_TX_FIFO = 62; // 1 reg + localparam SR_GLOBAL_RESET = 63; // 1 reg + wire [7:0] COMPAT_NUM = 8'd4; diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index fc90d3d4e..2c9fc346e 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -43,19 +43,22 @@ module u1e_core localparam RXFIFOSIZE = 13; // 64 total regs in address space - localparam SR_RX_CTRL0 = 0; // 9 regs (+0 to +8) - localparam SR_RX_DSP0 = 16; // 7 regs (+0 to +6) - localparam SR_TX_CTRL = 24; // 6 regs (+0 to +5) - localparam SR_TX_DSP = 32; // 5 regs (+0 to +4) - localparam SR_TIME64 = 40; // 6 regs (+0 to +5) - localparam SR_CLEAR_RX_FIFO = 48; // 1 reg - localparam SR_CLEAR_TX_FIFO = 49; // 1 reg - localparam SR_GLOBAL_RESET = 50; // 1 reg - localparam SR_REG_TEST32 = 52; // 1 reg - localparam SR_RX_FRONT = 0; - localparam SR_RX_CTRL1 = 0; - localparam SR_RX_DSP1 = 0; - localparam SR_TX_FRONT = 0; + localparam SR_RX_CTRL0 = 0; // 9 regs (+0 to +8) + localparam SR_RX_DSP0 = 10; // 4 regs (+0 to +3) + localparam SR_RX_CTRL1 = 16; // 9 regs (+0 to +8) + localparam SR_RX_DSP1 = 26; // 4 regs (+0 to +3) + localparam SR_TX_CTRL = 32; // 4 regs (+0 to +3) + localparam SR_TX_DSP = 38; // 3 regs (+0 to +2) + + localparam SR_TIME64 = 42; // 6 regs (+0 to +5) + localparam SR_RX_FRONT = 48; // 5 regs (+0 to +4) + localparam SR_TX_FRONT = 54; // 5 regs (+0 to +4) + + localparam SR_REG_TEST32 = 60; // 1 reg + localparam SR_CLEAR_RX_FIFO = 61; // 1 reg + localparam SR_CLEAR_TX_FIFO = 62; // 1 reg + localparam SR_GLOBAL_RESET = 63; // 1 reg + wire [7:0] COMPAT_NUM = 8'd4; |