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| author | Martin Braun <martin.braun@ettus.com> | 2017-07-18 10:55:59 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-07-18 11:00:02 -0700 |
| commit | 5501823223ae7648413d3747badf9553bbd71578 (patch) | |
| tree | 86fa756e984e3b53dfbaf58ca69dd1d56d5e1ab1 | |
| parent | 3d5176874f90f9155c1591656df8a7d663b3c712 (diff) | |
| download | uhd-5501823223ae7648413d3747badf9553bbd71578.tar.gz uhd-5501823223ae7648413d3747badf9553bbd71578.tar.bz2 uhd-5501823223ae7648413d3747badf9553bbd71578.zip | |
ubx: Fixed UHD_MSG style log messages
| -rw-r--r-- | host/lib/usrp/dboard/db_ubx.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp index 21308b08c..b4cceac7a 100644 --- a/host/lib/usrp/dboard/db_ubx.cpp +++ b/host/lib/usrp/dboard/db_ubx.cpp @@ -309,7 +309,9 @@ public: try { _iface->set_clock_rate(dboard_iface::UNIT_RX, highest_rate); } catch (const uhd::not_implemented_error &) { - UHD_MSG(warning) << "Unable to set dboard clock rate - phase will vary" << std::endl; + UHD_LOG_WARNING("UBX", + "Unable to set dboard clock rate - phase will vary" + ); can_set_clock_rate = false; } _rx_target_pfd_freq = highest_rate; @@ -326,7 +328,9 @@ public: try { _iface->set_clock_rate(dboard_iface::UNIT_TX, highest_rate); } catch (const uhd::not_implemented_error &) { - UHD_MSG(warning) << "Unable to set dboard clock rate - phase will vary" << std::endl; + UHD_LOG_WARNING("UBX", + "Unable to set dboard clock rate - phase will vary" + ); } _tx_target_pfd_freq = highest_rate; } |