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| author | fenggnef <lifenggnefil@gmail.com> | 2017-08-11 20:45:42 +0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-08-01 15:49:41 -0700 |
| commit | 47f12a1e9c75bf05fcb06fbc885f9b93848188a9 (patch) | |
| tree | 8285a1d2d317c782542a5342b113febc178d2669 | |
| parent | 6e247c002c7d8a93ac569b5728064b445c7f2925 (diff) | |
| download | uhd-47f12a1e9c75bf05fcb06fbc885f9b93848188a9.tar.gz uhd-47f12a1e9c75bf05fcb06fbc885f9b93848188a9.tar.bz2 uhd-47f12a1e9c75bf05fcb06fbc885f9b93848188a9.zip | |
Definitions of MASK_GPIO_SHDN_SW and GPIO_AUX_PWR_ON Errors
MASK_GPIO_SHDN_SW ( GPIO[52] ) should be shifted by "GPIO_SHDN_SW" but "GPIO_FX3_SCLK ".
Otherwise GPIOs of FX3 will initial GPIO_FX3_SCLK ( GPIO[53] ) as GPIO and SPI respectively.
It will make GPIO[53] conflict between SPI and GPIO, and SHDN_SW will not work properly as a power switch.
| -rw-r--r-- | firmware/fx3/b200/b200_main.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/fx3/b200/b200_main.h b/firmware/fx3/b200/b200_main.h index 453e7034a..ddcc504b5 100644 --- a/firmware/fx3/b200/b200_main.h +++ b/firmware/fx3/b200/b200_main.h @@ -32,8 +32,8 @@ * that GPIOs < 32 are configured without the use of masks. */ #define MASK_GPIO_PROGRAM_B (uint32_t)(1 << (GPIO_PROGRAM_B - 32)) #define MASK_GPIO_INIT_B (uint32_t)(1 << (GPIO_INIT_B - 32)) -#define MASK_GPIO_AUX_PWR_ON (uint32_t)(1 << (GPIO_FX3_SCLK - 32)) -#define MASK_GPIO_SHDN_SW (uint32_t)(1 << (GPIO_FX3_SCLK - 32)) +#define MASK_GPIO_AUX_PWR_ON (uint32_t)(1 << (GPIO_AUX_PWR_ON - 32)) +#define MASK_GPIO_SHDN_SW (uint32_t)(1 << (GPIO_SHDN_SW - 32)) #define MASK_GPIO_FX3_SCLK (uint32_t)(1 << (GPIO_FX3_SCLK - 32)) #define MASK_GPIO_FX3_CE (uint32_t)(1 << (GPIO_FX3_CE - 32)) #define MASK_GPIO_FX3_MISO (uint32_t)(1 << (GPIO_FX3_MISO - 32)) |