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author | Martin Braun <martin.braun@ettus.com> | 2017-04-03 15:51:29 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2017-04-03 15:53:01 -0700 |
commit | 47d5f6651a05714f0cad55bd4c225a049abd5ef8 (patch) | |
tree | e25528ae46c37e7794cc816b7d26181a34b59fb5 | |
parent | 47672ede5034df17bdc2f314f4e3b7afa8622bda (diff) | |
download | uhd-47d5f6651a05714f0cad55bd4c225a049abd5ef8.tar.gz uhd-47d5f6651a05714f0cad55bd4c225a049abd5ef8.tar.bz2 uhd-47d5f6651a05714f0cad55bd4c225a049abd5ef8.zip |
Updated FPGA images packages and fpga-src submodule pointer
- Main fix: X3x0 output FIFO size
m--------- | fpga-src | 0 | ||||
-rw-r--r-- | host/CMakeLists.txt | 4 |
2 files changed, 2 insertions, 2 deletions
diff --git a/fpga-src b/fpga-src -Subproject 3212f77ffbc8672d044372241771a25a225a0cc +Subproject e69dc9e014773aa5ed70d0757908d5de784a2de diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt index 30a05ef9c..069a0c973 100644 --- a/host/CMakeLists.txt +++ b/host/CMakeLists.txt @@ -341,8 +341,8 @@ UHD_INSTALL(FILES #{{{IMG_SECTION # This section is written automatically by /images/create_imgs_package.py # Any manual changes in here will be overwritten. -SET(UHD_IMAGES_MD5SUM "53a1ea139d8344fec9914f05db79bdd0") -SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.001.001-7-g63fcfb95.zip") +SET(UHD_IMAGES_MD5SUM "487beb2dd2477ad90f9b21399931979c") +SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.001.001-27-g47672ede.zip") #}}} ######################################################################## |