X3xx: Updated firmware to support reading FPGA image data

2 files changed, 56 insertions, 1 deletions

diff --git a/firmware/usrp3/x300/x300_main.c b/firmware/usrp3/x300/x300_main.c
index 459f7b0b1..3de9283eb 100644
--- a/firmware/usrp3/x300/x300_main.c
+++ b/firmware/usrp3/x300/x300_main.c
@@ -1,4 +1,4 @@
-// Copyright 2013-2014 Ettus Research LLC
+// Copyright 2013-2017 Ettus Research
 
 #include "x300_init.h"
 #include "x300_defs.h"
@@ -188,6 +188,44 @@ void handle_udp_fpga_prog(
 }
 
 /***********************************************************************
+ * Handler for FPGA image reading packets
+ **********************************************************************/
+void handle_udp_fpga_read(
+    const uint8_t ethno,
+    const struct ip_addr *src, const struct ip_addr *dst,
+    const uint16_t src_port, const uint16_t dst_port,
+    const void *buff, const size_t num_bytes
+)
+{
+    const x300_fpga_read_t *request = (const x300_fpga_read_t *) buff;
+    x300_fpga_read_reply_t reply = {0};
+    bool status = true;
+
+    if (buff == NULL) {
+        return;
+    } else if (num_bytes < offsetof(x300_fpga_read_t, size)) {
+        reply.flags |= X300_FPGA_READ_FLAGS_ERROR;
+    } else {
+        if (request->flags & X300_FPGA_READ_FLAGS_INIT) {
+            STATUS_MERGE(chinch_flash_init(), status);
+        } else if (request->flags & X300_FPGA_READ_FLAGS_CLEANUP) {
+            chinch_flash_cleanup();
+        } else {
+            reply.flags |= X300_FPGA_READ_FLAGS_ACK;
+            reply.sector = request->sector;
+            reply.index  = request->index;
+            reply.size   = request->size;
+
+            STATUS_MERGE(chinch_flash_select_sector(request->sector), status);
+            STATUS_MERGE(chinch_flash_read_buf(request->index*2, reply.data, request->size), status);
+        }
+    }
+
+    if (!status) reply.flags |= X300_FPGA_READ_FLAGS_ERROR;
+    u3_net_stack_send_udp_pkt(ethno, src, dst_port, src_port, &reply, sizeof(reply));
+}
+
+/***********************************************************************
  * Handler for MTU detection
  **********************************************************************/
 void handle_udp_mtu_detect(
@@ -411,6 +449,7 @@ int main(void)
     u3_net_stack_register_udp_handler(X300_FW_COMMS_UDP_PORT, &handle_udp_fw_comms);
     u3_net_stack_register_udp_handler(X300_VITA_UDP_PORT, &handle_udp_prog_framer);
     u3_net_stack_register_udp_handler(X300_FPGA_PROG_UDP_PORT, &handle_udp_fpga_prog);
+    u3_net_stack_register_udp_handler(X300_FPGA_READ_UDP_PORT, &handle_udp_fpga_read);
     u3_net_stack_register_udp_handler(X300_MTU_DETECT_UDP_PORT, &handle_udp_mtu_detect);
 
     uint32_t last_cronjob = 0;
diff --git a/host/lib/usrp/x300/x300_fw_common.h b/host/lib/usrp/x300/x300_fw_common.h
index b83449666..56b457791 100644
--- a/host/lib/usrp/x300/x300_fw_common.h
+++ b/host/lib/usrp/x300/x300_fw_common.h
@@ -61,6 +61,7 @@ extern "C" {
 #define X300_GPSDO_UDP_PORT 49156
 #define X300_FPGA_PROG_UDP_PORT 49157
 #define X300_MTU_DETECT_UDP_PORT 49158
+#define X300_FPGA_READ_UDP_PORT 49159
 
 #define X300_DEFAULT_MAC_ADDR_0         {0x00, 0x50, 0xC2, 0x85, 0x3f, 0xff}
 #define X300_DEFAULT_MAC_ADDR_1         {0x00, 0x50, 0xC2, 0x85, 0x3f, 0x33}
@@ -91,6 +92,11 @@ extern "C" {
 #define X300_FPGA_PROG_CONFIGURE       (1 << 6)
 #define X300_FPGA_PROG_CONFIG_STATUS   (1 << 7)
 
+#define X300_FPGA_READ_FLAGS_ACK       (1 << 0)
+#define X300_FPGA_READ_FLAGS_ERROR     (1 << 1)
+#define X300_FPGA_READ_FLAGS_INIT      (1 << 2)
+#define X300_FPGA_READ_FLAGS_CLEANUP   (1 << 3)
+
 #define X300_MTU_DETECT_ECHO_REQUEST (1 << 0)
 #define X300_MTU_DETECT_ECHO_REPLY (1 << 1)
 #define X300_MTU_DETECT_ERROR (1 << 2)
@@ -144,6 +150,16 @@ typedef struct
 typedef struct
 {
     uint32_t flags;
+    uint32_t sector;
+    uint32_t index;
+    uint32_t size;
+} x300_fpga_read_t;
+
+typedef x300_fpga_prog_t x300_fpga_read_reply_t;
+
+typedef struct
+{
+    uint32_t flags;
     uint32_t size;
 } x300_mtu_t;