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authorTrung N Tran <trung.tran@ettus.com>2017-07-27 12:06:58 -0700
committerMartin Braun <martin.braun@ettus.com>2017-12-22 15:04:00 -0800
commit1db37316ebe81786671739e6e297b2d47c9f4807 (patch)
treed99bce6f4f3bb643b3dc705d0c2783283f3b9b37
parentfad37e577d4fb6f0ff976fba46c40647d8e5a7f5 (diff)
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n3xx: enable all pins on tca6424
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n310.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/n310.py b/mpm/python/usrp_mpm/periph_manager/n310.py
index 6ab151454..f51762e52 100644
--- a/mpm/python/usrp_mpm/periph_manager/n310.py
+++ b/mpm/python/usrp_mpm/periph_manager/n310.py
@@ -69,7 +69,7 @@ class TCA6424(object):
)
def __init__(self):
- self._gpios = SysFSGPIO('tca6424', 0x700, 0x700)
+ self._gpios = SysFSGPIO('tca6424',0xFFE7FF, 0x86E7FF)
def set(self, name):
"""
@@ -124,6 +124,7 @@ class n310(PeriphManagerBase):
# Initialize reference clock
self._gpios.set("PWREN-CLK-MAINREF")
+ self._gpios.set("PWREN-CLK-MGT156MHz")
self._ext_clock_freq = float(
args.default_args.get('ext_clock_freq', N3XX_DEFAULT_EXT_CLOCK_FREQ)
)