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author | Martin Braun <martin.braun@ettus.com> | 2017-11-28 13:49:26 -0800 |
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committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:05:07 -0800 |
commit | 064faf09c37e1852186477152e6f5a3251074d0e (patch) | |
tree | 1d2b1d5574547e8cfbeb3e65d541d5cd7253bf97 | |
parent | ee00c0384e6158766a12fe7806375433dddca7a2 (diff) | |
download | uhd-064faf09c37e1852186477152e6f5a3251074d0e.tar.gz uhd-064faf09c37e1852186477152e6f5a3251074d0e.tar.bz2 uhd-064faf09c37e1852186477152e6f5a3251074d0e.zip |
mpm: mg: Fix linter errors, compacted SPI factories
-rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/magnesium.py | 43 |
1 files changed, 16 insertions, 27 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium.py b/mpm/python/usrp_mpm/dboard_manager/magnesium.py index 2a33c3411..d5cec3cce 100644 --- a/mpm/python/usrp_mpm/dboard_manager/magnesium.py +++ b/mpm/python/usrp_mpm/dboard_manager/magnesium.py @@ -39,39 +39,28 @@ def create_spidev_iface_lmk(dev_node): """ Create a regs iface from a spidev node """ - SPI_SPEED_HZ = 1000000 - SPI_MODE = 3 - SPI_ADDR_SHIFT = 8 - SPI_DATA_SHIFT = 0 - SPI_READ_FLAG = 1<<23 - SPI_WRIT_FLAG = 0 return lib.spi.make_spidev_regs_iface( - dev_node, - SPI_SPEED_HZ, - SPI_MODE, - SPI_ADDR_SHIFT, - SPI_DATA_SHIFT, - SPI_READ_FLAG, - SPI_WRIT_FLAG + str(dev_node), + 1000000, # Speed (Hz) + 3, # SPI mode + 8, # Addr shift + 0, # Data shift + 1<<23, # Read flag + 0, # Write flag ) + def create_spidev_iface_cpld(dev_node): """ Create a regs iface from a spidev node """ - SPI_SPEED_HZ = 1000000 - SPI_MODE = 0 - SPI_ADDR_SHIFT = 16 - SPI_DATA_SHIFT = 0 - SPI_READ_FLAG = 1<<23 - SPI_WRIT_FLAG = 0 return lib.spi.make_spidev_regs_iface( - dev_node, - SPI_SPEED_HZ, - SPI_MODE, - SPI_ADDR_SHIFT, - SPI_DATA_SHIFT, - SPI_READ_FLAG, - SPI_WRIT_FLAG + str(dev_node), + 1000000, # Speed (Hz) + 0, # SPI mode + 16, # Addr shift + 0, # Data shift + 1<<23, # Read flag + 0, # Write flag ) def create_spidev_iface_phasedac(dev_node): @@ -84,7 +73,7 @@ def create_spidev_iface_phasedac(dev_node): 1, # SPI mode 16, # Addr shift 0, # Data shift - 0, # Read flag + 0, # Read flag (phase DAC is write-only) 0, # Write flag ) |