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author | Sugandha Gupta <sugandha.gupta@ettus.com> | 2018-04-12 16:55:39 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2018-04-12 18:41:23 -0700 |
commit | 002cec940c7d8c373ab7062c0abdc4b38e23a10c (patch) | |
tree | 34bf5a4c93d5576b0c45588a42da0be54ecd3f56 | |
parent | 77b87095da830558d26d0832fc08b3320f564f12 (diff) | |
download | uhd-002cec940c7d8c373ab7062c0abdc4b38e23a10c.tar.gz uhd-002cec940c7d8c373ab7062c0abdc4b38e23a10c.tar.bz2 uhd-002cec940c7d8c373ab7062c0abdc4b38e23a10c.zip |
adf4002: Fixed register programming for power down bit
The bit shift for power down is one off with respect to the
ADF4001/ADF4002 data sheet
-rw-r--r-- | host/lib/usrp/common/adf4001_ctrl.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/common/adf4001_ctrl.cpp b/host/lib/usrp/common/adf4001_ctrl.cpp index 138ca7f81..85a13455f 100644 --- a/host/lib/usrp/common/adf4001_ctrl.cpp +++ b/host/lib/usrp/common/adf4001_ctrl.cpp @@ -59,7 +59,7 @@ uint32_t adf4001_regs_t::get_reg(uint8_t addr) { reg |= (uint32_t(timer_counter_control) & 0x00000F) << 11; reg |= (uint32_t(charge_pump_current_1) & 0x000007) << 15; reg |= (uint32_t(charge_pump_current_2) & 0x000007) << 18; - reg |= (uint32_t(power_down) & 0x000002) << 21; + reg |= (uint32_t(power_down) & 0x000002) << 20; break; case 3: reg |= (uint32_t(counter_reset) & 0x000001) << 2; |