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author | Julian Arnold <julian.arnold@ettus.com> | 2015-03-12 10:19:08 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2015-03-13 09:29:31 -0700 |
commit | 306b5243e12af0db493856ad8397abac9835db0c (patch) | |
tree | def117a8e5ccee73f914a314c17089ea3bb26bc1 | |
parent | 04f71c29d27b16ec6a9b37ad18317bf8a3a83112 (diff) | |
download | uhd-306b5243e12af0db493856ad8397abac9835db0c.tar.gz uhd-306b5243e12af0db493856ad8397abac9835db0c.tar.bz2 uhd-306b5243e12af0db493856ad8397abac9835db0c.zip |
ad9361: DC and IQ correction only done if df > 100MHz during a tune request
-rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_device.cpp | 19 | ||||
-rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_device.h | 2 |
2 files changed, 15 insertions, 6 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index ba66769dd..92ad0ee3f 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -80,6 +80,7 @@ int get_num_taps(int max_num_taps) { const double ad9361_device_t::AD9361_MAX_GAIN = 89.75; const double ad9361_device_t::AD9361_MAX_CLOCK_RATE = 61.44e6; const double ad9361_device_t::AD9361_RECOMMENDED_MAX_CLOCK_RATE = 56e6; +const double ad9361_device_t::AD9361_CAL_VALID_WINDOW = 100e6; /* Program either the RX or TX FIR filter. * @@ -1455,6 +1456,7 @@ void ad9361_device_t::initialize() _rx2_agc_mode = GAIN_MODE_SLOW_AGC; _rx1_agc_enable = false; _rx2_agc_enable = false; + _last_calibration_freq = -AD9361_CAL_VALID_WINDOW; /* Reset the device. */ _io_iface->poke8(0x000, 0x01); @@ -1890,12 +1892,17 @@ double ad9361_device_t::tune(direction_t direction, const double value) /* Update the gain settings. */ _reprogram_gains(); - /* Run the calibration algorithms. */ - _calibrate_baseband_dc_offset(); - _calibrate_rf_dc_offset(); - _calibrate_tx_quadrature(); - _calibrate_rx_quadrature(); - _configure_bb_rf_dc_tracking(_use_dc_offset_correction); //if this is not done here, bb dc offset is not good + /* Only run the following calibrations if we are more than 100MHz away + * from the previous calibration point. */ + if (std::abs(_last_calibration_freq - tune_freq) > AD9361_CAL_VALID_WINDOW) { + /* Run the calibration algorithms. */ + _calibrate_rf_dc_offset(); + _calibrate_tx_quadrature(); + _calibrate_rx_quadrature(); + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); + _last_calibration_freq = tune_freq; + } + /* If we were in the FDD state, return it now. */ if (not_in_alert) { _io_iface->poke8(0x014, 0x21); diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 1cfff9971..7c53ff0c4 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -89,6 +89,7 @@ public: static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; static const double AD9361_RECOMMENDED_MAX_CLOCK_RATE; + static const double AD9361_CAL_VALID_WINDOW; private: //Methods void _program_fir_filter(direction_t direction, int num_taps, boost::uint16_t *coeffs); @@ -134,6 +135,7 @@ private: //Members ad9361_io::sptr _io_iface; //Intermediate state double _rx_freq, _tx_freq, _req_rx_freq, _req_tx_freq; + double _last_calibration_freq; double _baseband_bw, _bbpll_freq, _adcclock_freq; double _req_clock_rate, _req_coreclk; boost::uint16_t _rx_bbf_tunediv; |