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| author | Matt Ettus <matt@ettus.com> | 2010-02-23 19:56:09 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-02-23 19:56:09 -0800 |
| commit | 904b35c689d38694913606c569a9d324533ff765 (patch) | |
| tree | 955d329ab99cc61574b047e765061290c44d2a3e | |
| parent | 023e573868c55a08b4b097ca2451945dbe546cec (diff) | |
| download | uhd-904b35c689d38694913606c569a9d324533ff765.tar.gz uhd-904b35c689d38694913606c569a9d324533ff765.tar.bz2 uhd-904b35c689d38694913606c569a9d324533ff765.zip | |
proper initialization of the ram
| -rw-r--r-- | .gitignore | 1 | ||||
| -rw-r--r-- | usrp2/control_lib/ram_2port.v | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/.gitignore b/.gitignore index 74c36c862..b275f0e49 100644 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,3 @@ *~ \#*\# +a.out diff --git a/usrp2/control_lib/ram_2port.v b/usrp2/control_lib/ram_2port.v index 6c8332b9c..3716a7c8a 100644 --- a/usrp2/control_lib/ram_2port.v +++ b/usrp2/control_lib/ram_2port.v @@ -21,7 +21,7 @@ module ram_2port integer i; initial for(i=0;i<(1<<AWIDTH);i=i+1) - ram[i] <= {AWIDTH{1'b0}}; + ram[i] <= {DWIDTH{1'b0}}; always @(posedge clka) begin if (ena) |