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authorMatt Ettus <matt@ettus.com>2011-05-12 21:18:25 -0700
committerMatt Ettus <matt@ettus.com>2011-06-08 10:52:52 -0700
commit3a4e028a9e96109f4bfacce48b15349833b9e229 (patch)
tree3dd89da94721fadaf8d5cf8f1a70958a696a1cb1
parent2edca948d0a43159138b3754c49a26e0dae562a1 (diff)
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dsp: add resets for simulation purposes
-rw-r--r--usrp2/sdr_lib/dsp_core_rx.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/usrp2/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index cd3e7cc22..ca1e0d5b4 100644
--- a/usrp2/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
@@ -124,10 +124,10 @@ module dsp_core_rx
wire strobe_cic_d1;
round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_icic
- (.clk(clk),. in(i_cic), .strobe_in(strobe_cic), .out(i_cic_scaled), .strobe_out(strobe_cic_d1));
+ (.clk(clk),.reset(rst), .in(i_cic), .strobe_in(strobe_cic), .out(i_cic_scaled), .strobe_out(strobe_cic_d1));
round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_qcic
- (.clk(clk), .in(q_cic), .strobe_in(strobe_cic), .out(q_cic_scaled), .strobe_out());
+ (.clk(clk),.reset(rst), .in(q_cic), .strobe_in(strobe_cic), .out(q_cic_scaled), .strobe_out());
small_hb_dec #(.WIDTH(18)) small_hb_i
(.clk(clk),.rst(rst),.bypass(~enable_hb1),.run(run),
@@ -147,10 +147,10 @@ module dsp_core_rx
.stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
round_sd #(.WIDTH_IN(18),.WIDTH_OUT(16)) round_iout
- (.clk(clk), .in(i_hb2), .strobe_in(strobe_hb2), .out(i_out), .strobe_out(strobe));
+ (.clk(clk), .reset(rst), .in(i_hb2), .strobe_in(strobe_hb2), .out(i_out), .strobe_out(strobe));
round_sd #(.WIDTH_IN(18),.WIDTH_OUT(16)) round_qout
- (.clk(clk), .in(q_hb2), .strobe_in(strobe_hb2), .out(q_out), .strobe_out());
+ (.clk(clk), .reset(rst), .in(q_hb2), .strobe_in(strobe_hb2), .out(q_out), .strobe_out());
assign sample = {i_out,q_out};
assign debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, strobe_cic_d1, strobe_hb1, strobe_hb2};