usrp-e: use clock control to get clock rate, removed temporary constant

5 files changed, 18 insertions, 27 deletions

diff --git a/host/lib/usrp/usrp_e/dsp_impl.cpp b/host/lib/usrp/usrp_e/dsp_impl.cpp
index 9312bb603..97f173c1a 100644
--- a/host/lib/usrp/usrp_e/dsp_impl.cpp
+++ b/host/lib/usrp/usrp_e/dsp_impl.cpp
@@ -65,11 +65,11 @@ void usrp_e_impl::rx_ddc_get(const wax::obj &key_, wax::obj &val){
         return;
 
     case DSP_PROP_CODEC_RATE:
-        val = MASTER_CLOCK_RATE;
+        val = _clock_ctrl->get_fpga_clock_rate();
         return;
 
     case DSP_PROP_HOST_RATE:
-        val = MASTER_CLOCK_RATE/_ddc_decim;
+        val = _clock_ctrl->get_fpga_clock_rate()/_ddc_decim;
         return;
 
     default: UHD_THROW_PROP_GET_ERROR();
@@ -87,7 +87,7 @@ void usrp_e_impl::rx_ddc_set(const wax::obj &key_, const wax::obj &val){
     case DSP_PROP_FREQ_SHIFT:{
             double new_freq = val.as<double>();
             _iface->poke32(UE_REG_DSP_RX_FREQ,
-                dsp_type1::calc_cordic_word_and_update(new_freq, MASTER_CLOCK_RATE)
+                dsp_type1::calc_cordic_word_and_update(new_freq, _clock_ctrl->get_fpga_clock_rate())
             );
             _ddc_freq = new_freq; //shadow
         }
@@ -95,7 +95,7 @@ void usrp_e_impl::rx_ddc_set(const wax::obj &key_, const wax::obj &val){
 
     case DSP_PROP_HOST_RATE:{
             //set the decimation
-            _ddc_decim = rint(MASTER_CLOCK_RATE/val.as<double>());
+            _ddc_decim = rint(_clock_ctrl->get_fpga_clock_rate()/val.as<double>());
             _iface->poke32(UE_REG_DSP_RX_DECIM_RATE, dsp_type1::calc_cic_filter_word(_ddc_decim));
 
             //set the scaling
@@ -148,11 +148,11 @@ void usrp_e_impl::tx_duc_get(const wax::obj &key_, wax::obj &val){
         return;
 
     case DSP_PROP_CODEC_RATE:
-        val = MASTER_CLOCK_RATE;
+        val = _clock_ctrl->get_fpga_clock_rate();
         return;
 
     case DSP_PROP_HOST_RATE:
-        val = MASTER_CLOCK_RATE/_duc_interp;
+        val = _clock_ctrl->get_fpga_clock_rate()/_duc_interp;
         return;
 
     default: UHD_THROW_PROP_GET_ERROR();
@@ -170,14 +170,14 @@ void usrp_e_impl::tx_duc_set(const wax::obj &key_, const wax::obj &val){
     case DSP_PROP_FREQ_SHIFT:{
             double new_freq = val.as<double>();
             _iface->poke32(UE_REG_DSP_TX_FREQ,
-                dsp_type1::calc_cordic_word_and_update(new_freq, MASTER_CLOCK_RATE)
+                dsp_type1::calc_cordic_word_and_update(new_freq, _clock_ctrl->get_fpga_clock_rate())
             );
             _duc_freq = new_freq; //shadow
         }
         return;
 
     case DSP_PROP_HOST_RATE:{
-            _duc_interp = rint(MASTER_CLOCK_RATE/val.as<double>());
+            _duc_interp = rint(_clock_ctrl->get_fpga_clock_rate()/val.as<double>());
 
             //set the interpolation
             _iface->poke32(UE_REG_DSP_TX_INTERP_RATE, dsp_type1::calc_cic_filter_word(_duc_interp));
diff --git a/host/lib/usrp/usrp_e/io_impl.cpp b/host/lib/usrp/usrp_e/io_impl.cpp
index d89a7db07..9996e7172 100644
--- a/host/lib/usrp/usrp_e/io_impl.cpp
+++ b/host/lib/usrp/usrp_e/io_impl.cpp
@@ -73,7 +73,7 @@ struct usrp_e_impl::io_impl{
     }
 
     //a pirate's life is the life for me!
-    void recv_pirate_loop();
+    void recv_pirate_loop(usrp_e_clock_ctrl::sptr);
     typedef bounded_buffer<managed_recv_buffer::sptr> recv_booty_type;
     recv_booty_type::sptr recv_pirate_booty;
     bounded_buffer<async_metadata_t>::sptr async_msg_fifo;
@@ -86,9 +86,8 @@ struct usrp_e_impl::io_impl{
  * - while raiding, loot for recv buffers
  * - put booty into the alignment buffer
  **********************************************************************/
-void usrp_e_impl::io_impl::recv_pirate_loop(
-
-){
+void usrp_e_impl::io_impl::recv_pirate_loop(usrp_e_clock_ctrl::sptr clock_ctrl)
+{
     set_thread_priority_safe();
     recv_pirate_crew_raiding = true;
 
@@ -119,7 +118,7 @@ void usrp_e_impl::io_impl::recv_pirate_loop(
                 metadata.channel = 0;
                 metadata.has_time_spec = if_packet_info.has_tsi and if_packet_info.has_tsf;
                 metadata.time_spec = time_spec_t(
-                    time_t(if_packet_info.tsi), size_t(if_packet_info.tsf), MASTER_CLOCK_RATE
+                    time_t(if_packet_info.tsi), size_t(if_packet_info.tsf), clock_ctrl->get_fpga_clock_rate()
                 );
                 metadata.event_code = vrt_packet_handler::get_context_code<async_metadata_t::event_code_t>(vrt_hdr, if_packet_info);
 
@@ -172,7 +171,7 @@ void usrp_e_impl::io_init(void){
 
     //spawn a pirate, yarrr!
     _io_impl->recv_pirate_crew.create_thread(boost::bind(
-        &usrp_e_impl::io_impl::recv_pirate_loop, _io_impl.get()
+        &usrp_e_impl::io_impl::recv_pirate_loop, _io_impl.get(), _clock_ctrl
     ));
 }
 
@@ -182,7 +181,7 @@ void usrp_e_impl::issue_stream_cmd(const stream_cmd_t &stream_cmd){
         stream_cmd, get_max_recv_samps_per_packet()
     ));
     _iface->poke32(UE_REG_CTRL_RX_TIME_SECS,  boost::uint32_t(stream_cmd.time_spec.get_full_secs()));
-    _iface->poke32(UE_REG_CTRL_RX_TIME_TICKS, stream_cmd.time_spec.get_tick_count(MASTER_CLOCK_RATE));
+    _iface->poke32(UE_REG_CTRL_RX_TIME_TICKS, stream_cmd.time_spec.get_tick_count(_clock_ctrl->get_fpga_clock_rate()));
 }
 
 void usrp_e_impl::handle_overrun(size_t){
@@ -226,7 +225,7 @@ size_t usrp_e_impl::send(
         buffs, num_samps,                          //buffer to fill
         metadata, send_mode,                       //samples metadata
         io_type, _send_otw_type,                   //input and output types to convert
-        MASTER_CLOCK_RATE,                         //master clock tick rate
+        _clock_ctrl->get_fpga_clock_rate(),        //master clock tick rate
         uhd::transport::vrt::if_hdr_pack_le,
         boost::bind(&get_send_buffs, _io_impl->data_xport, timeout, _1),
         get_max_send_samps_per_packet()
@@ -258,7 +257,7 @@ size_t usrp_e_impl::recv(
         buffs, num_samps,                          //buffer to fill
         metadata, recv_mode,                       //samples metadata
         io_type, _recv_otw_type,                   //input and output types to convert
-        MASTER_CLOCK_RATE,                         //master clock tick rate
+        _clock_ctrl->get_fpga_clock_rate(),        //master clock tick rate
         uhd::transport::vrt::if_hdr_unpack_le,
         boost::bind(&usrp_e_impl::io_impl::get_recv_buffs, _io_impl.get(), _1, timeout),
         boost::bind(&usrp_e_impl::handle_overrun, this, _1)
diff --git a/host/lib/usrp/usrp_e/mboard_impl.cpp b/host/lib/usrp/usrp_e/mboard_impl.cpp
index 3d4cef069..f0118aa4b 100644
--- a/host/lib/usrp/usrp_e/mboard_impl.cpp
+++ b/host/lib/usrp/usrp_e/mboard_impl.cpp
@@ -125,7 +125,7 @@ void usrp_e_impl::mboard_set(const wax::obj &key, const wax::obj &val){
     case MBOARD_PROP_TIME_NOW:
     case MBOARD_PROP_TIME_NEXT_PPS:{
             time_spec_t time_spec = val.as<time_spec_t>();
-            _iface->poke32(UE_REG_TIME64_TICKS, time_spec.get_tick_count(MASTER_CLOCK_RATE));
+            _iface->poke32(UE_REG_TIME64_TICKS, time_spec.get_tick_count(_clock_ctrl->get_fpga_clock_rate()));
             boost::uint32_t imm_flags = (key.as<mboard_prop_t>() == MBOARD_PROP_TIME_NOW)? 1 : 0;
             _iface->poke32(UE_REG_TIME64_IMM, imm_flags);
             _iface->poke32(UE_REG_TIME64_SECS, time_spec.get_full_secs());
diff --git a/host/lib/usrp/usrp_e/usrp_e_impl.cpp b/host/lib/usrp/usrp_e/usrp_e_impl.cpp
index 0a7295ff9..1b71c0a52 100644
--- a/host/lib/usrp/usrp_e/usrp_e_impl.cpp
+++ b/host/lib/usrp/usrp_e/usrp_e_impl.cpp
@@ -71,10 +71,6 @@ static device_addrs_t usrp_e_find(const device_addr_t &hint){
  **********************************************************************/
 static device::sptr usrp_e_make(const device_addr_t &device_addr){
 
-    //The fpga is loaded when:
-    // 1) The compatibility number matches.
-    // 2) The hash in the hash-file matches.
-
     //setup the main interface into fpga
     std::string node = device_addr["node"];
     std::cout << boost::format("Opening USRP-E on %s") % node << std::endl;
@@ -86,6 +82,7 @@ static device::sptr usrp_e_make(const device_addr_t &device_addr){
     //--   1) The compatibility number matches.
     //--   2) The hash in the hash-file matches.
     //------------------------------------------------------------------
+    static const char *hash_file_path = "/tmp/usrp_e100_hash";
 
     //extract the fpga path for usrp-e
     std::string usrp_e_fpga_image = find_image_path(
diff --git a/host/lib/usrp/usrp_e/usrp_e_impl.hpp b/host/lib/usrp/usrp_e/usrp_e_impl.hpp
index 421a9623d..e55b46b80 100644
--- a/host/lib/usrp/usrp_e/usrp_e_impl.hpp
+++ b/host/lib/usrp/usrp_e/usrp_e_impl.hpp
@@ -30,8 +30,6 @@
 #ifndef INCLUDED_USRP_E_IMPL_HPP
 #define INCLUDED_USRP_E_IMPL_HPP
 
-static const double MASTER_CLOCK_RATE = 64e6; //TODO get from clock control
-static const char *hash_file_path = "/tmp/usrp_e100_hash";
 static const boost::uint16_t USRP_E_COMPAT_NUM = 0x02;
 
 //! load an fpga image from a bin file into the usrp-e fpga
@@ -100,9 +98,6 @@ private:
     //interface to ioctls and file descriptor
     usrp_e_iface::sptr _iface;
 
-    //FIXME fetch from ioctl?
-    static const size_t _max_num_samples = 2048/sizeof(boost::uint32_t);
-
     //handle io stuff
     UHD_PIMPL_DECL(io_impl) _io_impl;
     uhd::otw_type_t _send_otw_type, _recv_otw_type;