U2P: Bootloader works, successfully loads production image.

Split I2C into async and sync halves to keep the size of the bootloader small.

10 files changed, 270 insertions, 202 deletions

diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c
index 44be2cc9c..482332f7c 100644
--- a/firmware/microblaze/apps/txrx_uhd.c
+++ b/firmware/microblaze/apps/txrx_uhd.c
@@ -42,6 +42,7 @@
 #include <string.h>
 #include "clocks.h"
 #include "usrp2/fw_common.h"
+#include <i2c_async.h>
 #include <i2c.h>
 #include <ethertype.h>
 #include <arp_cache.h>
diff --git a/firmware/microblaze/lib/Makefile.inc b/firmware/microblaze/lib/Makefile.inc
index ae123f531..349ff2cd0 100644
--- a/firmware/microblaze/lib/Makefile.inc
+++ b/firmware/microblaze/lib/Makefile.inc
@@ -32,6 +32,7 @@ COMMON_SRCS = \
 	$(top_srcdir)/lib/hal_io.c \
 	$(top_srcdir)/lib/hal_uart.c \
 	$(top_srcdir)/lib/i2c.c \
+	$(top_srcdir)/lib/i2c_async.c \
 	$(top_srcdir)/lib/mdelay.c \
 	$(top_srcdir)/lib/memcpy_wa.c \
 	$(top_srcdir)/lib/memset_wa.c \
diff --git a/firmware/microblaze/lib/i2c.c b/firmware/microblaze/lib/i2c.c
index 177341267..d230f462c 100644
--- a/firmware/microblaze/lib/i2c.c
+++ b/firmware/microblaze/lib/i2c.c
@@ -20,7 +20,6 @@
 #include "memory_map.h"
 #include "stdint.h"
 #include <string.h>
-#include "pic.h"
 #include "nonstdio.h"
 
 #define MAX_WB_DIV 4	// maximum wishbone divisor (from 100 MHz MASTER_CLK)
@@ -37,18 +36,6 @@ static uint16_t prescaler_values[MAX_WB_DIV+1] = {
   PRESCALER(4), // 4:  25 MHz
 };
 
-//asynchronous (interrupt-driven) i2c state variables
-volatile uint8_t i2c_buf[17]; //tx/rx data transfer buffer
-volatile uint8_t *volatile i2c_bufptr = i2c_buf; //ptr to current position
-volatile uint8_t i2c_len = 0; //length remaining in current transfer
-volatile i2c_state_t i2c_state = I2C_STATE_IDLE; //current I2C transfer state
-i2c_dir_t i2c_dir; //I2C transfer direction
-
-void  (*volatile i2c_callback)(void); //function pointer to i2c callback to be called when transaction is complete
-
-static void i2c_irq_handler(unsigned irq);
-inline void i2c_async_err(void);
-
 void
 i2c_init(void)
 {
@@ -64,8 +51,8 @@ i2c_init(void)
 
   i2c_regs->ctrl = I2C_CTRL_EN; //| I2C_CTRL_IE;	// enable core
 
-  // FIXME interrupt driven?  
-  pic_register_handler(IRQ_I2C, i2c_irq_handler);
+  //now this is done separately to maintain common code for async and sync
+  //pic_register_handler(IRQ_I2C, i2c_irq_handler);
 }
 
 static inline void
@@ -140,163 +127,3 @@ i2c_write(unsigned char i2c_addr, const unsigned char *buf, unsigned int len)
   return false;
 }
 
-static void i2c_irq_handler(unsigned irq) {
-//i2c state machine.
-
-  //printf("I2C irq handler\n");
-  //first let's make sure nothing is f'ed up
-  //TODO: uncomment this error checking when we have some way to handle errors
-//  if(((i2c_regs->cmd_status & I2C_ST_RXACK) != 0) && i2c_dir == I2C_DIR_WRITE) { //we got a NACK and we didn't send it
-//    printf("\tNACK received\n");
-//    i2c_async_err();
-//    return;
-//  }// else printf("\tACK received, proceeding\n");
-
-  if(i2c_regs->cmd_status & I2C_ST_AL) { 
-    printf("\tArbitration lost!\n");
-    i2c_async_err();
-    return;
-  }
-
-  if(i2c_regs->cmd_status & I2C_ST_TIP) {
-    //printf("\tI2C still busy in interrupt\n");
-    return;
-  }
-
-  //now decide what to do
-  switch(i2c_state) {
-
-  case I2C_STATE_IDLE:
-    //this is an error. in idle state, we shouldn't be transferring data, and the fact that the IRQ fired is terrible bad.
-    printf("AAAAAHHHHH INTERRUPT IN THE IDLE STATE AAAHHHHHHHHH\n");
-    i2c_async_err();
-    break;
-
-  case I2C_STATE_CONTROL_BYTE_SENT: //here we've sent the control byte, and we're either clocking data in or out now, but we haven't received a byte yet.
-  case I2C_STATE_DATA:      //here we're sending/receiving data and if we're receiving there's data in the data reg
-
-    //if(i2c_state == I2C_STATE_DATA) printf("\tI2C in state DATA with dir=%d and len=%d\n", i2c_dir, i2c_len);
-    //else printf("\tI2C in state CONTROL_BYTE_SENT with dir=%d and len=%d\n", i2c_dir, i2c_len);
-
-    if(i2c_dir == I2C_DIR_READ) {
-      if(i2c_state == I2C_STATE_DATA) *(i2c_bufptr++) = i2c_regs->data;
-      //printf("\tRead %x\n", *(i2c_bufptr-1));
-      //set up another data byte
-      if(i2c_len > 1) //only one more byte to transfer
-        i2c_regs->cmd_status = I2C_CMD_RD;
-      else
-        i2c_regs->cmd_status = I2C_CMD_RD | I2C_CMD_NACK | I2C_CMD_STOP;
-    }
-    else if(i2c_dir == I2C_DIR_WRITE) {
-      //write a byte
-      //printf("\tWriting %x\n", *i2c_bufptr);
-      i2c_regs->data = *(i2c_bufptr++);
-      if(i2c_len > 1)
-        i2c_regs->cmd_status = I2C_CMD_WR;
-      else {
-        //printf("\tGenerating STOP\n");
-        i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_STOP;
-      }
-    };
-    i2c_len--;
-    if(i2c_len == 0) i2c_state = I2C_STATE_LAST_BYTE;
-    else i2c_state = I2C_STATE_DATA; //takes care of the addr_sent->data transition
-    break;
-
-
-  case I2C_STATE_LAST_BYTE: //here we've already sent the last read request and the last data is waiting for us.
-    //printf("\tI2C in state LAST BYTE\n");
-
-    if(i2c_dir == I2C_DIR_READ) {
-      *(i2c_bufptr++) = i2c_regs->data;
-      //printf("\tRead %x\n", *(i2c_bufptr-1));
-      i2c_state = I2C_STATE_DATA_READY;
-    } else {
-      i2c_state = I2C_STATE_IDLE;
-    }
-    i2c_regs->ctrl &= ~I2C_CTRL_IE; //disable interrupts until next time
-
-    if(i2c_callback) {
-      i2c_callback(); //if we registered a callback, call it!
-    }
-
-    break;
-
-
-  default: //terrible things have happened.
-    break;
-  }
-
-}
-
-void i2c_register_callback(void (*volatile callback)(void)) {
-  i2c_callback = callback;
-}
-
-inline void i2c_async_err(void) {
-  i2c_state = I2C_STATE_IDLE;
-  i2c_regs->ctrl &= ~I2C_CTRL_IE;
-  printf("I2C error\n");
-//TODO: set an error flag instead of just dropping things on the floor
-  i2c_regs->cmd_status = I2C_CMD_STOP;
-}
-
-bool i2c_async_read(uint8_t addr, unsigned int len) {
-  //printf("Starting async read\n");
-  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
-  if(len == 0) return true; //just idiot-proofing
-  if(len > sizeof(i2c_buf)) return false;
-
-  //disable I2C interrupts and clear pending interrupts on the I2C device
-  i2c_regs->ctrl &= ~I2C_CTRL_IE;
-  i2c_regs->cmd_status |= I2C_CMD_IACK;
-
-  i2c_len = len;
-  i2c_dir = I2C_DIR_READ;
-  i2c_bufptr = i2c_buf;
-  //then set up the transfer by issuing the control byte
-  i2c_regs->ctrl |= I2C_CTRL_IE;
-  i2c_regs->data = (addr << 1) | 0x01; //7 bit addr and read bit
-  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
-  //update the state so the irq handler knows what's going on
-  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
-  return true;
-}
-
-bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len) {
-  //printf("Starting async write\n");
-  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
-  if(len > sizeof(i2c_buf)) return false;
-
-  //disable I2C interrupts and clear pending interrupts on the I2C device
-  i2c_regs->ctrl &= ~I2C_CTRL_IE;
-  i2c_regs->cmd_status |= I2C_CMD_IACK;
-
-  //copy the buffer into our own if writing
-  memcpy((void *)i2c_buf, buf, len);
-
-  i2c_len = len;
-  i2c_dir = I2C_DIR_WRITE;
-  i2c_bufptr = i2c_buf;
-  //then set up the transfer by issuing the control byte
-  i2c_regs->ctrl |= I2C_CTRL_IE;
-  i2c_regs->data = (addr << 1) | 0x00; //7 bit addr and read bit
-  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
-  //update the state so the irq handler knows what's going on
-  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
-
-  return true;
-}
-
-//TODO: determine if it's better to read sequentially into the user's buffer, copy on transfer complete, or copy on request (shown below). probably best to copy on request.
-bool i2c_async_data_ready(void *buf) {
-  if(i2c_state == I2C_STATE_DATA_READY) {
-    i2c_state = I2C_STATE_IDLE;
-    memcpy(buf, (void *)i2c_buf, (i2c_bufptr - i2c_buf)); //TODO: not really comfortable with this
-    //printf("Copying %d bytes to user buffer\n", i2c_bufptr-i2c_buf);
-    return true;
-  }
-  return false;
-}
-
-
diff --git a/firmware/microblaze/lib/i2c.h b/firmware/microblaze/lib/i2c.h
index 77129e922..6ff0e6982 100644
--- a/firmware/microblaze/lib/i2c.h
+++ b/firmware/microblaze/lib/i2c.h
@@ -22,36 +22,15 @@
 #include <stdbool.h>
 #include "stdint.h"
 
-typedef enum { I2C_STATE_IDLE, 
-               I2C_STATE_CONTROL_BYTE_SENT, 
-               I2C_STATE_DATA, 
-               I2C_STATE_LAST_BYTE, 
-               I2C_STATE_DATA_READY, 
-               I2C_STATE_ERROR 
-             } i2c_state_t;
-
-typedef enum { I2C_DIR_WRITE=0, I2C_DIR_READ=1 } i2c_dir_t;
-
 void i2c_init(void);
 bool i2c_read (unsigned char i2c_addr, unsigned char *buf, unsigned int len);
 bool i2c_write(unsigned char i2c_addr, const unsigned char *buf, unsigned int len);
 
-bool i2c_async_read(uint8_t addr, unsigned int len);
-bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len);
-bool i2c_async_data_ready(void *);
-//static void i2c_irq_handler(unsigned irq);
-void i2c_register_callback(void (*callback)(void));
-
-// Write 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
-// Which EEPROM is determined by i2c_addr.  See i2c_addr.h
-
 bool eeprom_write (int i2c_addr, int eeprom_offset, const void *buf, int len);
-bool eeprom_write_async (int i2c_addr, int eeprom_offset, const void *buf, int len, void (*callback)(void));
 
 // Read 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
 // Which EEPROM is determined by i2c_addr.  See i2c_addr.h
 
 bool eeprom_read (int i2c_addr, int eeprom_offset, void *buf, int len);
-bool eeprom_read_async(int i2c_addr, int eeprom_offset, void *buf, int len, void (*callback)(void));
 
 #endif /* INCLUDED_I2C_H */
diff --git a/firmware/microblaze/lib/i2c_async.c b/firmware/microblaze/lib/i2c_async.c
new file mode 100644
index 000000000..05c4c3a09
--- /dev/null
+++ b/firmware/microblaze/lib/i2c_async.c
@@ -0,0 +1,206 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+/*
+ * Copyright 2007,2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+ 
+ //i2c_async.c: asynchronous (interrupt-driven) routines for I2C.
+ //separated out here so we can have a small I2C lib for bootloader and
+ //retain interrupt-driven I2C for the main app.
+
+#include "memory_map.h"
+#include "stdint.h"
+#include <string.h>
+#include "pic.h"
+#include "nonstdio.h"
+#include "i2c_async.h"
+ 
+ //asynchronous (interrupt-driven) i2c state variables
+volatile uint8_t i2c_buf[17]; //tx/rx data transfer buffer
+volatile uint8_t *volatile i2c_bufptr = i2c_buf; //ptr to current position
+volatile uint8_t i2c_len = 0; //length remaining in current transfer
+volatile i2c_state_t i2c_state = I2C_STATE_IDLE; //current I2C transfer state
+i2c_dir_t i2c_dir; //I2C transfer direction
+
+void  (*volatile i2c_callback)(void); //function pointer to i2c callback to be called when transaction is complete
+static void i2c_irq_handler(unsigned irq);
+inline void i2c_async_err(void);
+
+void i2c_register_handler(void) {
+    pic_register_handler(IRQ_I2C, i2c_irq_handler);
+}
+
+
+static void i2c_irq_handler(unsigned irq) {
+//i2c state machine.
+
+  //printf("I2C irq handler\n");
+  //first let's make sure nothing is f'ed up
+  //TODO: uncomment this error checking when we have some way to handle errors
+//  if(((i2c_regs->cmd_status & I2C_ST_RXACK) != 0) && i2c_dir == I2C_DIR_WRITE) { //we got a NACK and we didn't send it
+//    printf("\tNACK received\n");
+//    i2c_async_err();
+//    return;
+//  }// else printf("\tACK received, proceeding\n");
+
+  if(i2c_regs->cmd_status & I2C_ST_AL) { 
+    printf("\tArbitration lost!\n");
+    i2c_async_err();
+    return;
+  }
+
+  if(i2c_regs->cmd_status & I2C_ST_TIP) {
+    //printf("\tI2C still busy in interrupt\n");
+    return;
+  }
+
+  //now decide what to do
+  switch(i2c_state) {
+
+  case I2C_STATE_IDLE:
+    //this is an error. in idle state, we shouldn't be transferring data, and the fact that the IRQ fired is terrible bad.
+    printf("AAAAAHHHHH INTERRUPT IN THE IDLE STATE AAAHHHHHHHHH\n");
+    i2c_async_err();
+    break;
+
+  case I2C_STATE_CONTROL_BYTE_SENT: //here we've sent the control byte, and we're either clocking data in or out now, but we haven't received a byte yet.
+  case I2C_STATE_DATA:      //here we're sending/receiving data and if we're receiving there's data in the data reg
+
+    //if(i2c_state == I2C_STATE_DATA) printf("\tI2C in state DATA with dir=%d and len=%d\n", i2c_dir, i2c_len);
+    //else printf("\tI2C in state CONTROL_BYTE_SENT with dir=%d and len=%d\n", i2c_dir, i2c_len);
+
+    if(i2c_dir == I2C_DIR_READ) {
+      if(i2c_state == I2C_STATE_DATA) *(i2c_bufptr++) = i2c_regs->data;
+      //printf("\tRead %x\n", *(i2c_bufptr-1));
+      //set up another data byte
+      if(i2c_len > 1) //only one more byte to transfer
+        i2c_regs->cmd_status = I2C_CMD_RD;
+      else
+        i2c_regs->cmd_status = I2C_CMD_RD | I2C_CMD_NACK | I2C_CMD_STOP;
+    }
+    else if(i2c_dir == I2C_DIR_WRITE) {
+      //write a byte
+      //printf("\tWriting %x\n", *i2c_bufptr);
+      i2c_regs->data = *(i2c_bufptr++);
+      if(i2c_len > 1)
+        i2c_regs->cmd_status = I2C_CMD_WR;
+      else {
+        //printf("\tGenerating STOP\n");
+        i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_STOP;
+      }
+    };
+    i2c_len--;
+    if(i2c_len == 0) i2c_state = I2C_STATE_LAST_BYTE;
+    else i2c_state = I2C_STATE_DATA; //takes care of the addr_sent->data transition
+    break;
+
+
+  case I2C_STATE_LAST_BYTE: //here we've already sent the last read request and the last data is waiting for us.
+    //printf("\tI2C in state LAST BYTE\n");
+
+    if(i2c_dir == I2C_DIR_READ) {
+      *(i2c_bufptr++) = i2c_regs->data;
+      //printf("\tRead %x\n", *(i2c_bufptr-1));
+      i2c_state = I2C_STATE_DATA_READY;
+    } else {
+      i2c_state = I2C_STATE_IDLE;
+    }
+    i2c_regs->ctrl &= ~I2C_CTRL_IE; //disable interrupts until next time
+
+    if(i2c_callback) {
+      i2c_callback(); //if we registered a callback, call it!
+    }
+
+    break;
+
+
+  default: //terrible things have happened.
+    break;
+  }
+
+}
+
+void i2c_register_callback(void (*volatile callback)(void)) {
+  i2c_callback = callback;
+}
+
+inline void i2c_async_err(void) {
+  i2c_state = I2C_STATE_IDLE;
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  printf("I2C error\n");
+//TODO: set an error flag instead of just dropping things on the floor
+  i2c_regs->cmd_status = I2C_CMD_STOP;
+}
+
+bool i2c_async_read(uint8_t addr, unsigned int len) {
+  //printf("Starting async read\n");
+  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
+  if(len == 0) return true; //just idiot-proofing
+  if(len > sizeof(i2c_buf)) return false;
+
+  //disable I2C interrupts and clear pending interrupts on the I2C device
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  i2c_regs->cmd_status |= I2C_CMD_IACK;
+
+  i2c_len = len;
+  i2c_dir = I2C_DIR_READ;
+  i2c_bufptr = i2c_buf;
+  //then set up the transfer by issuing the control byte
+  i2c_regs->ctrl |= I2C_CTRL_IE;
+  i2c_regs->data = (addr << 1) | 0x01; //7 bit addr and read bit
+  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
+  //update the state so the irq handler knows what's going on
+  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
+  return true;
+}
+
+bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len) {
+  //printf("Starting async write\n");
+  if(i2c_state != I2C_STATE_IDLE) return false; //sorry mario but your i2c is in another castle
+  if(len > sizeof(i2c_buf)) return false;
+
+  //disable I2C interrupts and clear pending interrupts on the I2C device
+  i2c_regs->ctrl &= ~I2C_CTRL_IE;
+  i2c_regs->cmd_status |= I2C_CMD_IACK;
+
+  //copy the buffer into our own if writing
+  memcpy((void *)i2c_buf, buf, len);
+
+  i2c_len = len;
+  i2c_dir = I2C_DIR_WRITE;
+  i2c_bufptr = i2c_buf;
+  //then set up the transfer by issuing the control byte
+  i2c_regs->ctrl |= I2C_CTRL_IE;
+  i2c_regs->data = (addr << 1) | 0x00; //7 bit addr and read bit
+  i2c_regs->cmd_status = I2C_CMD_WR | I2C_CMD_START; //generate start & start writing addr
+  //update the state so the irq handler knows what's going on
+  i2c_state = I2C_STATE_CONTROL_BYTE_SENT;
+
+  return true;
+}
+
+//TODO: determine if it's better to read sequentially into the user's buffer, copy on transfer complete, or copy on request (shown below). probably best to copy on request.
+bool i2c_async_data_ready(void *buf) {
+  if(i2c_state == I2C_STATE_DATA_READY) {
+    i2c_state = I2C_STATE_IDLE;
+    memcpy(buf, (void *)i2c_buf, (i2c_bufptr - i2c_buf)); //TODO: not really comfortable with this
+    //printf("Copying %d bytes to user buffer\n", i2c_bufptr-i2c_buf);
+    return true;
+  }
+  return false;
+}
+
diff --git a/firmware/microblaze/lib/i2c_async.h b/firmware/microblaze/lib/i2c_async.h
new file mode 100644
index 000000000..e6095fca6
--- /dev/null
+++ b/firmware/microblaze/lib/i2c_async.h
@@ -0,0 +1,50 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+/*
+ * Copyright 2007,2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef INCLUDED_I2C_ASYNC_H
+#define INCLUDED_I2C_ASYNC_H
+
+#include <stdbool.h>
+#include "stdint.h"
+
+typedef enum { I2C_STATE_IDLE, 
+               I2C_STATE_CONTROL_BYTE_SENT, 
+               I2C_STATE_DATA, 
+               I2C_STATE_LAST_BYTE, 
+               I2C_STATE_DATA_READY, 
+               I2C_STATE_ERROR 
+             } i2c_state_t;
+
+typedef enum { I2C_DIR_WRITE=0, I2C_DIR_READ=1 } i2c_dir_t;
+
+bool i2c_async_read(uint8_t addr, unsigned int len);
+bool i2c_async_write(uint8_t addr, const uint8_t *buf, unsigned int len);
+bool i2c_async_data_ready(void *);
+//static void i2c_irq_handler(unsigned irq);
+void i2c_register_callback(void (*callback)(void));
+void i2c_register_handler(void);
+
+// Write 24LC024 / 24LC025 EEPROM on motherboard or daughterboard.
+// Which EEPROM is determined by i2c_addr.  See i2c_addr.h
+
+bool eeprom_write_async (int i2c_addr, int eeprom_offset, const void *buf, int len, void (*callback)(void));
+bool eeprom_read_async(int i2c_addr, int eeprom_offset, void *buf, int len, void (*callback)(void));
+
+#endif /* INCLUDED_I2C_ASYNC_H */
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c
index 8d666b76b..099aafe83 100644
--- a/firmware/microblaze/lib/u2_init.c
+++ b/firmware/microblaze/lib/u2_init.c
@@ -23,6 +23,7 @@
 #include "buffer_pool.h"
 #include "hal_uart.h"
 #include "i2c.h"
+#include "i2c_async.h"
 #include "mdelay.h"
 #include "clocks.h"
 #include "usrp2/fw_common.h"
@@ -59,6 +60,7 @@ u2_init(void)
   // init i2c so we can read our rev
   pic_init();	// progammable interrupt controller
   i2c_init();
+  i2c_register_handler(); //for using async I2C
   hal_enable_ints();
   get_hw_rev();
 
diff --git a/firmware/microblaze/usrp2p/bootloader/Makefile.am b/firmware/microblaze/usrp2p/bootloader/Makefile.am
index eb72d937d..1fc5daf9c 100644
--- a/firmware/microblaze/usrp2p/bootloader/Makefile.am
+++ b/firmware/microblaze/usrp2p/bootloader/Makefile.am
@@ -30,7 +30,7 @@ LDADD = $(top_srcdir)/usrp2p/libusrp2p.a
 noinst_PROGRAMS = \
 	init_bootloader.elf
 
-init_bootloader_elf_SOURCES = init_bootloader.c i2c_sync.c
+init_bootloader_elf_SOURCES = init_bootloader.c
 
 .bin.rmi:
 	$(top_srcdir)/bin/bin_to_ram_macro_init.py $< $@
diff --git a/firmware/microblaze/usrp2p/bootloader/init_bootloader.c b/firmware/microblaze/usrp2p/bootloader/init_bootloader.c
index 3571313ff..e6c808f37 100644
--- a/firmware/microblaze/usrp2p/bootloader/init_bootloader.c
+++ b/firmware/microblaze/usrp2p/bootloader/init_bootloader.c
@@ -15,7 +15,8 @@
 #include <bootloader_utils.h>
 #include <string.h>
 #include <hal_uart.h>
-#include "i2c_sync.h"
+#include <i2c.h>
+#include "usrp2/fw_common.h"
 
 #define SAFE_FLAG_LOCATION 247
 
@@ -31,14 +32,13 @@ void pic_interrupt_handler()
 
 bool find_safe_booted_flag(void) {
 	unsigned char flag_byte;
-	i2c_read(SAFE_FLAG_LOCATION, &flag_byte, 1);
-	
+	eeprom_read(USRP2_I2C_ADDR_MBOARD, SAFE_FLAG_LOCATION, &flag_byte, 1);
 	return (flag_byte == 0x5E);
 }
 
 void set_safe_booted_flag(bool flag) {
 	unsigned char flag_byte = flag ? 0x5E : 0xDC;
-	i2c_write(SAFE_FLAG_LOCATION, &flag_byte, 1);
+	eeprom_write(USRP2_I2C_ADDR_MBOARD, SAFE_FLAG_LOCATION, &flag_byte, 1);
 }
 
 
@@ -102,7 +102,7 @@ int main(int argc, char *argv[]) {
 		if(is_valid_fpga_image(PROD_FPGA_IMAGE_LOCATION_ADDR)) {
 			puts("Valid production FPGA image found. Attempting to boot.");
 			set_safe_booted_flag(1);
-			delay(10000);
+			delay(30000); //so serial output can finish
 			icap_reload_fpga(PROD_FPGA_IMAGE_LOCATION_ADDR);
 		}
 		puts("No valid production FPGA image found.\nAttempting to load production firmware...");
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 12ff1a76f..59e223e75 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -59,6 +59,8 @@ extern "C" {
 #define USRP2_EE_MBOARD_REV_MSB  0x01 //1 byte
 #define USRP2_EE_MBOARD_MAC_ADDR 0x02 //6 bytes
 #define USRP2_EE_MBOARD_IP_ADDR  0x0C //uint32, big-endian
+#define USRP2_EE_MBOARD_SERIAL_NUM 0xF8
+#define USRP2_EE_MBOARD_BOOTLOADER_FLAGS 0xF7
 
 typedef enum{
     USRP2_CTRL_ID_HUH_WHAT = ' ',