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authormichael-west <michael.west@ettus.com>2015-08-25 13:39:45 -0700
committerMartin Braun <martin.braun@ettus.com>2015-09-01 13:48:14 -0700
commit5d3ad761d5479c981858dfe7d13e5fb11c25d8d6 (patch)
treef5ee3faf548cfcaa76fa9388f08ef67c24dd0201
parentdbf09cabf44c2bfff767e350b65f92a586819b34 (diff)
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UHD: Fix max287x N divider ranges
-rw-r--r--host/lib/usrp/common/max287x.hpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/host/lib/usrp/common/max287x.hpp b/host/lib/usrp/common/max287x.hpp
index 53d967d0e..fe5da195c 100644
--- a/host/lib/usrp/common/max287x.hpp
+++ b/host/lib/usrp/common/max287x.hpp
@@ -412,7 +412,7 @@ double max287x<max287x_regs_t>::set_frequency(
(128, max287x_regs_t::RF_DIVIDER_SELECT_DIV128);
//map mode setting to valid integer divider (N) values
- static const uhd::range_t int_n_mode_div_range(16,65536,1);
+ static const uhd::range_t int_n_mode_div_range(16,65535,1);
static const uhd::range_t frac_n_mode_div_range(19,4091,1);
//other ranges and constants from MAX287X datasheets
@@ -486,13 +486,13 @@ double max287x<max287x_regs_t>::set_frequency(
//keep N within int divider requirements
if(is_int_n)
{
- if(N < int_n_mode_div_range.start()) continue;
- if(N > int_n_mode_div_range.stop()) continue;
+ if(N <= int_n_mode_div_range.start()) continue;
+ if(N >= int_n_mode_div_range.stop()) continue;
}
else
{
- if(N < frac_n_mode_div_range.start()) continue;
- if(N > frac_n_mode_div_range.stop()) continue;
+ if(N <= frac_n_mode_div_range.start()) continue;
+ if(N >= frac_n_mode_div_range.stop()) continue;
}
//keep pfd freq low enough to achieve 50kHz BS clock