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authorMatt Ettus <matt@ettus.com>2011-02-25 16:44:50 -0800
committerMatt Ettus <matt@ettus.com>2011-02-25 16:44:50 -0800
commit8b541ef9af7e10e072758c5ad75454fd4dcdf709 (patch)
tree5379b3f68dcf72b7542bc1d7e4cf6d9dc4852114
parent98a1a03de054306f57be68e1b498c1d39a954472 (diff)
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correct port names
-rw-r--r--usrp2/fifo/fifo36_mux.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/fifo/fifo36_mux.v b/usrp2/fifo/fifo36_mux.v
index fa4243efe..7f0f803ff 100644
--- a/usrp2/fifo/fifo36_mux.v
+++ b/usrp2/fifo/fifo36_mux.v
@@ -15,12 +15,12 @@ module fifo36_mux
fifo_short #(.WIDTH(36)) mux_fifo_in0
(.clk(clk), .reset(reset), .clear(clear),
- .datain(data0_i), .src_rdy_i(src0_rdy_i), .dst_rdy_o(dst0_rdy_i),
+ .datain(data0_i), .src_rdy_i(src0_rdy_i), .dst_rdy_o(dst0_rdy_o),
.dataout(data0_int), .src_rdy_o(src0_rdy_int), .dst_rdy_i(dst0_rdy_int));
fifo_short #(.WIDTH(36)) mux_fifo_in1
(.clk(clk), .reset(reset), .clear(clear),
- .datain(data1_i), .src_rdy_i(src1_rdy_i), .dst_rdy_o(dst1_rdy_i),
+ .datain(data1_i), .src_rdy_i(src1_rdy_i), .dst_rdy_o(dst1_rdy_o),
.dataout(data1_int), .src_rdy_o(src1_rdy_int), .dst_rdy_i(dst1_rdy_int));
localparam MUX_IDLE0 = 0;