DDC enable with stream at control OTW

5 files changed, 65 insertions, 20 deletions

diff --git a/firmware/microblaze/apps/txrx.c b/firmware/microblaze/apps/txrx.c
index 686fda2fd..77c8e498c 100644
--- a/firmware/microblaze/apps/txrx.c
+++ b/firmware/microblaze/apps/txrx.c
@@ -139,6 +139,9 @@ bool is_streaming(void){ return streaming_p; }
 
 // ----------------------------------------------------------------
 
+void start_rx_streaming_cmd(void *p);
+void stop_rx_cmd(void);
+
 static eth_mac_addr_t get_my_eth_mac_addr(void){
     return *ethernet_mac_addr();
 }
@@ -413,6 +416,19 @@ void handle_udp_ctrl_packet(
         ctrl_data_out.id = USRP2_CTRL_ID_TOTALLY_SETUP_THE_DDC_DUDE;
         break;
 
+    case USRP2_CTRL_ID_CONFIGURE_STREAMING_FOR_ME_BRO:
+        time_secs =  ctrl_data_in->data.streaming.secs;
+        time_ticks = ctrl_data_in->data.streaming.ticks;
+        if (ctrl_data_in->data.streaming.enabled == 0){
+            stop_rx_cmd();
+        }
+        else{
+            start_rx_streaming_cmd(NULL);
+        }
+
+        ctrl_data_out.id = USRP2_CTRL_ID_CONFIGURED_THAT_STREAMING_DUDE;
+        break;
+
     /*******************************************************************
      * DUC
      ******************************************************************/
@@ -602,7 +618,7 @@ stop_rx_cmd(void)
 }
 
 
-static void
+/*static void
 setup_tx()
 {
   sr_tx_ctrl->clear_state = 1;
@@ -617,7 +633,7 @@ setup_tx()
   dsp_tx_regs->freq = 0;
   dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
   dsp_tx_regs->interp_rate = interp;
-}
+}*/
 
 
 #if (FW_SETS_SEQNO)
@@ -710,7 +726,7 @@ main(void)
 
 
   // program tx registers
-  setup_tx();
+  //setup_tx();
 
   // kick off the state machine
   dbsm_start(&dsp_tx_sm);
diff --git a/host/lib/usrp/mboard/usrp2/dsp_impl.cpp b/host/lib/usrp/mboard/usrp2/dsp_impl.cpp
index a1c96adab..22c00d99a 100644
--- a/host/lib/usrp/mboard/usrp2/dsp_impl.cpp
+++ b/host/lib/usrp/mboard/usrp2/dsp_impl.cpp
@@ -37,19 +37,6 @@ static uint32_t calculate_freq_word_and_update_actual_freq(freq_t &freq, freq_t
 }
 
 void usrp2_impl::init_ddc_config(void){
-    //load the allowed decim/interp rates
-    //_USRP2_RATES = range(4, 128+1, 1) + range(130, 256+1, 2) + range(260, 512+1, 4)
-    _allowed_decim_and_interp_rates.clear();
-    for (size_t i = 4; i <= 128; i+=1){
-        _allowed_decim_and_interp_rates.push_back(i);
-    }
-    for (size_t i = 130; i <= 256; i+=2){
-        _allowed_decim_and_interp_rates.push_back(i);
-    }
-    for (size_t i = 260; i <= 512; i+=4){
-        _allowed_decim_and_interp_rates.push_back(i);
-    }
-
     //create the ddc in the rx dsp dict
     _rx_dsps["ddc0"] = wax_obj_proxy(
         boost::bind(&usrp2_impl::ddc_get, this, _1, _2),
@@ -59,8 +46,11 @@ void usrp2_impl::init_ddc_config(void){
     //initial config and update
     _ddc_decim = 16;
     _ddc_freq = 0;
-    _ddc_enabled = false;
     update_ddc_config();
+
+    _ddc_stream_at = time_spec_t();
+    _ddc_enabled = false;
+    update_ddc_enabled();
 }
 
 void usrp2_impl::update_ddc_config(void){
@@ -77,6 +67,22 @@ void usrp2_impl::update_ddc_config(void){
     ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_TOTALLY_SETUP_THE_DDC_DUDE);
 }
 
+void usrp2_impl::update_ddc_enabled(void){
+    //setup the out data
+    usrp2_ctrl_data_t out_data;
+    out_data.id = htonl(USRP2_CTRL_ID_CONFIGURE_STREAMING_FOR_ME_BRO);
+    out_data.data.streaming.enabled = (_ddc_enabled)? 1 : 0;
+    out_data.data.streaming.secs =  htonl(_ddc_stream_at.secs);
+    out_data.data.streaming.ticks = htonl(_ddc_stream_at.ticks);
+
+    //send and recv
+    usrp2_ctrl_data_t in_data = ctrl_send_and_recv(out_data);
+    ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_CONFIGURED_THAT_STREAMING_DUDE);
+
+    //clear the stream at time spec (it must be set for the next round of enable/disable)
+    _ddc_stream_at = time_spec_t();
+}
+
 /***********************************************************************
  * DDC Properties
  **********************************************************************/
@@ -95,7 +101,7 @@ void usrp2_impl::ddc_get(const wax::obj &key, wax::obj &val){
                     ("decim_rates")
                     ("freq")
                     ("enabled")
-                    //TODO ("stream_at")
+                    ("stream_at")
                 ;
                 val = others;
             }
@@ -156,7 +162,13 @@ void usrp2_impl::ddc_set(const wax::obj &key, const wax::obj &val){
     else if (key_name == "enabled"){
         bool new_enabled = wax::cast<bool>(val);
         _ddc_enabled = new_enabled; //shadow
-        //update_ddc_config(); TODO separate update
+        update_ddc_enabled();
+        return;
+    }
+    else if (key_name == "stream_at"){
+        time_spec_t new_stream_at = wax::cast<time_spec_t>(val);
+        _ddc_stream_at = new_stream_at; //shadow
+        //update_ddc_enabled(); //dont update from here
         return;
     }
 
diff --git a/host/lib/usrp/mboard/usrp2/fw_common.h b/host/lib/usrp/mboard/usrp2/fw_common.h
index d3ffbf7d5..3def8ddaa 100644
--- a/host/lib/usrp/mboard/usrp2/fw_common.h
+++ b/host/lib/usrp/mboard/usrp2/fw_common.h
@@ -81,6 +81,9 @@ typedef enum{
     USRP2_CTRL_ID_SETUP_THIS_DDC_FOR_ME_BRO,
     USRP2_CTRL_ID_TOTALLY_SETUP_THE_DDC_DUDE,
 
+    USRP2_CTRL_ID_CONFIGURE_STREAMING_FOR_ME_BRO,
+    USRP2_CTRL_ID_CONFIGURED_THAT_STREAMING_DUDE,
+
     USRP2_CTRL_ID_SETUP_THIS_DUC_FOR_ME_BRO,
     USRP2_CTRL_ID_TOTALLY_SETUP_THE_DUC_DUDE,
 
diff --git a/host/lib/usrp/mboard/usrp2/usrp2_impl.cpp b/host/lib/usrp/mboard/usrp2/usrp2_impl.cpp
index 29732c3c0..39be8938e 100644
--- a/host/lib/usrp/mboard/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/mboard/usrp2/usrp2_impl.cpp
@@ -34,6 +34,19 @@ usrp2_impl::usrp2_impl(
     _ctrl_transport = ctrl_transport;
     _data_transport = data_transport;
 
+    //load the allowed decim/interp rates
+    //_USRP2_RATES = range(4, 128+1, 1) + range(130, 256+1, 2) + range(260, 512+1, 4)
+    _allowed_decim_and_interp_rates.clear();
+    for (size_t i = 4; i <= 128; i+=1){
+        _allowed_decim_and_interp_rates.push_back(i);
+    }
+    for (size_t i = 130; i <= 256; i+=2){
+        _allowed_decim_and_interp_rates.push_back(i);
+    }
+    for (size_t i = 260; i <= 512; i+=4){
+        _allowed_decim_and_interp_rates.push_back(i);
+    }
+
     //init the tx and rx dboards
     dboard_init();
 
diff --git a/host/lib/usrp/mboard/usrp2/usrp2_impl.hpp b/host/lib/usrp/mboard/usrp2/usrp2_impl.hpp
index 638498a1c..42fe46099 100644
--- a/host/lib/usrp/mboard/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/mboard/usrp2/usrp2_impl.hpp
@@ -134,9 +134,10 @@ private:
     size_t _ddc_decim;
     uhd::freq_t _ddc_freq;
     bool _ddc_enabled;
-    //TODO uhd::time_spec_t _ddc_stream_at;
+    uhd::time_spec_t _ddc_stream_at;
     void init_ddc_config(void);
     void update_ddc_config(void);
+    void update_ddc_enabled(void);
 
     //methods and shadows for the duc dsp
     size_t _duc_interp;