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| author | Matt Ettus <matt@ettus.com> | 2010-07-16 17:25:49 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-07-28 10:00:44 -0700 |
| commit | 417c1d0abd5cbc52f46f2a3564b6805a59e6fe7f (patch) | |
| tree | eb685d9023a935cc47ca70793c216e1fa66a18fd | |
| parent | 1a85baadf20a7e1a7e2789fd1a8947d27eeea08e (diff) | |
| download | uhd-417c1d0abd5cbc52f46f2a3564b6805a59e6fe7f.tar.gz uhd-417c1d0abd5cbc52f46f2a3564b6805a59e6fe7f.tar.bz2 uhd-417c1d0abd5cbc52f46f2a3564b6805a59e6fe7f.zip | |
fix a typo
| -rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 2 | ||||
| -rw-r--r-- | usrp2/vrt/gen_context_pkt.v | 4 | ||||
| -rw-r--r-- | usrp2/vrt/vita_tx_chain.v | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index db74188a6..74359dad2 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -663,7 +663,7 @@ module u2_core .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), .vita_time(vita_time), .tx_data_i(tx_data), .tx_src_rdy_i(tx_src_rdy), .tx_dst_rdy_o(tx_dst_rdy), - .tx_data_i(tx_err_data), .tx_src_rdy_i(tx_err_src_rdy), .tx_dst_rdy_o(tx_err_dst_rdy), + .err_data_o(tx_err_data), .err_src_rdy_o(tx_err_src_rdy), .err_dst_rdy_i(tx_err_dst_rdy), .dac_a(dac_a),.dac_b(dac_b), .underrun(underrun), .run(run_tx), .debug(debug_vt)); diff --git a/usrp2/vrt/gen_context_pkt.v b/usrp2/vrt/gen_context_pkt.v index 2fad43cc6..f413fdd1d 100644 --- a/usrp2/vrt/gen_context_pkt.v +++ b/usrp2/vrt/gen_context_pkt.v @@ -56,10 +56,10 @@ module gen_context_pkt CTXT_TICS : data_int <= { 2'b00, 32'd0 }; CTXT_TICS2 : data_int <= { 2'b00, err_time[31:0] }; CTXT_MESSAGE : data_int <= { 2'b10, message }; - default : {2'b00, 32'b00}; + default : data_int <= {2'b00, 32'b00}; endcase // case (ctxt_state) - fifo_short (.WIDTH(34)) ctxt_fifo + fifo_short #(.WIDTH(34)) ctxt_fifo (.clk(clk), .reset(reset), .clear(clear), .datain(data_int), .src_rdy_i(src_rdy_int), .dst_rdy_o(dst_rdy_int), .dataout(data_o[33:0]), .src_rdy_o(src_rdy_o), .dst_rdy_i(dst_rdy_i)); diff --git a/usrp2/vrt/vita_tx_chain.v b/usrp2/vrt/vita_tx_chain.v index 66f775ddf..cc091f2d5 100644 --- a/usrp2/vrt/vita_tx_chain.v +++ b/usrp2/vrt/vita_tx_chain.v @@ -8,7 +8,7 @@ module vita_tx_chain input set_stb, input [7:0] set_addr, input [31:0] set_data, input [63:0] vita_time, input [35:0] tx_data_i, input tx_src_rdy_i, output tx_dst_rdy_o, - input [35:0] err_data_i, input err_src_rdy_i, output err_dst_rdy_o, + output [35:0] err_data_o, output err_src_rdy_o, input err_dst_rdy_i, output [15:0] dac_a, output [15:0] dac_b, output underrun, output run, output [31:0] debug); |