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author | Josh Blum <josh@joshknows.com> | 2011-02-08 11:34:49 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2011-02-08 11:34:49 -0800 |
commit | 8b377a89f29ddbd417aba5a1b135d6b4f68dcf2c (patch) | |
tree | 24939ef86974a187171895a5d6aef3a8f2f9139b | |
parent | 38185eb6f18e77245d358860872336d9998e1c07 (diff) | |
download | uhd-8b377a89f29ddbd417aba5a1b135d6b4f68dcf2c.tar.gz uhd-8b377a89f29ddbd417aba5a1b135d6b4f68dcf2c.tar.bz2 uhd-8b377a89f29ddbd417aba5a1b135d6b4f68dcf2c.zip |
usrp-e100: notes on unbricking/clock reovery
-rw-r--r-- | host/docs/usrp_e1xx.rst | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/host/docs/usrp_e1xx.rst b/host/docs/usrp_e1xx.rst index e23295154..ffcd370dd 100644 --- a/host/docs/usrp_e1xx.rst +++ b/host/docs/usrp_e1xx.rst @@ -49,3 +49,17 @@ To use other clock rates, the jumpers will need to be in the default position. For the correct clock settings, call usrp->set_master_clock_rate(rate) before any other parameters are set in your application. + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Clock rate recovery - unbricking +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +It is possible to set a clock rate such that the UHD can no longer communicate with the FPGA. +When this occurs, it is necessary to use the usrp-e-utility to recover the clock generator. +The recovery utility works by loading a special pass-through FPGA image so the computer +can talk directly to the clock generator over a SPI interface. + +Run the following commands to restore the clock generator to a usable state: +:: + + cd <prefix>/share/uhd/usrp_e_utilities + ./usrp-e-utility --fpga=../images/usrp_e100_pt_fpga.bin --reclk |