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authorJosh Blum <josh@joshknows.com>2013-08-23 18:18:03 -0700
committerJosh Blum <josh@joshknows.com>2013-08-23 18:18:03 -0700
commit7b9a7e74dcc4b40bcedc59695c827e4d1d1e7d59 (patch)
treec8330e695661d3c24fd179a11d8902f095857280
parentf8b677183937d565045939061cbd57202e388e50 (diff)
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usrp2: fix firmware rx clear register offset
When an ICMP dest unreachable pkt arrives, the fw needs to know how to shutoff the DSP. This offset for the reset register was broken by a previous fix for register overlap.
-rw-r--r--firmware/zpu/lib/memory_map.h2
-rw-r--r--host/lib/usrp/usrp2/fw_common.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/firmware/zpu/lib/memory_map.h b/firmware/zpu/lib/memory_map.h
index 4290ee20a..b50a4433e 100644
--- a/firmware/zpu/lib/memory_map.h
+++ b/firmware/zpu/lib/memory_map.h
@@ -300,7 +300,7 @@ typedef struct {
// --- VITA RX CTRL regs ---
typedef struct {
- volatile uint32_t _pad[3];
+ volatile uint32_t _pad[8];
volatile uint32_t clear;
} sr_rx_ctrl_t;
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 7e3de1497..337a1ad6f 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -32,7 +32,7 @@ extern "C" {
//fpga and firmware compatibility numbers
#define USRP2_FPGA_COMPAT_NUM 10
#define USRP2_FW_COMPAT_NUM 12
-#define USRP2_FW_VER_MINOR 3
+#define USRP2_FW_VER_MINOR 4
//used to differentiate control packets over data port
#define USRP2_INVALID_VRT_HEADER 0