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author | Ryan Marlow <ryan.marlow@ettus.com> | 2018-07-25 18:22:59 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2018-12-19 09:36:51 -0800 |
commit | 5a5f604994902770382f0aa8447a511077160a28 (patch) | |
tree | c13c644ae8e744ca97026e8e73af09a2279fc99b /.github | |
parent | cbb634bc7abebba7f2865f0fec03fd504c4d2db4 (diff) | |
download | uhd-5a5f604994902770382f0aa8447a511077160a28.tar.gz uhd-5a5f604994902770382f0aa8447a511077160a28.tar.bz2 uhd-5a5f604994902770382f0aa8447a511077160a28.zip |
uhd/mpm: eiscat: Various changes
- correct lmk initialization parameters
- adding missing parameters and consts wrt clock synchronization.
- fixed default master clock rate
- eiscat, ddc: update xml.
- remove references to CORDIC_FREQ in ddc_eiscat
- update readback reg addr in radio_eiscat
- set default spp from 3992 to 3968.
- updated jesd mode sequence initialization
- updating eiscat_radio_ctrl_impl
- add rx_codecs to property tree to display correct ADC chip.
- updated issue_stream_cmd
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